JPS60241330A - Digital-analog converter with auto-range function - Google Patents

Abstract

PURPOSE:To perform auto-range D/A conversion by binarizing a range and storing constitution data in a memory. CONSTITUTION:Data D16-D18 of upper three bits out of 19 bits from a bus 21 are led to a switch control circuits 29 as a range signal. A mode is determined by data D16-D18 of three bits to perform the converting operation. A tap T1 is selected by a switch 3 when data D16-D18 are all ''0'', and a tap T3 is selected when data D16 is ''1'' and data D17 and D18 are ''0'', and a tap T2 is selected when data D16 and D17 are ''1'' and data D18 is ''0'', and the tap T2 is selected when data D16-D18 are all ''1'', and simultaneously, corrected data is outputted from memories 23 and 24.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an improvement in a digital-to-analog conversion device (hereinafter referred to as D/A conversion) having an auto-ranging function.

[Conventional technology] FIG. 2 shows an example of a conventional D/Δ conversion device of this type.

In this type of /A conversion 'lA system, a given digital signal is converted into an analog signal by the D/A converter 1, the analog signal is applied to the resistor voltage divider circuit 2, and the switch 3 converts the applied digital signal to an analog signal. Tap No. 2 is selected and the obtained divided voltage is outputted through the buffer amplifier 4.

The gain and offset of the D/A converter 1 can be adjusted, and the gain is adjusted by a gain control voltage 9 given through a resistor R9, and the offset is adjusted by an offset adjustment given through a resistor Rort. They are each controlled by the voltage Vorr.

However, in this type of A/A converter, the operator must manually calculate the D/A conversion settings and switch 3 settings one by one, resulting in extremely poor operability.

■Every time switch 3 is set, V9. Adjust Vorr and D
It is necessary to adjust the gain and offset error in /A conversion, which is very complicated.

[Object of the Invention] The object of the present invention is to eliminate such drawbacks and to control the setting of switches and D/A conversion by means of binary signals.
Another object of the present invention is to provide a D/A converter with an auto-range function capable of adjusting gain and offset.

[Summary of the Invention] In order to achieve such an object, the present invention converts a given digital signal into an analog signal using a digital-to-analog converter whose gain and offset can be controlled by an external voltage. In a digital-to-analog converter that is capable of dividing a signal into multiple ranges using a range switching circuit and outputting the desired range, the gain control voltage data for the digital-to-analog converter provided from a data bus is stored. a first storage circuit for storing offset adjustment voltage data for the digital-to-analog converter applied from a data bus; and an output of the first storage circuit. a digital-to-analog converter for gain adjustment, which converts the signal into an analog signal and supplies this to the digital-to-analog converter as a gain control voltage;
an offset adjustment digital-to-analog converter that converts the output of the storage circuit into an analog signal and supplies the analog signal to the digital-to-analog converter as an offset adjustment voltage; a control means for controlling the range switching circuit to select the range; and data that selectively takes in only a predetermined bit of data from among a plurality of pits of data provided from the data bus and leads it to the digital-to-analog converter. a selector, and a binary setting signal given from the data bus enables range setting, gain and offset adjustment, and setting of input data to the digital-to-analog converter. It is something to do.

[Example] .

The present invention will be described in detail below using the drawings. FIG. 1 is a block diagram showing an embodiment of the present invention. In the same figure, 2
1 is a data bus, 22 is a data selector, 23.24 is N1 and a second storage circuit, which is usually RAM (rand
om access memory) is used. 2
5 is a 16-bit D/A converter, 26, 27 is an 8-pit D/A converter, 26 is a gain adjustment D/A converter,
27 is a D/A converter for offset adjustment. Reference numeral 28 indicates a resistor voltage divider circuit, and 29 indicates a switch control circuit.

Data bus 21 is 19 bit data (Do~D, 8)
The data is guided to a switch control circuit 29, a RAM 23-24, and a data selector 22 through a path for transferring the data.

The switch control circuit 29 is a control means that receives the upper three pits (0+e, O+7, O+e) of the data bus and drives the switch 3 according to the data. The D/A converter 26 receives 8-bit data output from the RAM 23 (this data is held until the next data is read out).

) is D/A converted, and its output is given to the D/A converter 25 as a gain control voltage V9.

The D/A converter 27 converts the 8-bit data output from the RAM 24 (this data is held until the next data is read) into an analog format, and outputs the offset adjustment voltage Vorr. as D/A converter 2
given to 5.

The data selector 22 selects data to be D/A converted from among the data supplied from the data bus and inputs it to the D/A converter 25.

The resistor voltage divider circuit 28 is composed of resistors R+ to R4 connected in series, and here R1-5 is Ω. R2=2.
5 to Ω, R3=1.25 to Ω.

Ra = 1.25Ω, and a tap (
T+~Ta) is output and connected to switch 3, so that a 2n-fold partial voltage can be generated.

A portion consisting of this resistance voltage divider circuit 28 and switch 3 constitutes a range switching circuit.

The operation in such a configuration will be explained next.

■The operation of converting the 16-bit data given to the D/A converter 25 into an analog signal, and outputting the analog signal after dividing the voltage appropriately by the voltage dividing circuit through the buffer amplifier 4 is the same as the conventional operation. be.

Note that the 16-bit data is the lower 16-bit data (Do - D + 5') of the 19 bits on the bus 21.
It is.

(2) On the other hand, the offset voltage depending on the 16-bit D'/A conversion and the amplifier 4 is calibrated by the D/A converter 27. That is, for example, the input of the D/A converter 25 is set as zero input, and the output of the amplifier 4 is monitored.
The data given to the D/A converter 24 is adjusted so that the output of the D/A converter 24 becomes zero. This data is transferred to RAM2 via bus 21.
The same value is held in the RAM 24 unless the calibration data is updated, and a semi-fixed offset adjustment voltage is maintained.

■Resistor R1 of 16-bit D/A conversion and voltage divider circuit 28
The gain error determined by ~R4 is calibrated by the D/A converter 26. Appropriate input data is given to the D/A converter 25, and the output of the amplifier 4 is monitored and calibrated.

The calibration data obtained in this way is held in the RAM 23.

(2) The data DI6-Die of the upper three bits among the 19 bits from the bus 21 are guided as a range signal to the switch controller 1-roll circuit 29, which is a control means of the range switching circuit.

The mode is divided into the following modes depending on the value of the 3-bit data Dos to Die.

J) When D+s to DI8 are all O, tap T+ of voltage divider circuit 28 is selected by switch 3,
At the same time, data in the RAM 24 is output.

At this time, DO to DI5 are set in the D/A converter 25.

If JT>D+s=1, D+7=D+8=O, the switch 3 selects T3, and the calibration data according to that range is set in the RAM. At this time, Do=D+s is set in the D/A conversion @25.

I[I)D+e=DI? =1, D+e =O
If so, the switch 3 selects T2, and at the same time, the calibration data is set from the RAM. At this time, the D/A converter 25
is set to D+”D+s.

IV) If D+s = DI 7 = DI 8 =1, the switch 3 selects T, and at the same time, calibration data is set from the RAM. At this time, the D/A converter 25 has D.
2 to D1□ are set.

As the above-described operations are performed, the switch and D/A conversion settings, as well as the gain and offset adjustment, can be performed in auto-range according to the binary setting signal.

Note that the number of ranges is not limited as long as the number is 2n times larger.

Further, the range switching means, that is, the voltage dividing circuit 28 and the switch 3 may be, for example, an amplifier having a non-inverting gain.

Further, the range does not have to be 2n times, but may be (2n)''. Also, if the data is In, the range may be (, n times or <ten>m).

As described above, according to the present invention, auto-ranging D/Δ conversion can be realized by setting the range to be binary and storing the configuration data in the RAM. In addition, automation of adjustment can contribute to reduction of man-hours, reduction of high-precision parts, etc., and the effect is significant in practical use.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a D/A converter according to the present invention, and FIG. 2 is a block diagram showing an example of a conventional D/A converter. 3...Switch, 4...Amplifier, 21...Data bus, 22...Data selector, 23.24...R
AM, '25.26.27...D/A converter, 28.
...Voltage divider circuit, 29...Switch control circuit.

Claims (1)

[Claims] A digital-to-analog converter whose gain and offset can be controlled by an external voltage converts the given digital data into an analog signal, and this analog signal is divided into multiple ranges by a range switching circuit and output in the desired range. (8) a first storage circuit for storing gain control voltage data for the digital-to-analog converter supplied from the data bus; a second storage circuit for storing offset adjustment voltage data applied to the digital-to-analog converter; and converting the output of the first storage circuit to an analog signal and transmitting the same to the digital-to-analog converter. a digital-to-analog converter for gain adjustment, which is applied as a gain control voltage; and a digital-to-analog converter for offset adjustment, which converts the output of the second storage circuit into an analog signal and provides this to the digital-to-analog converter as an offset adjustment voltage. a control means for controlling the range switching circuit to select the range in accordance with a range setting digital signal given from the data bus; It is equipped with a data selector that selectively takes in bit data and guides it to the digital-to-analog converter, and uses a binary setting signal given from the data bus to perform range setting, gain and offset adjustment, and the digital/analog converter. A digital-to-analog conversion device with an auto-range function, characterized in that input data to an analog converter can be set.