JPS60235213A - Detection for abnormality of digital control system - Google Patents

Detection for abnormality of digital control system

Info

Publication number
JPS60235213A
JPS60235213A JP59090905A JP9090584A JPS60235213A JP S60235213 A JPS60235213 A JP S60235213A JP 59090905 A JP59090905 A JP 59090905A JP 9090584 A JP9090584 A JP 9090584A JP S60235213 A JPS60235213 A JP S60235213A
Authority
JP
Japan
Prior art keywords
data
abnormality
switch
digital control
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59090905A
Other languages
Japanese (ja)
Inventor
Yasuo Tasaka
田坂 靖夫
Tadashi Satono
里野 正
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP59090905A priority Critical patent/JPS60235213A/en
Publication of JPS60235213A publication Critical patent/JPS60235213A/en
Pending legal-status Critical Current

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  • Testing And Monitoring For Control Systems (AREA)

Abstract

PURPOSE:To find the abnormality in the early stage by judging input data to be abnormal if the difference between preceding input data and current input data of a digital control system exceeds a set value. CONSTITUTION:When a switch S1 is closed to take in data, a comparing circuit 2 compares preceding data in memory 1 with current data; and if the difference is within the set value, a switch S3 is closed to input current data to a PID arithmetic circuit 3. The switch S3 is opened, and the switch S2 is closed, and current data is stored in the memory 1 to prepare for the next sampling. If said difference exceeds the set value, data is not to the PID arithmetic circuit 3 by interlocking. Thus, the abnormality of input data is found in the early stage, and the abnormal control based on abnormal data is prevented.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は、ディジタル制御系の入力データの異常を検出
する方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a method for detecting an abnormality in input data of a digital control system.

〔発明の背景〕[Background of the invention]

一定間隔でデータを入力し、該テ゛−夕を利用して操作
量を演算し、該操作量によりプロセスを操作するディジ
タル制御系はよく知られている。例えば、昭和45年1
0月20日に株式会社コロナ社より発行された「ディジ
タルプロセス制御」にも明らかである。
2. Description of the Related Art Digital control systems are well known in which data is input at regular intervals, a manipulated variable is calculated using the data, and a process is operated using the manipulated variable. For example, 1971
This is also clear in ``Digital Process Control'' published by Corona Co., Ltd. on October 20th.

さて、このようなディジタル制御系は、大部分がPID
(比例+積分十微分)制御であり、この場合の制御式の
一例は、上記刊行物の84頁〜87頁に示されている。
Now, most of these digital control systems are PID
(proportional+integral-sufficient differential) control, and an example of the control formula in this case is shown on pages 84 to 87 of the above publication.

すなわち、 △Po=Kp (Xn−+ X、、) +に+ (Ro
−Xn)+I(D(2Xo−1−Xn−2)・・・・・
・・・・(1)ここで、△Pn:全n:今回サンプリン
グ時る操作端の修正量 KP−比例ゲイン に1:積分ゲイン KD:微分ゲイン X、、:今回サンプリングデータ X、、:前回サンプリングデータ X、2:前々回すンプリングデータ Ro:目標値 (11式から明らかなように、操作端の修正量へP、は
、サンプリングデータX。の大幅な変動、特に前回のデ
ータに比較した場合の大幅な変動によって太きく影響さ
れる。
That is, △Po=Kp (Xn-+ X,,) + to + (Ro
-Xn)+I(D(2Xo-1-Xn-2)...
...(1) Here, △Pn: Total n: Correction amount KP of the operating end during current sampling - Proportional gain 1: Integral gain KD: Differential gain X, ,: Current sampling data X, ,: Previous Sampling data It is strongly influenced by large fluctuations in

正常なデータが入力されている場合には問題はないが、
例えば信号系統の断線等によって急激に測定値が減少し
たような場合、操作修正量△Poは異常に大きいものと
なり、プロセスに悪影響を与え運転不能になる可能性が
ある。
There is no problem if the correct data is entered, but
For example, in the case where the measured value suddenly decreases due to a break in the signal system, etc., the operation correction amount ΔPo becomes abnormally large, which may adversely affect the process and make it impossible to operate.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、入力データの異常を早期に発見し、異
常データによる制御を防止するのに好適なディジタル制
御系の異常検出方法を提供することである。
SUMMARY OF THE INVENTION An object of the present invention is to provide a method for detecting abnormalities in a digital control system suitable for early detection of abnormalities in input data and preventing control based on abnormal data.

〔発明の概要〕[Summary of the invention]

本発明は、前回入力したテ゛−夕と今回入力したデータ
との差が設定した値を越えた場合に入力データを異常と
判定することを特徴とする。
The present invention is characterized in that the input data is determined to be abnormal if the difference between the data input last time and the data input this time exceeds a set value.

〔発明の実施例〕 以下本発明の一実施例を説明する。[Embodiments of the invention] An embodiment of the present invention will be described below.

第1図において、Slはディジタル制御のサンプリング
毎に開閉するスイッチである。メモリ1はスイッチS2
を閉とすることによりその時のデータを保持する機能を
有する。
In FIG. 1, Sl is a switch that opens and closes every digitally controlled sampling. Memory 1 is switch S2
It has the function of retaining the data at that time by closing it.

まずSlが閉じてデータがとり込まれると比較回路2が
メモリ1にある前回のデータと今回のデータを比較して
その差が設定値以内であればS3を閉じてPID演算回
路3に入力したデータを入力する。その後S3を開きS
2を閉じて現在のデータをメモリ1に記憶し次回のサン
プリングに備える。
First, when Sl is closed and data is taken in, comparison circuit 2 compares the previous data in memory 1 with the current data, and if the difference is within the set value, closes S3 and inputs it to PID calculation circuit 3. Enter data. Then open S3 and S
2 and store the current data in memory 1 in preparation for the next sampling.

一方、前回データと比較した時にその差が設定値よりも
大きかった場合、PID演算回路3にデータを送らない
ようにインターロックする。なお、この場合には図示し
ていないアラーム回路などにより警報を発することもで
きる。
On the other hand, if the difference with the previous data is larger than the set value, an interlock is performed to prevent data from being sent to the PID calculation circuit 3. In this case, an alarm can also be issued by an alarm circuit (not shown).

前回データと今回データとの許容差は、サンプリングの
周期とプロセスの応答時間により決定される。すなわち
そのサンプリング間隔では変化不可能でかつなるべくか
さな値にセットすればよい。
The tolerance between the previous data and the current data is determined by the sampling period and the response time of the process. That is, it should be set to a value that cannot be changed within that sampling interval and is as bulky as possible.

また本実施例はスイッチ又は回路で説明したが実際には
マイクロコンピュータ−のソフトウェア−として使用す
るのが実用的である。
Although this embodiment has been described using a switch or a circuit, it is actually more practical to use it as software for a microcomputer.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、入力データの異常
を早期暑こ発見することができるので、異常データに基
づく異常な制御を防止することかできる。
As described above, according to the present invention, an abnormality in input data can be detected early, so that abnormal control based on abnormal data can be prevented.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例である。 FIG. 1 shows an embodiment of the present invention.

Claims (1)

【特許請求の範囲】[Claims] 1一定間隔でデータを入力し、該データを利用して操作
負を演算し、該操作量によりプロセスを操作するディジ
タル制御系において、前回入力した該データと今回入力
した該データとの差が設定した値を越えた場合に入カテ
゛−夕の異常を検出することを特徴とするディジタル制
御系の異常検出方法。
1. In a digital control system that inputs data at regular intervals, uses the data to calculate a negative operation, and operates the process using the operation amount, the difference between the data input last time and the data input this time is set. A method for detecting an abnormality in a digital control system, characterized by detecting an abnormality in an input catenary when a certain value is exceeded.
JP59090905A 1984-05-09 1984-05-09 Detection for abnormality of digital control system Pending JPS60235213A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59090905A JPS60235213A (en) 1984-05-09 1984-05-09 Detection for abnormality of digital control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59090905A JPS60235213A (en) 1984-05-09 1984-05-09 Detection for abnormality of digital control system

Publications (1)

Publication Number Publication Date
JPS60235213A true JPS60235213A (en) 1985-11-21

Family

ID=14011416

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59090905A Pending JPS60235213A (en) 1984-05-09 1984-05-09 Detection for abnormality of digital control system

Country Status (1)

Country Link
JP (1) JPS60235213A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57120101A (en) * 1981-01-16 1982-07-27 Fuji Electric Co Ltd Process control system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57120101A (en) * 1981-01-16 1982-07-27 Fuji Electric Co Ltd Process control system

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