JPS60231285A - Communication method with memory card - Google Patents

Communication method with memory card

Info

Publication number
JPS60231285A
JPS60231285A JP59088961A JP8896184A JPS60231285A JP S60231285 A JPS60231285 A JP S60231285A JP 59088961 A JP59088961 A JP 59088961A JP 8896184 A JP8896184 A JP 8896184A JP S60231285 A JPS60231285 A JP S60231285A
Authority
JP
Japan
Prior art keywords
data
memory card
parallel
bit
communication
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59088961A
Other languages
Japanese (ja)
Inventor
Seiki Miyahara
清貴 宮原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP59088961A priority Critical patent/JPS60231285A/en
Publication of JPS60231285A publication Critical patent/JPS60231285A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To change a parallel/serial conversion format every data communication and to prevent communication data from being stolen or a memory card from data leakage or alteration by sending data for fixing the parallel/serial conversion format from a memory card in every data communication of an external apparatus with the memory card. CONSTITUTION:At the data communication with the external apparatus 9, the memory 7 transmits the number of three digits using random numbers. When the number is ''622'' for instance, the transmission side replaces the bit D6 of data 10 by the bit D2 by the upper two digits of ''622'' to convert the data 10 into data ''a11'', the data ''a11'' are shifted to the right direction twice by the lower one digit of ''622'' to convert the data ''a11'' into data ''b12'' and the bits D6-D1 are transmitted serially and successively. On the other hand, the receiving side receives the bits D6-D1 successively and serially to convert the obtained bits into parallel data ''b12'', shifts the data ''b12'' to the left direction twice to convert the data ''b12'' into data ''a11'' and replaces the bit D6 by the bit D2 to obtain the data 10 as normalized data. If data are to be transmitted/received again after the end of transmission/reception, the data are transmitted from the memory card 7, so that it is difficult to find out the serial/parallel conversion format and the memory card can be prevented from illegal use.

Description

【発明の詳細な説明】 〔技術分野〕 本発明は、メモリカードにおけるデータ通信方法に関す
る。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a data communication method in a memory card.

〔従来技術〕[Prior art]

近年、個人、団体あるいは個体等全識別する目的で、メ
モリ及びデータ処理用半導体集積回路(以下ICと略す
)を内蔵し、外部機器と通信するための入出力端子を有
するメモリカードが使用されつつある。また、前記メモ
リカードは、前記入出力端子eiミラなくするために、
データ処理用ICにてパラレル−シリアル変換を行なっ
て後にシリアルにて外部機器との通信を行なっている。
In recent years, memory cards with built-in memory and data processing semiconductor integrated circuits (hereinafter referred to as ICs) and input/output terminals for communicating with external devices have been used for the purpose of identifying individuals, groups, or individuals. be. In addition, in order to eliminate the input/output terminals of the memory card,
A data processing IC performs parallel-to-serial conversion, and then serial communication is performed with external equipment.

しかし、前記パラレル−シリアル変換は常に同じ形式に
て行なわれ、更にはシリアル通信もプロトコルも常に同
じであるため、変換方式や通信プロトコルが容易に見い
出され、データを故意に変更さnやすい欠点を有してい
る。
However, since the parallel-to-serial conversion is always performed in the same format, and furthermore, the serial communication and protocol are always the same, the conversion method and communication protocol can be easily found, and data can easily be changed intentionally. have.

〔目的〕〔the purpose〕

本発明の目的は、容易にはメモリ内容の変更や読出しが
できない通信方法を提供するものである。
An object of the present invention is to provide a communication method in which memory contents cannot be easily changed or read.

〔概要〕〔overview〕

メモリの読出し、書き込み及びデータ処理を行ない得る
工ay内蔵し、入出力端子を有するメモリカードとの通
信において、まずパラレルーンリアル変換の形式kfめ
るためりデータ全メモリヵ−ドが送信し、以後の通信は
、前記データに基づくパラレル−シリ、゛アル変換によ
り、シリアル通信を行なうこと。
When communicating with a memory card that has a built-in device that can read, write, and process data from memory and has input/output terminals, the memory card first sends all data in the form of parallel run real conversion, and then Serial communication is performed by parallel-to-serial conversion based on the data.

〔実施例〕〔Example〕

図を参照しながら本発明の実施例について述べる。第1
図は、メモリカードと外部機器との通信時のブロック図
の例であり、メモリカード7はメモリ4とメモリ4を読
み出し省き込み及びデータ処理用IC3を内蔵し更には
外部機器9との通信用として入力端子1と出力端子2を
有し、外部機器?とけケーブル8にて接続されている。
Embodiments of the present invention will be described with reference to the drawings. 1st
The figure is an example of a block diagram during communication between a memory card and an external device, and the memory card 7 has a built-in memory 4 and an IC 3 for reading and writing the memory 4 and data processing, and is also used for communication with an external device 9. It has input terminal 1 and output terminal 2 as an external device? It is connected by a melting cable 8.

工C5けメモリ4に対して、データバス5及びアドレス
バスとメモリ制御用信号線6を用いて読出し、書き込み
を行なう。
A data bus 5, an address bus, and a memory control signal line 6 are used to read and write data to and from the memory 4 of the C5.

第2図は、本発明の1実施例におけるパラレル−7リア
ル変換の1例であり、1データtri8ビツトから故っ
ている。メモリカード7は外部機器9とデータの通信を
行なうに際し、まず畢初に乱数による6桁の数を送信す
る。この3桁の数の1例を622とすると、以後の通信
においては、送信側は、622の上位2桁によりデータ
10を矢印20.21に示すようにビット馬とビットD
tヲ交換しデータa11に変換して後、622の下位1
桁により矢印22,25,24,25,26゜27.2
8.29が示すように右方向へ2度シフトしデータb1
2に変換し、1.16から順にIJ、までシリアルに送
信する。一方受信側は、シリアルにて11.から順にり
、まで受取るとパラレルデータb12へ変換した後左方
向へ2度ソフトしデータa11に変換した後、ビットD
、とビットD2 k変換しデータ10′ff:正親デー
タとして得る。一度送信を終了し、再びデータの送受信
ヲ肴なう時には、新たに5桁の数をまず、メモリカード
7から送信することにより、送受信データの盗用や外部
機器におけるシリアル−パラレル変換形式が見い出し難
いことより、メモリカードの悪用を防止できる。
FIG. 2 is an example of parallel-to-7 real conversion in one embodiment of the present invention, and is based on one data tri8 bit. When the memory card 7 communicates data with the external device 9, it first transmits a six-digit random number. Assuming that an example of this three-digit number is 622, in subsequent communications, the transmitting side uses the upper two digits of 622 to transmit data 10 to bit horse and bit D as shown by arrows 20 and 21.
After exchanging t and converting to data a11, the lower 1 of 622
Arrows 22, 25, 24, 25, 26° 27.2 depending on the girder
As shown in 8.29, the data b1 is shifted to the right by 2 degrees.
2 and serially transmits from 1.16 to IJ. On the other hand, the receiving side receives 11. When received in order from 1 to 2, it is converted to parallel data b12, then softened twice to the left, converted to data a11, and then bit D
, and bit D2 k is converted to obtain data 10'ff: direct parent data. Once transmission has been completed, when data is to be transmitted and received again, a new 5-digit number is first transmitted from the memory card 7, making it difficult to steal the transmitted and received data and to detect serial-to-parallel conversion formats in external devices. As a result, misuse of the memory card can be prevented.

〔効果〕〔effect〕

外部機器がメモリカードとデータ通信を行なう 毎にパ
ラレル−フリアル変換形式’t−?めるデータを、メモ
リカードが送るため、データ通信を行なう度にパラレル
−シリアル書換形式が異なり、通信データの盗用やメモ
リカードのデータの漏洩や改ざんを防ぐことができる。
Every time an external device performs data communication with the memory card, the parallel-to-free conversion format 't-? Since the memory card sends the data stored in the memory card, the parallel-serial rewriting format is different each time data communication is performed, and it is possible to prevent theft of communication data and leakage or falsification of data on the memory card.

【図面の簡単な説明】[Brief explanation of the drawing]

筺1図は、メモリカードと外部機構との通信時のブロッ
ク図であり、第2図は本発明の1実施例におけるパラレ
ル−シリアル変換の1例である。 1け入力端子、2け出力端子、3け工C14はメモリ、
5はデータバス、6はアドレスノ(スとメモリ、5けデ
ータノくス、6はアドレスノくスとメモリ制御用信号線
、7はメモリカード、8はケーブル、9け外部機構、1
0はデータ、11はデータa、12Uデータb、20,
21.22,25゜24.25,26,27.28.2
9は矢印である。 以 上 出願人 株式会社諏訪精工舎 代理人 弁理士最上 務 累2昌
Figure 1 is a block diagram during communication between the memory card and an external mechanism, and Figure 2 is an example of parallel-to-serial conversion in one embodiment of the present invention. 1-digit input terminal, 2-digit output terminal, 3-digit terminal C14 is memory,
5 is a data bus, 6 is an address node and memory, 5 is a data node, 6 is an address node and a memory control signal line, 7 is a memory card, 8 is a cable, 9 is an external mechanism, 1
0 is data, 11 is data a, 12U data b, 20,
21.22, 25° 24.25, 26, 27.28.2
9 is an arrow. Applicant: Suwa Seikosha Co., Ltd. Agent: Patent Attorney Tsutomu Mutsumasa Mogami

Claims (1)

【特許請求の範囲】[Claims] メモリの読出し、書込み及びデータ処理を行ない得る半
導体集積回路全内蔵するとともに、入出力端子を有する
メモリカードとのデータ通信において、まず帰初にパラ
レル−シリアル変換の形式を足めるデータ全メモリカー
ドより外部へ送信し、以後前記形式において読出し、書
込みモードの指示やデータを受信もしくは送信すること
を特徴とするメモリカードとの通信方法。
A full-data memory card that has a built-in semiconductor integrated circuit that can read, write, and process data from memory, and that can first add a parallel-to-serial conversion format in data communication with a memory card that has input/output terminals. 1. A method of communicating with a memory card, the method comprising: transmitting the data to the outside, and thereafter receiving or transmitting read/write mode instructions and data in the above format.
JP59088961A 1984-05-02 1984-05-02 Communication method with memory card Pending JPS60231285A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59088961A JPS60231285A (en) 1984-05-02 1984-05-02 Communication method with memory card

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59088961A JPS60231285A (en) 1984-05-02 1984-05-02 Communication method with memory card

Publications (1)

Publication Number Publication Date
JPS60231285A true JPS60231285A (en) 1985-11-16

Family

ID=13957425

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59088961A Pending JPS60231285A (en) 1984-05-02 1984-05-02 Communication method with memory card

Country Status (1)

Country Link
JP (1) JPS60231285A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63180187A (en) * 1987-01-22 1988-07-25 Canon Inc Ic card device
WO2000007142A1 (en) * 1998-07-29 2000-02-10 Infineon Technologies Ag Clocked integrated semiconductor circuit and method for operating the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63180187A (en) * 1987-01-22 1988-07-25 Canon Inc Ic card device
WO2000007142A1 (en) * 1998-07-29 2000-02-10 Infineon Technologies Ag Clocked integrated semiconductor circuit and method for operating the same
US6864730B2 (en) 1998-07-29 2005-03-08 Infineon Technologies Ag Clocked integrated semiconductor circuit and method for operating such a circuit

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