JPS60229766A - Output control system of interpolation dot pattern - Google Patents

Abstract

PURPOSE:To make the enlargement of the output performance of character pattern possible, by a method wherein the correspondence of the write start position of the character pattern dot by dot interpolation to the write boundary of image memory is taken in a dot matrix printer. CONSTITUTION:The interpolation dot of a coordinate point following the main and sub scanning directional dot interpolation addresses expressed by (x), (y) components from interpolation dot address generation means 31-49, is generated by an interpolation dot generation means, and this information is stored in a shift resister 60 by a bit length corresponding to the write width of image memory in which the character pattern processed by dot interpolation is developed. Further, an off-set value in a bit range corresponding to the write width of image memory prior to the write of interpolation dot of each main scanning is selectively generated by a means 29 and written in the resister 60. The correspondence of the write start position to the image memory write boundary is taken. Thus, the treating of image data of each deformed character becomes easy.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an interpolation dot/mother turn output control system used in document creation devices, character output devices, etc. that handle character 7-ont information in a dot matrix structure.

[Technical background of the invention and its problems]

Document creation device environment, specified dot matrix) When providing a device that handles character fonts with an IJx structure with a function that can enlarge or reduce characters in a specified dot matrix structure with a magnification of 7 onts, conventional Now, the first
As shown in Figures (a) and (b), the so-called J! A pure scaling method was used.

Such conventional enlarging/reducing means can be realized relatively easily and inexpensively, but the output shape may not be the original expression, for example, the step-like formation (constriction) in the shaded area is noticeable. This has the disadvantage that the character form deviates from the intended character form, resulting in an unnatural character expression that is difficult to recognize.

In addition, in the conventional dot interpolation means as described above, a modified font in which the main turn of the original character, or a character/main turn with an arbitrary enlargement/reduction magnification is slanted or rotated at an arbitrary angle. If this cannot be obtained easily, and even if the range of transformation is greatly restricted, the converted characters/turns will be distorted, the conversion accuracy will be greatly reduced, and the fidelity will be reduced. There was an inconvenience that it was not possible to perform a high turn conversion.

Also, for deformed characters such as inverted characters and italic characters as described above, the character width and/or height of the dot-interpolated character.

The dot configuration is not always in byte units, and for this reason, between the image memory and the image memory that writes in byte units, the scan start position device for characters and turns newly generated by dot interpolation is This does not match the byte boundaries on the memory side, causing inconvenience in handling image data in character units. Furthermore, in the past, the character image after dot interpolation was fixedly developed at the position corresponding to the scan, so for example, ruby characters, half-width characters, etc. to be printed out could be moved up and down by several dots. There was the inconvenience of not being able to respond to requests such as requests.

[Purpose of the invention]

The present invention has been made in view of the above circumstances, and uses high-precision dot interpolation to convert original character fonts to arbitrary enlargement/reduction ratios.
When a character is deformed according to an angle, etc., the writing start position of a character/lead dot generated by dot interpolation can always correspond to the memory boundary of the image memory, thereby facilitating the handling of image data in units of deformed characters. It is an object of the present invention to provide an output control system for interpolated dots and turns so that any character can be moved within the writing width of an image memory.

[Summary of the invention]

The present invention provides interpolated driver information that is generated based on a dot interpolation address in the main scanning direction expressed by an X component and an X component, and a dot interpolation address in the sub scanning direction also expressed by an X component and an X component. is stored in a shift register with a bit length corresponding to the writing width of the image memory in which the character/mother turn subjected to the dot interpolation processing is developed, and the above-mentioned The offset data generation means selectively generates an offset value within a bit range corresponding to the write width of the image memory and writes it into the shift register, thereby determining the write start position of a character/mother turn dot generated (by dot interpolation). K so that the correspondence between the font and the write boundary of the image memory can be taken. From this K, when the original character font is transformed according to arbitrary scaling factor, angle, etc. using high-precision dot interpolation, the dot The writing start position of characters/pattern dots generated by interpolation can always be matched with the memory boundary of the image memory, making it easy to handle image data for each transformed character, and writing arbitrary characters to the image memory. Since it can be moved within the width range, dot-interpolated characters and
You can expand the output function of turns.

[Embodiments of the invention]

Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

Figure 2 is a circuit showing an embodiment of the present invention! It is a lock diagram. In the figure, 10 is a CPU that controls the entire system;
is the main memory (MM), and 12 is the CPU path. No. 3 is the display control circuit (CRT-C), No. 4 Fi frame memory (FM), J5U motherboard serial conversion circuit,
16 is a CRT display section, 7 is a print control section, 18 is a line buffer, and 19 is a serial read and a toglinter.

Width in the sub-scanning direction after conversion (main-scanning interval x number of times) K equivalent size (Vsiz
22 is a register representing the size (Hsize) corresponding to the width in the main scanning direction. 2
3 is underlined with a length according to the contents of the register 21 above,
Generate dots and mother turns on the side lines, line buffer 18
This is an underline/sideline control section to write to. Reference numeral 24 denotes a trigonometric function table that stores angle information (trigonometric function data) corresponding to specified angles for slanting, rotating, etc. characters. 25 is...
This is a zone designation zone designator for dividing characters and turns after conversion processing that exceed the standard character height during f-turn conversion into zones based on the standard character height. 26 and 27 are dot increments (dx
.

dy), and 28 is an offset register for selectively giving an offset in the range of 0 to 7 dots to the pattern-converted characters. This is an offset data generation unit that generates 0″) representing a display.

3 to 49 constitute constituent elements for generating dot interpolation addresses, and 131 is a register for storing the dot increment width (DXI) in the sub-scanning direction including the X component;
32 is the dot step width in the main scanning direction including the X component (DX2
), 33 is an initial value in the main scanning direction including the X component (initial address; X 11nit)
The register 34 stores the dot increment width (DYI) in the sub-scanning direction including the X component.
These registers store the main scanning direction P and /) step size (DY2) including the component, and the register stores the initial value (initial address: Ylinlt) in the sub-scanning direction including the 36-digit X component. The dot interpolation addresses stored in each of the registers 31 to 36VC are composed of integer part data and decimal part data.

37 is an adder circuit (ADD-A,) for adding the contents of the register 3 and the contents of the register 42 indicating the dot position in the sub-scanning direction including the X component; 3B is the register 3;
2 and the contents of the register 44 indicating the dot position in the main scanning direction including the X component (ADD-B).
), 39 is an adder circuit (ADD-C) for adding the contents of the register 34 and the contents of the register 46 indicating the dot position in the sub-scanning direction including the X component; +40 is the register 3;
5 and the contents of the register 48 indicating the dot position in the main scanning direction including the X component (ADD-D).
).

4 selects the contents of the register 33 at the start of dot interpolation processing for one character, and thereafter selects the output of the adder circuit 37 every time - times of main scanning;
2 is a new dot ('
43 #'i is a data selector that selects the contents of the register 42 at the start of main scanning and thereafter selects the output of the adder 38 for each interpolation process for one dot; 44 is a data selector 43 that stores addresses; A new dot address at the time of dot interpolation including the selected X component is stored. 45 is an r-ta selector which selects the contents of the above-mentioned register 36 at the start of dot interpolation processing for one character, and thereafter selects the output of the adder circuit 39 every time - times of main scanning; 46 is a data selector; A register 47 stores a new dot address at the time of dot interpolation, which is expressed by an integer part and a decimal part including the X component selected by the selector 45. The register 47 selects the contents of the register 46 at the start of main scanning, and thereafter stores one dot address. A data selector 48 selects the output of the adder circuit 40 for each interpolation process, and a register 48 stores a new dot address during dot interpolation that includes the X component selected by the data selector 47. 49 is a selection control circuit (S) that controls each data selector 41, 43, 45, 47.
C).

50 is a comparison value for comparison with an interpolation value to be described later;
That is, it is a register that stores a threshold value (th).

5 is a predetermined dot matrix unit (16X1) containing kanji.
6 dots) characters, kanji with mother turn data stored,
Turn memory (KPM).

Reference numeral 52 denotes a single character buffer composed of a high-speed RAMK that stores dot patterns for one character read out from the kanji/main turn memory 51. Off dot ("o")
It is memorized by filling in bits and turns. 53 is 1
This is a bit selection circuit that selectively outputs dot information of four points in one grid surrounding a new dot according to the values of each integer part of registers 44 and 48 among the character/turn data stored in the character buffer 52. . 54 is a bit selection circuit 53
This is a register that stores 4-bit information output from the register.

55 to 57Vi A dot controller that recognizes the pattern of dot information output from the bit selection circuit 53 and selectively switches and controls the interpolated value of a new dot surrounded by four dots.
It is a component of the e-turn recognition unit (DSP), and is
5 is the 4-point dot 74' from the bit contents of register 54.
56 is a discrimination control circuit which recognizes the turn state fg and controls the bit selection circuit 53 to sequentially select dot information for two specific grids surrounding the specific dot pattern fg when the state is a specific dot pattern state to be described later. A register 57 stores the 4-bit information read out under the control of the discrimination control circuit 55, and stores it in accordance with the dot/mother-turn state of the dot information of 2 grids read out under the control of the discrimination control circuit 55 and the dot information of the register 540. This is a dot discrimination circuit that outputs a 1-pit interpolation value switching selection signal.

58 is the value of the decimal part stored in the register 44 (the main scanning direction offset value including the 5-bit X component) and the register 5
4 points of dot information stored in 4 and dot discrimination circuit 57
This is an interpolation table ROM that outputs an interpolated value (Qxy) of a new dot in the pressure area surrounded by the four dot information, using as input information a 1-bit interpolated value switching selection signal outputted from the above-mentioned dot information. , here 256 bits (32
A mask ROM of 8 bits) is used to output an 8-bit (0 to 255 level) interpolated value in accordance with the 15-bit read address described above.

Reference numeral 59 is a compiler that compares the interpolated value output from the interpolation table ROM 5B with the threshold value stored in the register 50, and when the interpolated value exceeds the comparison value, that is, the dark value, it 60 outputs a signal of "1# level" indicating the dot information outputted by the controller 59, and stores the dot information outputted by the controller 59 in memory write bit units (in this case, 8 bits) in which one character/mother turn is developed. This is a shift register that outputs onto the CPU path 12 every K (unit: K).

3 to 11 are diagrams for explaining the operation of the above-mentioned embodiment, respectively.

Figures 3(,) to (f) each show dot information () for four points in one grid surrounding a new dot generated by interpolation processing.
This is a diagram showing the relationship between the level classification of interpolated values set in the interpolation table ROM 58 and the table type. Here, the interpolated value is expressed in brightness (brightness level) in 255 steps from O to 255, and the classification is A part of the area is shown in equal high-level.

, Figure 4 shows one of the four dot patterns in one grid.
This is just to explain an example of switching the table type when only the dot is on (“1”) or off (“0”).The dot pattern recognition unit (DSP)
Dot no Dora) (DO.

When only one point among DI, D2, DJ) is off, that is, 0'' (D□ shown in white in the figure), the specific driver) (Da) of the surrounding grid is further set.

Recognize the or-off state of Db), Da, Db="l
', select a corner type table (T) as shown in Fig. 3(d) K, and if at least either Da or Db is 0'', select Fig. 3(f). Select a diagonal type table (l for T) as shown in K. In this way, the interpolated value of a new dot located within the 4-point dot area is of·
When making a mother turn, it is further determined by the state of the surrounding dots.

Figures 5 (,) to (d) show various examples of turn conversion. body.

Figure (b) is italic 1 Figure (c) is bottom aligned italic 1 Figure (
d) each shows a rotating body.

Figures 6 (a) and (b) explain the relationship between the output target of dot interpolation processing, that is, the image output target, and the main scanning direction (Sm) and sub-scanning direction (Ss) during dot interpolation. This is a diagram showing the main scanning and sub-scanning directions during dot interpolation during CRT display.
Figure (b) shows the main scanning and sub-scanning directions during dot interpolation during glint-out. In this manner, the main scanning direction and the sub-scanning direction are switched between the dot interpolation processing when the CRT display is turned on and the dot interpolation processing when f-lintout is performed.

FIG. 7 is a diagram showing correspondence relationships between various setting data;

FIG. 8 is a diagram showing the relationship between a character pattern-converted by dot interpolation processing and a rectangle (including a square) circumscribing the character.

FIG. 9 is a diagram showing examples of character pitch (CP) and line pitch (LP) settings for various modified characters.

FIG. 10 is a diagram showing an example of development of underlines for various modified characters VC.

FIG. 11 is a diagram for explaining the zone designation operation.

Here, the operation of one embodiment will be explained. During dot interpolation, the CPU lO initializes various registers according to dot interpolation designation information input from the outside.

That is, the CPU 10 stores the interpolation table ROM 5B.
After setting a comparison value, ie, a threshold (th), in the register 50 for comparison with the interpolated value generated by
, dy ; reciprocal value of the scaling factor), set this in register 26.27VC, and when changing, rotating, or italicizing, calculate the trigonometric function data (sin
+ CM + r jall ) as trigonometric function table 24
Set Ti. After that, these registers 26 and 27 degrees and the setting rotor of the trigonometric function table 24 are performed.

An initial value (initial address; X1j) for generating a dot interpolation address based on
nlt, Ylinit), and dot step width (DXl
, D.Y.I.

DX2. DY2) and set these data in registers 3 to 3611C, the V size and H size data (Vsize, Hs
ize) and set this data in the registers 21 and 22VC. Then, when zoning occurs, the number of zones is calculated and this data is set in the register 25.

Furthermore, when moving dot-interpolated characters within the range of 1 to 7 dots when outputting them (for example, dot-interpolated ruby characters, half-width characters, etc., when glint-out, VC1
(e.g., when moving up and down within a range of ~7 dots and gts), or - The number of dots in the main scanning direction of the character converted to the main turn is
It is not a multiple of the write width (8 dots) of the image memory that is the output target, and the byte boundary on the image memory side (
If it is necessary to match the writing width),
An offset value is set within the range of VC1 to 7 dots in the offset register 28.

After completing the initial settings of each register as described above,
The CPU 10 starts the following dot interpolation address generation process.

Here, first, we will take as an example the case where dot interpolation is performed on a real body (or long body, flat bar) as shown in Fig. Explain. During this dot interpolation, the register 31
VCrOJ, register 321g, dot increment width “dxJ”
, The initial value of the main scanning direction (Sm) "8x" is stored in the register 33.
”, dot step width rdyJ in register 34, renostar,
95 Kr oJ, register 36jC sub-scanning direction (Ss
) is then set.

Here, the register 32. ．． 941/C Set dot step width (dx, dy) ld It is given as an inverse value of the scaling factor. Also, the register 33VC is [I
x = (dx - 1) / 2 : ], lx is the initial value (,
, ), and the register 36VC is given as (Iy=(
Iy consisting of dy-1)/2) is given as the initial value (-y), and when dx or dy is less than "1" (i.e. when expanding), Ix or Iy becomes negative and one character Indicates the address outside the original character/mother turn storage area of the buffer 52, and when dx or ay is "1" or more (i.e., during reduction), I
When x or y becomes positive, it indicates an address in the original character mother turn storage area of the one character buffer 52. Also, register 5
0 contains an arbitrary level (0 to 255 levels) for comparing with the interpolated value output from the interpolation table ROM 5B and determining which level of the new dot is to be considered a meaningful dot. A comparison value or threshold (th) is set.

Furthermore, CPt1lO reads dot/base turn data for one character to be subjected to dot interpolation from the kanji/f-turn memory 51, and writes this character/f-turn data into the one-character buffer 52. At this time, one character buffer 52'f
As mentioned above, C is stored in such a state that one character's dots, turndays, and evenings to be subjected to dot interpolation are surrounded by meaningless "O#" dots.

After setting the data to the registers 3 to 36 and extracting the interpolation target character and its turn to the one-character buffer 52, under the control of the selection control circuit 49, the registers,
? Data stored in J, 56 that becomes the initial dot address (IIX.

sy) are selected by selection circuits 41.45VC and stored in corresponding registers 42.46, respectively. Furthermore, at the start of main scanning, the data (IX+ly) stored in the register 42, 4eVc is sent to the selection circuit 43.47VC.
are selected and stored in corresponding registers 44 and 48, respectively.

The data stored in this register 44.48 (8x r
'l)'), the value of the integer part is given to the bit selection circuit 53, and the value of the decimal part is given to the interpolation table ROM s
s VcIt Rahle.

The bit selection circuit 53 selects the dot information of the four points in the ■ grid from the one-character buffer 52 based on the value of the input integer part, and supplies it to the interpolation table ROM 58K.

At this time, when expanding (dx Hdy + 1) K,
Bit selection circuit 53V'C11 Since a negative value indicating an address outside the original character/pattern storage area of the character buffer 52 is given, dots are selected from the dot information of four points in one grid, including dots outside the original character pattern storage area. Start selection.

Also, at the time of reduction (dx, dy>1) K:, since a positive value indicating the address in the original character/turn storage area of the bit selection circuit 53K and the one character buffer 52 is given, the original character・Start dot selection based on the dot information of 4 points per grid in the mother turn storage area.

The interpolation table ROM 5B stores each offset value (tH.

8-bit interpolation according to the contents, using the dot information of the surrounding four points from the bit selection circuit 53 and the 1-bit interpolation value switching selection signal from the 1-dot/e-turn recognition unit (DSP) as input information. Output the value (Qxy).

At this time, the dots/mother turns of four points in one grid outputted from the bit selection circuit 53 are outputted by the dot pattern recognition section (DSP).
) When the dot/f turn is constant at 1% as shown in Figure 4, the on/off state of a specific dot in the surrounding grid is recognized and the Outputs a bit interpolation value switching selection signal. That is, for example, as shown in Fig. 4, the surrounding four dots (D□, D)
, D2. When only one point of DJ) is off or "O" (Do shown in white in the figure), the on/off state of specific drums) (Da, Db) in the surrounding grid is further recognized. .

If Da, Db - "l", select a corner type table (T) as shown in Fig. 3(d) K, and
If at least either Da or Db is “0”, the diagonal tights Chisol (as shown in Fig. 3(f) K)
To select interpolation value switching selection signal. Also, 4 dots around 1 (DO).

D7, Dz, D,? ), when only one point is on, that is, "1" (DO indicated with emphasis in the figure), the on/off state of the specific driver (Da, Db) of the surrounding grid is further recognized, and Da , if Db="O", select the corner tying table (T7) as shown in FIG. 3(a) K, and if at least one of Da and Db is 1" An interpolation value switching selection signal is output to select a table (TO) of diagonal tights as shown in (,)K.

In this way, the interpolated value of a new dot located within the four-point dot area is further determined by the state of the surrounding dots when the four dots form a specific pattern as described above. And the above interpolation table ROM 5
8-bit (0 to 255 levels) interpolated value output from B = + nno! The interpolated value is inputted to the controller 591C and compared with the comparison value stored in the register 36, that is, the threshold value, and if the interpolated value exceeds the threshold value, outputs a "1" level signal indicating that the dot is meaningful. Further, if the interpolated value does not exceed the threshold value, a signal of the "0" level is output, indicating that the dot is meaningless.

On the other hand, after the interpolation value of 1 dot is output from the interpolation table ROM 58, it is set as the content of the register 44, and
The contents of the register 48 and the contents of the register 35 are added by the adder circuit 38, and the contents of the register 48 and the contents of the register 35 are added by the adder circuit 4.
0 is added, and the data of each addition result is sent to the corresponding data selector 4.0 under the control of the selection control circuit 49. ? , 47 and registers 44.48
1/C can be stored. At this time, among the registers 32 and 35 indicating the dot step width in the main scanning direction, the register 32 has the following information.
Although the dot step width (dx) is set according to the specified enlargement/reduction ratio, the register 35 contains "O
'' is set, and therefore, the contents of the register 44 (dot address) are sequentially updated every K interpolation processes of one dot, with a step width (d,) according to the specified scaling factor. The contents of the register 48 are not updated as a result, and the data at the time of initial setting is held as is. Also, 1
Every time one main scan is completed, the contents of the register 42 and the contents of the register 3 are added by the adder circuit 37VC, and the contents of the register 46 are added by the adder circuit 39VC. r- of each addition result
The data are selected by the corresponding data selectors 4 and 45 under the control of the selection control circuit 49 and stored in the registers 42 and 461/C. At this time, among the registers 31 and 34 indicating the dot increments in the sub-scanning direction, the register 34VC is set to the dot increments (dy) according to the specified enlargement/reduction ratio, but the register 31 does not contain the true dot increments (dy). Since this is dot interpolation for a long body, half body), "0" is set as described above, and therefore, register 4 is set to "0".
The contents of 6 (dot address) are the dot step width (
dy), but the contents of the register 42 are not updated as a result and the data at the time of initial setting is held as is.

In this way, the interpolation table ROM 58 sequentially outputs the interpolated value for the new dot address, and this interpolated value is sent to the register 50 by the comparator 59.
compared with the threshold (th).

New dot information is generated.

The interpolated new dot information outputted from the comparator 59 is sequentially stored in the shift register 60jC and sent out to the CPU path 12 in 1-byte units.

At this time, when the character/mother turn data subjected to dot interpolation processing and sent to the CPU path 12 is written to the line buffer 8 of the print control section 17 for, for example, no printout, and the offset register 28VC is
When an offset value within the range of 1 to 7 dots is set (for example, when a ruby character that has been interpolated with dots is moved downward by + (+ = 1 + 2 +..., 7) dots), or , ・The number of dots in the main scanning direction of the lean-converted character is not a multiple of the writing width (8 dots) of the image memory to be output, and it is necessary to align it with the byte boundary (writing width) on the image memory side. , when the offset value (i) is set in the offset register 28, the offset data (i 0
”) is generated and the data is processed before the start of main scanning.
The shift register 60'g is set, and then the dot interpolated data, that is, the converted character/mother turn dots are written.

The upward steering operation was performed when a real body (or a long body, or a half body) was the output target, but for example, during the dot interpolation address generation process when a rotating body is the output target, registers 31 to 36 Data is set in which the predetermined trigonometric function data in the trigonometric function table 24 according to one specified rotation angle is included as one element.

In other words, the specified rotation angle is [θ0], and the original font's
If the number of dots in the direction is [a+1] and the number of dots in the X direction of the original font is (b+l), register 3 contains DX 1
= −dx−dnθ.

Register, 92 K is D x 2 "' d x-c
In the osθ0 register 34, DY1=dy-cmθ0)Xp35Vc and DY2=dy-d>θO are set, respectively.

Also, in the register 33 (Xi 1nit) and the register 3e (Yl 1n1t), (1) When O0≦00≦90°, XI 1nit=” a-2-(a+1-dx)c
os2θ.

2 Yl 1nit=-”(1dy)-yu(a+1-di
)2 ±-dθ0 dx (2), when 90≦00≦180°, XI 1nlt
=a+'' (1dx) -L(b+t-dy)-spider2θG 2 dy Y1inlt='b+1(b+1-dy)cas2θ0
2 (3) When 180°≦00≦270°.

X 11nit='a+'(a+1-dx)cos2θ
02 Yl 1nlt=b+”(1-dy) 10-(a+1-d
x)'! 'gln2θ02 dx (4), when 270°≦θG≦360°, Xli output=
Committee (1-dx) + one! -(b+1-dy)-sin2θ02 dy Y 1 jnit = “b-”(b+1-dy) cm
Set 2θ02 respectively.

As described above, each setting value (DXI, DX2, DYI) including the trigonometric function data according to the rotation angle (θo)K, such as the dot step width, the initial address, etc.

DY2. X1init, Ylinlt) and set the corresponding registers 31 to 3617, and then sequentially execute the dot interpolation address generation process for the main scanning direction and sub-scanning direction as described above. You can get inverted letters and turn dots according to the following.

Also, when generating a dot interpolation address when an oblique character is to be output, predetermined trigonometric function data in the trigonometric function table 24 according to the specified slope angle is stored in a specific register among the registers 31 to 36. Data containing this as one element is set.

That is, let the designated italic angle be [θ0], the number of dots in the X direction of the original font be [a +1:], and the number of dots in the X direction of the original font be (b+1).

In the range of 0°≦00≦90°.

register,? IK is set to DX1=dx-100, DX2=dx, DY1=d)' to register 34, DY2=0 to register 35, and X11nlt= to register 33. In the register 36, Y 11nij ==--! -(1-dy) are respectively set.

As described above, each setting value (DXI, DX2.DYI, DY2゜Xl 1nit
. ) to obtain italicized characters and turn dots.

Each setting value (DXI, DX2.DYI, DY2゜XI 1nit
, Yl 1nit), the dot interpolation address generation processing for the main scanning direction and sub-scanning direction as described above is executed sequentially, and new dot information is generated based on the generated dot interpolation addresses. obtain. As described above, this new dot information is stored in the m-th shift recorder 60 and written in byte (8 bit) units via the CPU bus 12 to the output target, for example, the line buffer 18 of the print control section 17. It will be done.

At this time, the line buffer is 18 rows, and the bit width corresponding to the dot configuration of the normal print character height (for example, vertical 8 x 3 = 24 dots,
Therefore, modified characters such as the above-mentioned rotating characters and f+ characters cannot be accommodated in the size of 24 dots, except in the case of reduced patterns. Therefore, in such a case, during the register initialization described above, the CPU 70 inputs the specified conversion font, its angle, scaling factor, etc. in order to divide the newly generated characters/lean into multiple zones. The number of zones for the converted character is calculated based on , data representing this number of zones is set in the zone specification register 25, and the contents of the register 25 are decremented each time a pattern is written in zone units. (-1)L, until its content becomes rOJ.
The pattern data of each zone is treated as the same character/gutern. That is, for the zone designated by the zone designation register 25VC, continuous dot printing is designated without intervening a blank area (ie, line spacing) between each main turn. An example of t-tone division at this time is shown in FIG.

As shown in FIGS. 7 and 8, the zone number calculation means calculates the x
'Find the size of the rectangle (including squares) in the y direction, and calculate the number of dots on each of the two sides of the rectangle that touch each other (the number of x-y dots)
This should be set in registers 21 and 22 as data for V size (Vsize) and H size (Hsize) during the register initialization described above.
Yes, it's easy to recognize. In other words, for a character that has been converted with an angle of During dot interpolation processing, register 22VC
From the trap of dividing the stored H size (Hslze) data by the bit width "24" of the line buffer 18,
The number of zones mentioned above can be easily set, and during dot interpolation processing when displaying, the data of the V size (Valze) stored in the register 211g is set to the bit width of 1 display line "24". By dividing by K, you can easily calculate the number of zones.

Moreover, by fixedly assigning arbitrary zone designation data to the zone designation register 25, pattern data of the same designated zone can be continuously and repeatedly developed into an image. With this, the characters/turns transformed by the above dot interpolation process can be further printed or displayed as modified characters/turns with some or all of them redundant.

In addition, the above-mentioned V size (Vsiza), H size (Hs
The data of ``size'' is also referred to when setting the pitch of one character, when processing underlines/'sidelines, etc. That is, for a character such as a single diagonal turn obtained by dot interpolation with an arbitrary inclination angle in the scanning direction as described above, the height (character height) and width (character width) of the entire character are determined by the inclination angle. Furthermore, it changes variously depending on the enlargement/reduction magnification added to it.

Therefore, the above-mentioned modified characters can be changed to the normal line, column direction (x
, y direction), the character pitch,
Furthermore, underlines/sidelines, etc. cannot be defined using existing fixed parameter designation means.

Therefore, here, the circumscribed rectangle as described above is treated as the body face of the character even if various processes such as character pitch, underline/side line, etc. are cleaned.

These processing means will be explained below.

First, the character pitch processing operation will be explained. As described above, the dot y interpolation process for one character is performed, and the newly generated dot image for one character is expanded into the line buffer 181i in the print control unit 17, which is the output target. The CPU 7 determines whether the contents of the register 2 (Vai y, e) have been updated. If the contents of the register 2 have not been updated, the data (Vsize) K stored in the register 211g and 1/2 of that value are added to the print control unit 12VC as control data indicating the character pitch. , and controls the pitch of characters developed on the line buffer 1B. Also, when the contents of the register 21 are updated, the data before the update is stored in a specific register area, and at the time of the update, the data before the update stored in the specific register area and the updated data are The value of 1/4 of the sum of is further added to the updated data stored in the register 21, and this is supplied to the print control section 77 as control data indicating the character pitch, and expanded on the line buffer 18. Control the pitch of characters.

In this way, for a character converted with an angle of K, the writing (handling) of that character is as follows.

Since the process is based on a rectangular area on the horizontal and vertical lines circumscribing the character, the width of the rectangle (f
The pitch between adjacent characters is determined based on Vsize (IJ y ) for out and Hslze (for display output). The same pitch control as described above is also performed for the row pitch.

An example of setting the character pitch (cp) and line pitch (LP) for various modified characters at this time is shown in FIG.

In addition, in the pitch control described above, the pitch is determined while always taking into account the area occupied by adjacent characters (circumscribed rectangles), but in order to simplify the process, the pitch is simply set by register 2 (or register 22) at the time. Control means may be used to determine the pitch based on the value.

Next, the operation when outputting underlines/sidelines will be explained based on the above-mentioned circumscribed rectangle. At this time, in the case of printout, the data stored in register 21jC (Vsi
In the case of display output, the data (Hsize) stored in the register 22 is referenced. Here, the underline/sideline processing operation will be explained using the case of cylinder out as an example. The underline/sideline control unit 23 provided in the print control unit 77 adds an underline or sideline dot on the line/piece 7718 according to the underline/sideline instruction included in the print control information input via the CPU bus 12. However, line development using normal character widths cannot handle the above-mentioned deformed characters such as inversion and italics. Therefore, when the contents of register 2 (Vslze) are constantly input and an underline/sideline instruction is given, an underline/sideline dot pattern is generated with a line length according to the updated data contents of the Zostar 2 at that time, and the line is A number of turns are expanded on the buffer 18 in correspondence with the corresponding character. FIG. 10 shows an example of development of underlines for various modified characters at this time.

〔Effect of the invention〕

As described in detail above, according to the present invention, in a dot interpolation device that interpolates characters and patterns having a predetermined dot matrix structure at least in the main scanning direction or the sub-scanning direction,
Means for generating a dot interpolation address in the main scanning direction represented by an X component and an X component; interpolation dot address generating means for generating a dot interpolation address in the sub scanning direction represented by an The dot address generation means includes an interpolation dot generation means for generating interpolation dots at coordinate points according to each of the generated dot interpolation addresses, and interpolation dot information generated by the interpolation dot generation means, and a character subjected to the dot interpolation processing. A shift register stores data with a bit length corresponding to the write width of the image memory in which the pattern is developed, and a bit length corresponding to the write width of the image memory is stored in this shift register prior to writing interpolation dots for each main scan. an offset data generating means for selectively generating an offset value of and writing it into the shift register, and an offset data generating means for selectively generating an offset value of the character pattern dots and writing the offset value to the shift register; By using K to be able to do this, when the original character font is transformed according to an arbitrary scaling factor, angle, etc. using high-precision dot interpolation, it is easy to handle the image data for each transformed character, and it is possible to Since characters can be moved within the writing width of the image memory, the output function for dot-interpolated characters and mother turns can be expanded.

[Brief explanation of drawings]

FIGS. 1(a) to (c)ti are diagrams for explaining conventional dot interpolation processing means, respectively. FIG. 2 is a block diagram showing the configuration of main parts in an embodiment of the present invention. Figures 11 to 11 are for explaining the operation of the above embodiment, and Figures 3(&) to 11(f) show four dots in one lattice surrounding a new dot generated by dot interpolation processing. Information (dot pattern) and interpolation table ROM
K A diagram showing the relationship between the level classification of set interpolation values and table tights, Figure 4 is a diagram to explain the selection switching operation of table tights, and Figures 5 (, ) to (d) are pattern conversions, respectively. Figures showing examples, Figure 6 (,), (b)
is a diagram showing a comparison of the main and sub-scanning directions during CRT display and the main and sub-scanning directions during printout, a diagram showing the relationship between various setting data in Fig. 7, and Fig. 8 is a diagram showing the dot interpolation process. A diagram showing the relationship between a character that has been converted into a regular turn and a rectangle circumscribing the character, Figure 9 is a diagram showing examples of character pitch and line pitch settings for various transformed characters, and Figure 10 is a diagram showing various Diagram showing an example of developing underlining for modified characters, No. 11
The diagram is only for explaining the means for the zones.ノO...CPU, 11...Main memory (MM),
No. 2: CPU path, No. 3: Display control circuit (CR)
T-C). 14... Frame memory (FM), 15... Mother serial conversion circuit (PS), 16... CRT display section, 17... Print control section, 18... Line buffer, 19.・Serial dot Norinta, 2no. 22.25, 26, 27, 28, 31, 32°33.3
4.35, 36, 42, 44, 46°4 & , 50.5
4.56... Register, 23... Underline/sideline control unit, 24... Trigonometric function table, 29... Offset data generation unit, 37.38139.40... Addition circuit (ADD-A, ADD-B, ADD-C, AD
D-D), 41.43, 45.47... data selector, 49... selection control circuit (SC). 5 no... Kanji Tsukutan Memory (KPM), 52...
・1 character buffer, 53...Bit selection circuit, 55・
...Discrimination control circuit, 57...Dot discrimination circuit 258.
...Interpolation f -7'le ROM, 69...con/4
'Rator, 60...Shift register. Applicant's Representative Patent Attorney Takehiko Suzue Figure 8 Figure 9 Figure 10 Figure 11

Claims (1)

[Claims] In a dot interpolation device that performs dot interpolation of a character/mother turn of a predetermined dot matrix configuration in at least the main scanning direction or the sub-scanning direction, a dot interpolation address in the main scanning direction represented by an X component and an X component is generated, and interpolation dot address generation means for generating a dot interpolation address in the sub-scanning direction represented by an X component and an An interpolation t'y) generation means and a shift for storing the interpolation dot information generated by this interpolation dot generation means with a bit length corresponding to the writing width of the image memory in which the character/gutter subjected to the dot interpolation process is developed. a register, and offset data generation for selectively generating an offset value within a bit range corresponding to the write width of the image memory and writing it into the shift register prior to writing interpolated dots to the shift register for each main scan. 1. A method for controlling the output of interpolated dots and patterns, comprising means for controlling the output of character pattern dots, characterized in that the writing start position of character pattern dots generated by dot interpolation can correspond to the writing boundary of the image memory.