JPS60226786A - Digital speed detecting method - Google Patents

Digital speed detecting method

Info

Publication number
JPS60226786A
JPS60226786A JP59081428A JP8142884A JPS60226786A JP S60226786 A JPS60226786 A JP S60226786A JP 59081428 A JP59081428 A JP 59081428A JP 8142884 A JP8142884 A JP 8142884A JP S60226786 A JPS60226786 A JP S60226786A
Authority
JP
Japan
Prior art keywords
omegas
speed
omegam
counter
pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59081428A
Other languages
Japanese (ja)
Inventor
Kimimoto Mizuno
公元 水野
Shoichi Sakazaki
坂崎 正一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP59081428A priority Critical patent/JPS60226786A/en
Publication of JPS60226786A publication Critical patent/JPS60226786A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02PCONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P27/00Arrangements or methods for the control of AC motors characterised by the kind of supply voltage
    • H02P27/04Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage
    • H02P27/045Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage whereby the speed is regulated by measuring the motor speed and comparing it with a given physical value
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01PMEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
    • G01P3/00Measuring linear or angular speed; Measuring differences of linear or angular speeds
    • G01P3/42Devices characterised by the use of electric or magnetic means
    • G01P3/44Devices characterised by the use of electric or magnetic means for measuring angular speed
    • G01P3/48Devices characterised by the use of electric or magnetic means for measuring angular speed by measuring frequency of generated current or voltage
    • G01P3/481Devices characterised by the use of electric or magnetic means for measuring angular speed by measuring frequency of generated current or voltage of pulse signals
    • G01P3/489Digital circuits therefor

Abstract

PURPOSE:To eliminate a speed ripple or a torque ripple even at a low speed by adding a motor speed and a slip frequency by a rate multiplier. CONSTITUTION:The addition omegaM+omegaS of a motor speed omegaM and a slip frequency omegaS is not performed in a counter, but executed in a microcomputer 15 and a rate multiplier 9. Thus, since the omegaS becomes constant in the steady state even at a low speed, rough and dense states do not occur in the frequency of omegaM+ omegaS. Even if the slip is varied, omegaM+omegaS smoothly changes. Accordingly, a reference sinusoidal wave output does not transiently vary in the steady state.

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明は電動機に取り付けられたパルス発振機により
デジタル的に速度を検出する方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for digitally detecting speed using a pulse oscillator attached to an electric motor.

〔従来技術〕[Prior art]

第1Nに従って、従来用すられて来たパルス発振機によ
る速度検出を用いた誘導電動機駆動すべり周波数制御イ
ンバータ装置の動作を述べる。制御はマイクロコンピュ
ータを用いて実行されている。
In accordance with No. 1N, the operation of an induction motor drive slip frequency control inverter device using speed detection using a conventional pulse oscillator will be described. Control is performed using a microcomputer.

即ち第1図において、ダイオードコンバータ(1)によ
り整流されコンデンサ(2)により平滑された直流電源
は、パワートランジスタ(3)によりモードル(4)に
流れる交流電流がDAコンバータ(111を通して発生
される3相基準電流波形(一般に正弦波)に一致するよ
うにPWM回路四が動作する。モードル(4)が動作す
ればパルス発振機(5) 、Cリフイードバックパルス
が発生する。フィードバックパルスは通常第8図のA 
、 Bに示すようにたがいに9(F’ずれた2相バMス
が発生される。2相パルヌは入力インターフエーヌ回路
(6)によシ第3図に示したy。
That is, in FIG. 1, a DC power supply rectified by a diode converter (1) and smoothed by a capacitor (2) is converted into an AC current flowing to a modele (4) by a power transistor (3), which is generated through a DA converter (111). The PWM circuit 4 operates to match the phase reference current waveform (generally a sine wave).When the modele (4) operates, the pulse oscillator (5) generates a C refeedback pulse.The feedback pulse is usually the 8th A in the diagram
As shown in FIG.

acm波形の如く正転パルス(CW)、逆転パルス(C
aW)に弁別され、カウンタ(7)O’t)に入力され
る。
As shown in the acm waveform, forward rotation pulse (CW), reverse rotation pulse (C
aW) and input to the counter (7)O't).

カウンタαのに入力されたパルス列は、モードル速度ω
Iとなる。又、カウンタ(7)に入力されたパルスは指
令速度V refとの偏差をマイクロコンピュータに工
り計算する為に利用される。
The pulse train input to the counter α is the moder speed ω
Becomes I. Further, the pulses input to the counter (7) are used to calculate the deviation from the command speed V ref by means of a microcomputer.

以下その偏差を計算する°方法について述べる。The method for calculating the deviation will be described below.

一定周期毎にパルスを発生するタイマーα6により発生
されたサンプリングパルスによりCPUは定時間毎に割
9込みを発生し、入力インターフェイス00より速度指
令V ref″4c読み込むと同時にカウンタ(7)の
サンプリング周期間のカウントパルス数V7Jlをマイ
クロコンピュータに読み込みRAMcJ2に格納する。
The CPU generates an interrupt at regular intervals due to the sampling pulse generated by the timer α6, which generates pulses at regular intervals, and at the same time reads the speed command V ref''4c from the input interface 00, the sampling frequency of the counter (7) is changed. The count pulse number V7Jl of the period is read into the microcomputer and stored in RAMcJ2.

すべりを計算する為に通常、Δε。=V ref ts
 V pBnとすれば、すペシ111J=kp(Δg、
+ΣΔIIn)τ− を計算し、P工演算をする。
To calculate slip, usually Δε. =V ref ts
If V pBn, speci111J=kp(Δg,
+ΣΔIIn)τ− is calculated and P-operation is performed.

そしてその計算されたNsをレートマルチ(9)に入力
し、レートマルチプライヤ−の桁数を2進12bit 
、発振器(8)の出力をfoとすれば、ωS=J −η11・foとなシ可逆カウンタαカに入力され、す
べり周波数制御で必要なf(ωS+ωn)dt1発生さ
せている。又、DAコンバータCL41は通常すベシN
 BooI!としてマイクロコンピュータにより工=f
f〒o” (但しIO一定)を計算し基準匿流の振幅を
与える。工2は直流![kth機でいう電機子電流分で
、IOは界磁電流分でるる。又、い工2 凶は位相角0=−一1Ti−の出力である6ROM晒に
よジデジタル値として5ln(f(ωカ+ωs )dt
十〇)が出力されDAコンバータα→によりアナログ的
にDAコンバータC14)の出力であるW!幅工と乗工
W=工5ill(J”(ωH+ωB)at十θ十東π)
が与えられ誘導藏@機の3相電流を制御するのである。
Then, input the calculated Ns to the rate multiplier (9), and set the number of digits of the rate multiplier to 12 bits in binary.
, if the output of the oscillator (8) is fo, then ωS=J −η11·fo is input to the reversible counter α to generate f(ωS+ωn)dt1 necessary for slip frequency control. Also, the DA converter CL41 is normally
BooI! By microcomputer as = f
f〒o" (However, IO is constant) and gives the amplitude of the reference free current. Step 2 is DC! [In kth machine, it is the armature current, and IO is the field current. Also, Step 2 The problem is that the output of the phase angle 0=-1Ti- is 6ROM exposed and the digital value is 5ln(f(ω+ωs)dt
10) is output, and W! which is the output of the DA converter C14) in an analog manner by the DA converter α→ Width work and riding work W = work 5 ill (J” (ωH + ωB) at ten θ ten east π)
is given to control the three-phase current of the induction generator.

菖 しかしこのような方法はモート〜からの〜期速度分は基
酪正弦波カウンタQ″f)に直接入力される為遅れなく
動作する一面、第4□□□の(6)に示す如く欠点が生
じていた。即ち、0MとωBは同時に可逆カウンタαη
に入力されても正常TlCl1II作するように内部ク
ロックにより同期がとられ第4図四の0M。
However, although this method operates without delay because the ~ period velocity from the mote ~ is directly input to the basic sine wave counter Q''f), it has drawbacks as shown in (6) of Section 4 □□□. That is, 0M and ωB are simultaneously reversible counters αη
It is synchronized by the internal clock so that it operates normally even if it is input to 0M in FIG. 4.

ωSで示したように位相がずれて入力される為。This is because the input is out of phase as shown by ωS.

ωI(−ω8の周波数に粗密が発生し、ωM+ωSのパ
ルス列I V −Fコンバータにて観測すると第4回(
b)の如くリップルが発生する為、DAコンバータ(9
)の出力は極端な場合、第7図の如くなり、特に低速の
場合モードルに速度リップルやトルクリップルを発生さ
せていた。この影響はイ流型インバータよりも電圧型イ
ンバータでは影響がさらに大きい。
The density occurs at the frequency of ωI(-ω8, and when observed with the pulse train I V -F converter of ωM+ωS, the 4th (
Since ripples occur as shown in b), the DA converter (9
) In extreme cases, the output becomes as shown in FIG. 7, which causes speed ripples and torque ripples in the moder, especially at low speeds. This effect is even greater in voltage type inverters than in current type inverters.

〔発明の概要〕[Summary of the invention]

この発明はこのような欠点を除去する為になされたもの
である。
This invention has been made to eliminate these drawbacks.

〔発明の実施例〕[Embodiments of the invention]

@2□□□にその一実施例を示す。この図において、第
1図と異なる点は、モードル速度ωMを直接カウンタα
のに入力せず、ω8+ωu’k レートマルチプライヤ
−(9)によフ発生させた点にある。一定サンプリング
時間中の入カバルヌをNspとすれば第2図のレートマ
ルチプライヤー(9)から発生する011分は通常パル
ス発振機(5)のパルヌ数、サンプリング周期等により N、+r=Nsp・() (N、M、に、l整数)とな
る。
An example is shown in @2□□□. In this diagram, the difference from Figure 1 is that the moder speed ωM is directly calculated by counter α
The difference is that the ω8+ωu'k rate multiplier (9) is used to generate a fault without inputting the ω8+ωu′k value. If the input cabalne during a certain sampling time is Nsp, then the 011 minute generated from the rate multiplier (9) in Fig. 2 is normally N, +r=Nsp・( ) (N, M, l integers).

ここで問題となるのはNNが整数でちるという条件があ
る事である。勿論込が整数ならばNapはカウンタのパ
ルス数の為整数と々るが、一般に前述した如き理由によ
りm > nであり整数となる事は少ない、整数にさせ
る為には種々の条件が必要である2例えば、すべりを計
算時にも速度指令[Vrefとレンジを合わせる必要が
あり係数は必要となる。
The problem here is that there is a condition that NN must be an integer. Of course, if the integer is an integer, Nap will be an integer because it is the number of pulses of the counter, but in general, for the reason mentioned above, m > n and it is rarely an integer. Various conditions are required to make it an integer. For example, when calculating slip, it is necessary to match the range with the speed command [Vref, so a coefficient is required.

そこでマイクロコンピュータにLす(Nsp Xl)/
kを演算する。この演算の闇をNM、余りをαとすると (N8’p X l )、4(= N、sr+α(N、
M:整数 α〈籠の整数) となる。又)般的にl)kである。
So I sent it to the microcomputer (Nsp Xl)/
Calculate k. If the darkness of this calculation is NM and the remainder is α, then (N8'p X l ), 4(= N, sr+α(N,
M: Integer α (basket integer). and) generally l)k.

ここでα金切りすててしまったり、四捨五入するのみで
は第1図に示した如くフィードバックパルス数がカウン
タαηに全て入力されな匹為%第1図の方法と比較して
ωIK誤差ケ゛生じる。誘導電動機のすべり周波数制御
でれωK〉ωθマある為ωyの譲差を少なくする必要が
ある。
Here, if α is omitted or only rounded off, the number of feedback pulses is not all input to the counter αη as shown in FIG. 1, which results in an ωIK error compared to the method shown in FIG. In the slip frequency control of the induction motor, there is a difference ωK>ωθ, so it is necessary to reduce the margin of ωy.

これを防ぐには、tE1時のサンプリング時、計算した
時の諸lをNSp&il 、 NM−αリ とした時、
j +1 + 1時の計算に (N8p(n+1)×1+α顧)/に = NM (n−1−1)+α(n+1)としてサンプ
リング周期後刻々と演算すれば第1図と比較して遅れは
あるが第2図のωIは全く等しくなる為、前述した欠点
はなくなる。又5サンプリング周期を所定値以上にとれ
ば制御的に遅れは無視出来る。
To prevent this, when sampling at tE1, when calculating the various l as NSp&il, NM-αli,
If the calculation at j +1 + 1 is performed every moment after the sampling period using (N8p(n+1) x 1+α)/N = NM (n-1-1) + α(n+1), the delay compared to Fig. 1 will be reduced. However, since ωI in FIG. 2 is completely equal, the above-mentioned drawback disappears. Further, if the five sampling periods are set to a predetermined value or more, the delay can be ignored in terms of control.

第2図に示したこの発明の方法ではモードル速度分ωI
と、すベシ周波数分ωSの加算ωに+ω8はカウンタで
おこなわずマイコンαOとレートマルチプライヤ−■で
おこなう為、ωに+ω8の出力は第5肉れ)に示すよう
になり、特に低速でも定常状態ではωSは一定となる為
、ωM+ωSが第4図れ)の如くなる事はなくなった。
In the method of this invention shown in FIG. 2, the moder speed ωI
Then, the addition of the total frequency ωS to ω +ω8 is not done by a counter but by the microcomputer αO and the rate multiplier -■, so the output of +ω8 to ω is shown in the 5th part), and it is steady even at low speeds. In this state, ωS becomes constant, so ωM+ωS no longer becomes as shown in Figure 4).

ωI+ωSをF−’Vコンバータで観測すると第5図(
6)の如くなだらかに変動する為、基準正弦波出力は第
6図のように定常状態において過渡的に変動する事はな
くなる。
When ωI + ωS is observed with an F-'V converter, Figure 5 (
6), the reference sine wave output does not fluctuate transiently in a steady state as shown in FIG. 6.

〔発明の効果〕〔Effect of the invention〕

以上述べたマイコン演算併用法によるデジタル速度検出
法を利用した誘導酸動機制御ではカウンタで周波数加減
数する為の0Mのゆらぎもなくなシ、又、かつ第1図の
方法の長所(即ちn期速度分ωIの検出がきわめて正確
である点)もそこなう事がなくなる。又、この方法によ
れば、カウンタα力の桁数、パルス発振機(5)の1回
転のパルス数にも自由膚が増大し、設計しやすくなると
いった利点も生じる。
In the induction acid motor control using the digital speed detection method combined with microcomputer calculation described above, there is no 0M fluctuation due to frequency addition/subtraction using a counter, and the advantage of the method shown in Figure 1 (i.e., n-period The point that the detection of the velocity component ωI is extremely accurate) will not be impaired. Further, according to this method, the number of orders of magnitude of the counter α force and the number of pulses per revolution of the pulse oscillator (5) are increased, and there is an advantage that the design becomes easier.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来使用されていたマイコン利用のベクトル制
御PWMインバータで速度検出にパルス発振機を利用し
た一例?示す図、第2図はこの発明の一笑施例を示す図
、第8図はパルス発振機からのフィードバックパルス波
形と正逆転弁別パルス波形を示す図、第4図は第1図に
示すもので発生される波形の一例を示す図、第5図は第
2図に示すもので発生される波形の一例を示す図、第6
肉は第2図中ODAコンバータの正弦波出力の一例を示
す図、第7因は第1図中ODAコンバータの正弦波出力
の一例を示す図である。 図中、(1)は8相交流を整流する8相ダイオードブリ
ツジ、(2)は平滑コンデンサ、(3)は8相パワート
ランジスタブリツジ、(4)は誘導電動機、(5)は誘
導電動機に直結したパルス発振機、(6)は90° 相
差をもつ2相パルスから正転パルス、逆転パにスを発生
する回路、(7)は可逆カウンタ、(8)はレートマル
チプライヤ−の原発信器、(9)はレートマルチプライ
ヤ−、αQはマイコンパスインターフェース、(ロ)は
オアゲート、(2)はRAM%(至)はROM%αくは
DAコンバータV(至)はマイコンCPU、αQはタイ
マー、αηはカウンター、(至)はROM、QlはDA
コンバータ、翰はPWM回路、(2)は電流検出CT。 (イ)は位相角ラッチ回路である。 なお、図中同一符号は同−又は相当部分を示す。 代理人 大岩増雄 第7図 第2図 第3図 第4図 (aン (b) 第5図 第6図 1s7図
Figure 1 is an example of a conventional microcomputer-based vector control PWM inverter using a pulse oscillator for speed detection. 2 is a diagram showing a simple embodiment of the present invention, FIG. 8 is a diagram showing a feedback pulse waveform from a pulse oscillator and a forward/reverse discrimination pulse waveform, and FIG. 4 is the same as that shown in FIG. 1. Figure 5 is a diagram showing an example of the waveform generated, and Figure 5 is a diagram showing an example of the waveform generated by the waveform shown in Figure 2.
The meat is a diagram showing an example of the sine wave output of the ODA converter in FIG. 2, and the seventh factor is a diagram showing an example of the sine wave output of the ODA converter in FIG. In the figure, (1) is an 8-phase diode bridge that rectifies 8-phase AC, (2) is a smoothing capacitor, (3) is an 8-phase power transistor bridge, (4) is an induction motor, and (5) is an induction motor. (6) is a circuit that generates forward pulses and reverse pulses from two-phase pulses with a 90° phase difference, (7) is a reversible counter, and (8) is the source of the rate multiplier. Transmitter, (9) is rate multiplier, αQ is microcomputer pass interface, (b) is OR gate, (2) is RAM% (to) is ROM%α or DA converter V (to) is microcomputer CPU, αQ is the timer, αη is the counter, (to) is the ROM, and Ql is the DA.
Converter, wire is PWM circuit, (2) is current detection CT. (A) is a phase angle latch circuit. Note that the same reference numerals in the figures indicate the same or equivalent parts. Agent Masuo Oiwa Figure 7 Figure 2 Figure 3 Figure 4 (a (b) Figure 5 Figure 6 Figure 1s7

Claims (1)

【特許請求の範囲】 モーシル軸に結合されたパルス発振機と、上記パルス発
振機からのフィードバックパルスを計数する装置を具備
し、所定サンプリング時間f7n時の計数パルス(i−
Nn、又、l、kを任意の整数。 演算の答の整数値をαn、余Vをβn、前回のサンプリ
ング時間tn−1の演算時の余Vをβulとした時、 CNIIxl+βn−1)/z−αi+βn(k’>β
n)なる演算を実行し、その答αnを系格化されたモー
)/7速度とする事を特徴とするデジタル速度検出方法
[Scope of Claims] A pulse oscillator coupled to a Mosyl axis and a device for counting feedback pulses from the pulse oscillator are provided, and the counting pulse (i-
Nn, and l and k are arbitrary integers. When the integer value of the answer to the operation is αn, the remainder V is βn, and the remainder V from the calculation at the previous sampling time tn-1 is βul, then CNIIxl+βn-1)/z-αi+βn(k'>β
A digital speed detection method characterized by executing the calculation n) and setting the answer αn to a systemized mho)/7 speed.
JP59081428A 1984-04-23 1984-04-23 Digital speed detecting method Pending JPS60226786A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59081428A JPS60226786A (en) 1984-04-23 1984-04-23 Digital speed detecting method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59081428A JPS60226786A (en) 1984-04-23 1984-04-23 Digital speed detecting method

Publications (1)

Publication Number Publication Date
JPS60226786A true JPS60226786A (en) 1985-11-12

Family

ID=13746097

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59081428A Pending JPS60226786A (en) 1984-04-23 1984-04-23 Digital speed detecting method

Country Status (1)

Country Link
JP (1) JPS60226786A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104483502A (en) * 2014-12-23 2015-04-01 三明学院 SCM (single-chip microcomputer)-based wide-range accurate measuring method for real-time rotating speed of motor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104483502A (en) * 2014-12-23 2015-04-01 三明学院 SCM (single-chip microcomputer)-based wide-range accurate measuring method for real-time rotating speed of motor
CN104483502B (en) * 2014-12-23 2017-09-29 三明恒顺印刷机械有限公司 A kind of real-time accurate speed-measuring method of rotating speed wide scope of SCM Based motor

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