JPS6022507B2 - charge transfer device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a charge transfer device, and particularly to a stable charge transfer device with high transfer efficiency and high resistance to atmosphere.

Generally, a charge transfer device (Char group Transfer ratio v
ice) includes a charge-coupled device (ChargeCoupl).
eddevice) and surface charge transistors (Smf
It includes aceChar group Twnsistor) and a bucket brigade type element.

Among these, the charge-coupled device has a novel structure in which a thin insulating film is provided on the semiconductor surface and a large number of electrodes are further disposed on the insulating film, and this is being announced soon. (The technique 11S pine temTechnicaIJ
oumal. Apm. 1970. Spots 7 pages to 600 pages,
Title: ``Char Bag Coupled Semi con
ductorDevices” and “Expenmen IVerjficationoftheChar Bag Co
The device applies a positive or negative voltage to the electrodes to form a potential well (ntial well at Po) for charges that are minority carriers in the semiconductor substrate, and stores the charges in this potential well. , has an operating mechanism that sequentially transfers the stored charge to the surface of the semiconductor substrate below the electrode.
To facilitate understanding of the present invention, further reference will be made to a conventional charge coupled device.

Figure 1 shows the operation of the basic three-phase charge-coupled device first announced at the Technical Research Institute.

A large number of electrodes 3 are disposed very close to each other on a semiconductor substrate 1 via a thin insulating film 2 of usually about 500A to 3000A. Its operating mechanism is to first apply a positive or negative voltage Vc to a suitable electrode 3 to store charge 4 on the substrate surface of the electrode 3. Next, while lowering this VG, a voltage Vc is applied to the electrode 3 adjacent to this electrode. By doing this, the charges 4 that are no longer stored on the surface of the substrate under the previous electrode 3 begin to move below the surface of the substrate under the adjacent electrode 3 mentioned above. This is repeated in sequence to transfer the charge 4, collect it through the drain 5 which has conductivity opposite to the substrate biased in the reverse direction by the drain power source 7, and detect it as a voltage across the load resistor 8 through the drain electrode 6. The transfer charge 4 can be injected by collecting photoinduced charges caused by irradiation light, or by using a source 9 with conductivity opposite to that of the substrate, as shown in Figure 1.
There is a method of injecting charges through the source electrode 10. Charge transfer in this charge transfer element is performed by the diffusion of charged particles, and a basic charge transfer element does not have an external electric field. fie
The movement is performed by ld). Therefore, the faster the charge density is at the beginning of the movement, the faster the movement is, but when the charge density is lower in the latter half of the movement, the movement becomes slower accordingly. Especially at the end of the movement, thermal diffusion occurs rather than movement due to self-induced accelerating electric field.
It is better to move by. At a normal transfer charge density of 2 to 5.times.1 to 2 cells, 99% of the charge is transferred by a self-induced accelerating electric field, and the remaining 1% is transferred by thermal diffusion. (JoumaloofAppliedPhysje
S magazine, Vol. 42, No. 9, August 1971, 3 spots, pp. 6-35
Page 94, titled “ChargeTra ship ferinCha
Therefore, the later the charge stored under the electrode moves, the slower it becomes, and theoretically it would take an infinite amount of time to transfer all the charge.

However, in actual devices, it is desirable not only to transfer within a finite time, but also to transfer at a high speed if possible with high efficiency. The rate at which charges are transferred per stage is expressed as transfer efficiency, and the rate at which charges are left behind without being transferred is expressed as L2 = resistance ▽: 1 - ri...''m.

The length to be transferred, the mobility of the transferred charge, VG is the voltage applied to the electrode, and t is the transfer time. By the way, assume the values of each parameter in a basic three-phase charge-coupled device (L=
20 French m, French = 500 /V S, VG = 20 V, t =
33. If you calculate the difference, it will be = 1・2×1013...
…[21, and ri=99. Group %.

The values of each of these constants are the values when a three-phase basic silicon charge-coupled device with an electrode length of 201 m is driven with a transfer pulse voltage of 20 V on the IM side, and any actual measured value is the calculated value above. matches well. In charge transfer devices, measures to reduce this residual loss have become a particularly important issue. This is because when the charge transfer element transfers m stages, the overall efficiency is 1 m = (1 1 m)... (3
} For example, even if an element with a high efficiency such as 99.9% is transferred, if 30 charges are transferred, all becomes 70% due to equation 1', and 30% of the initially transferred charge amount is transferred. This is because % is lost.

No matter how high the efficiency of the element itself becomes, in principle, unless the efficiency is 100%, there is a limit to the number of transport stages m. As is clear from the above-mentioned equation (1), the loss left behind is proportional to the reciprocal of the transfer time t, so the longer the transfer time t is, the smaller the loss will be. In other words, in the trial calculation example mentioned above, at IMHz, ko = 1.2 x 10-3, and if this is driven at about 100K and a 10K ratio, ko = 1.2 x 10-4 and ko = 1.2 x 10-5. The rice becomes extremely small. However, there is one more charge transfer element.
There are two important residual losses, which are approximately independent of frequency and have approximately constant values. This feature will be explained in detail below to help understand the present invention. FIG. 2 shows the basic operating mechanism of a charge coupled device explained in terms of potential.

For convenience of explanation, the device is assumed to be an n-channel type, so the substrate 1 is a p-type semiconductor, the source 9 and the drain 5 are n-type regions,
The transferred charges 4 were electrons. 11-1, 11-2 in the diagram,
11-3 are titles for fins, substrate 1, insulating film 2
, shows the potential at each part when the electrode 3 is cut in the longitudinal direction. 12 in the figure is a trap level distribution (tra) for charges existing near the interface between the semiconductor substrate 1 and the insulating film 2.
pleveldis b peak ion), and a charge 4 is always captured under the potential 11 of this distribution. The existence of this trap level 12 provides the above-described certain residual loss. The operation of the charge coupled device will be explained below with reference to FIG.

First, the voltage Vc applied to the transferred charge 3 is set to zero.

At this time, if the substrate 1 is considered to be at ground potential, the potential 11-1 for electrons is flat from the substrate 1 to the electrode 3. At this time, the portion of the trap level distribution below the 0 potential of the substrate is filled with the trapped charges 4-1. In this state, a positive voltage VG is applied to the electrode 3. Then, as shown in FIG. 2B, the potential becomes 11-2, and at this time the depletion layer extends from the surface of the semiconductor substrate into the semiconductor, and the surface potential s of the semiconductor surface portion becomes approximately VG. When electrons, which are charges, are injected from the outside, ds becomes smaller by 4.0 and the depletion layer also shrinks. When the charge is stored up to the maximum amount of charge that can be stored, the current s is approximately twice the Fermi level of the semiconductor substrate. In silicon, this ds is less than 0.5V. As the electrons are stored and the potential rises, the potential exceeds the top of the electron 4-1 that has been stored in the capture level, new charge is captured in the capture level, and the captured electron distribution becomes 4-3. become that way. These newly captured electrons partially recombine with holes, which are majority carriers of the substrate, through the capture level and are completely annihilated. The amount of charge of these annihilated electrons decreases as a pure loss. In addition, in the next step, the voltage Vc applied to the electrode 3 is gradually reduced to 0, and the remaining part of the electrons once captured in the trap level is transferred to the substrate surface under the adjacent electrode. When it is transferred to another department, it is released from capture again and moved to a neighboring area. However, all of the captured electrons are not released and some remain.
That is, when the voltage VG becomes O, the electrons that are captured and remain are counted as a loss left behind. The time constant of the emission of these left-behind electrons is relatively long, and it is measured as a constant amount within the transfer time of at least 300 seconds (one plate Hz when converted to a clock pulse frequency), so the above-mentioned fixed left-behind loss occurs. Go appears. As mentioned above, in a basic charge-coupled device, charge is stored on the surface of the substrate, so it is affected by the trap level, and there is a certain amount of residual loss at frequencies below the relatively low IM ratio.
Not only does it exist, but it also has a serious defect in which the charge disappears and the signal becomes small.

This constant residual loss is 1 to 5×lo-
A value of 4 was actually measured. Further, in the basic charge transfer device shown in FIGS. 1 and 3a, an inter-electrode gap 13 exists.

Since the distance to the lower semiconductor surface portion of this portion is long, the influence of the voltage VG applied to the electrode 3 is reduced. Potential 11 under electrode 3
When 14 is represented as shown in FIG. 3b, the interelectrode gap 13
The lower potential is equivalently represented as potential 11-5 as shown in FIG. 3c with negative Vc applied. At this time, the capture level &12-5 is lifted up from the capture level 12-4 in Figure 3b, and the electron 4-4 temporarily captured in the capture level 12-4 moves to the capture level 12-5. The number of captured electrons 4-5 is smaller due to the increased potential, which means that more electrons can be captured since there are more vacant electrons. Therefore electrode 3
The trap level below the electrode gap has a greater influence than the trap level below. Also, like the gap between the electrodes, the area around the electrodes has a greater influence, so even in applied charge-coupled devices in which the gap between the electrodes is almost completely removed, the trap levels in the area around the electrodes have a greater effect. This causes the aforementioned charge disappearance and a certain amount of residual loss. In addition to the trap levels that exist on the surface, there are generally trap levels in semiconductor crystals that have the same effect, but their amount is often significantly smaller than that existing on the surface. Normally, it is only necessary to consider the capture progress existing on this surface.

In order to reduce the influence of this surface trap level, a buried channel type charge coupled device (buhedchan type charge coupled device) is
A char coupled device has been devised.

(BellSystemTechnical
Vol. 51, September 1972, pp. 1635-1640, title: “The Buried Cship nneI Char
ge Coupled Device). In this method, a portion (channel) for transferring charges is provided in the semiconductor substrate to reduce the influence of surface trap levels. FIG. 4 shows a cross-sectional view of a buried channel type charge coupled device. The explanation will be given using n-channel as described above. The structural part that is different from the basic charge-coupled device shown in FIG. 1 is an n-layer formed on the surface of the substrate including a source 9 and veraine 6. The operation is as follows: First, a large positive source voltage Vs is externally applied to the source 9 by the source power supply 15, and all the electrons, which are the majority charges in the n-layer 14, are emitted. By doing this, a potential valley 16 is created in the semiconductor as shown in Figure 5a.
form. After that, a positive voltage V is applied to the electrode 3. is applied, and the potential trough 16 is further lowered to form the potential 11-7 shown in FIG. 5b. When electrons 4 are injected into this valley and stored, the potential valley rises a little. In the process of transporting these electrons, the transferred electrons 4 never touch the surface trap level 12, so that there is no disappearance of charges that appear due to the existence of the trap level described above, or a certain amount of loss left behind. However, this buried channel type charge coupled device has major drawbacks. One of them is that the potential valley must be formed deep enough in the semiconductor 1 to prevent the charges 4 from touching the surface. When using a commonly used p-type silicon semiconductor substrate with an impurity concentration of 1 x 1 to 4 cm, the impurity concentration of the n layer is 1 to 2 x 1 to 5, and the thickness of the n layer is 5. It must be about the size of a Buddha. It is extremely difficult to form an n-layer with a thickness of 5 m thick using the diffusion method, which is most commonly used as one of the steps for manufacturing silicon semiconductor devices, and ion implantation is usually used.

Since this ion implantation method forces the implantation into the crystal, it generally destroys the crystal partially and generates crystal defects. This defect is not a preferred method for charge-coupled devices since it acts as a charge trapping quasi. Furthermore, the drawback of this method is that the charge never touches the surface, so
Unlike the basic charge-coupled device shown in FIG. 1, since the channel in the semiconductor is moved from a distance, the effect of the voltage Vc applied to the electrode 3 on the charge is small, and therefore the amount of charge that can be transferred is also significantly small.・It is a thing.

In the case of a buried channel type charge coupled device having the above structure, the amount of transferred charge is about one order of magnitude smaller. If the amount of charge is small, the output voltage is also small, and therefore it is susceptible to conducted noise and the signal-to-noise ratio is also reduced. In addition, since the influence of the electrode 3 is difficult to reach deep into the semiconductor, the influence of the aforementioned gap between the electrodes without an electrode appears more strongly, and a deep potential valley 16 appears below the gap between the electrodes. The amount of charge transferred to the transfer charge 4 becomes too large, and the charge transfer stops.

Therefore, in a buried channel type charge coupled device, the inter-electrode gap must be extremely narrow. The present invention solves the above-mentioned disadvantages of the conventional basic charge-coupled device, which is affected by the trap level, and the small amount of transferred charge of the conventional buried channel type charge-coupled device, and the strong influence of the gap between the electrodes. It eliminates all the disadvantages of transfer, has high transfer efficiency,
To provide a charge-coupled device that can transfer a large amount of charge and is less affected by gaps.

FIG. 6 shows a cross-sectional structure of an embodiment of the present invention.

The present invention is characterized in that a region 17 (for the sake of explanation, it is an n-type layer) having a conductivity different from that of a thin substrate is provided on the semiconductor surface between the source 9 and the drain 6. The difference from the conventional buried channel type charge coupled device is that the charge is passed through the surface part 17 of 2, which requires a high source to completely deplete the n-type region 14, which has a different conductivity from the substrate. Not only is the pulse voltage 15 unnecessary, but since the pulse voltage is transferred through the substrate surface 17, the influence of the pulse voltage applied to the transfer electrode 3 is strong, and the amount of transferred charge is the same as in the basic charge-coupled device. The operation of the present invention will be explained with reference to FIG. 7, which shows the potential distribution similarly to FIGS. 2 and 6. The difference from the basic charge-coupled device in Figure 2 is that there is an n-type layer on the surface, so the potential at the surface is equal to the diffusion potential (potential difference between the n-type layer and the p-type layer, usually about 0.5 to 1.0 V). It's only going down. This means that the trap level distribution 12-9 is always filled with electrons. In this state, a positive voltage VG
When is applied, a potential 11-10 is formed as in FIG. 2, and as the transfer charge 4 is filled up, the potential 11 rises and finally settles down to 11-11. FIGS. 7a and 7b show a case where the elongation Xn of the depletion layer due to the PN junction is equal to that of the n-type region 17 in FIG. 9, which will be described later. Therefore, even if no voltage is applied to the electrode 3, the region 17 becomes a depletion layer and cannot accumulate or transfer charges. At this time, in order to fill the charge, by applying a positive voltage to the electrode 3, the depletion layer is pushed away and charge storage and transfer becomes possible. This is shown in Figure 7b. In this process, the trap level 12 is always filled with electrons 4, and there is no room for newly trapping the transferred charges 4-11. As a result, even if the trap level 12 exists, it will not be affected by the trapping quasi-depletion, and therefore, the phenomenon that the empty trap level distribution 12 traps the transferred charge 4, which is the drawback of the basic charge-coupled device described above, is avoided. Doesn't appear. In addition, in the basic charge-coupled device, as shown in FIG. 3, there is a stronger trapping effect of the trapping level in the interelectrode gap and peripheral portion of the transfer electrode 3, but this effect can also be eliminated by using the present invention. I can do it. It has already been explained with reference to FIG. 3 that, in general, the trap level in the inter-electrode gap and the peripheral area has a stronger effect than under the transport electrode. Taking this phenomenon into consideration, the gist of the present invention can be achieved even if a layer having a conductivity different from that of the substrate is formed only in the inter-electrode gap and the peripheral area, excluding the semiconductor substrate under the electrode. In addition, since the charge-coupled device of the present invention transfers the surface of the substrate, the amount of charge is the same as that of the basic charge-coupled device, and the amount of charge is not transferred by an order of magnitude less than in the case of a buried channel type charge-coupled device, so the signal is It is small and the signal-to-noise ratio does not deteriorate.

Furthermore, one of the major features of the present invention is that the voltage VG applied to the transfer electrode 3 also affects the semiconductor substrate in the inter-electrode gap, and that the voltage VG applied to the transfer electrode 3 is 0.5V to 1.5V between the substrate 1 and the n-layer 17. 0V
Since the potential is fixed by the diffusion potential of The existence of the inter-electrode gap does not significantly impede transfer. 20 mm according to the present invention described above
An n-channel charge-coupled device with a width of electrodes operated satisfactorily even when the length of the inter-electrode gap was 6 mm. In a basic charge coupled device, this length is limited to three meters. Therefore, the present invention has almost no strong transport protection effect of the inter-electrode gap that exists in a buried channel type charge-coupled device, and can operate even in a relatively wide inter-electrode gap, so it becomes extremely difficult to manufacture when the gap is less than 3 fm. Since there is no need to form an inter-electrode gap, the device is easy to manufacture. In the present invention, if the thickness of the n-type layer 17, which has a conductivity different from that of the substrate, is increased or the conductivity thereof is increased, a current constantly flows between the source 9 and the drain 6, and the charge transfer device does not operate normally.

An example is shown in FIG. This is the drain current I of a MOS field effect transistor in which phosphorus atoms were ion-implanted with an energy of 4 eV through an oxide film of 1000 A.
This is the relationship between the square root of D and the gate voltage VG, and the parameter Cr is the implantation amount. 1 for the initial characteristic ■ that does not hit Rinion. The voltage V at which begins to flow. The value of VT is OV, but if you increase the amount of implantation, V
T becomes negative, and Cr = 2 x 1 and 2/At that time, as in ■, it finally becomes 1 with only the VG's impression o. It becomes impossible to shut off. At this point, the charge transfer device no longer operates normally as described above. Therefore, in the present invention, there are limitations on the thickness d of the layer 17 having a conductivity different from that of the substrate and its impurity concentration Cs. Note that the driving of the present invention is possible under the following two conditions.

That is, one is that the region 17 that is not accumulated is depleted (because no current flows), and the potential relationship between the electrodes 3 between the transfer points is that the region 17 where new charges enter is in the forward direction (region where new charges enter). The voltage applied to the electrode is relatively higher than the voltage applied to the electrode at the rear (the area where charge is currently being accumulated and sent to the next stage) (because no charge is transferred). There are two points. As shown in FIG. 8, the above-mentioned first condition is expressed by the threshold value voltage of the MOSTr, and an arbitrary value is searched for depending on the concentration and depth of the region 17.

The important point is that when the region 17 is not blocked by the depletion layer Xn formed by the Pn junction (when XP is positive), the current cannot be stopped unless a negative voltage is applied. This is because electrons are pushed away by negative voltage.
The limited regions of d and Cs will be explained next. FIG. 9 shows an electrode 3, an insulating film 2, and an n-type region 17 in which impurities are distributed in a stepwise manner.
The band structure of the p-type region (substrate) 1 is shown. When a negative pressure VG is applied to the electrode 3, the insulating film 2 and the n-type region 1
Holes are accumulated at the interface 18 of 7, and a depletion layer forms from the interface
only grows. At this time, the surface voltage ◇s is approximately twice the Fermi level FN of the n-type layer 17. Furthermore, a depletion layer Xn extends from the junction 19 between the n-type region 17 and the p-type region 1 toward the n-type layer. At this time, if the depletion layer XD to which ×s and Xn are added exceeds the thickness d of the n-type layer 17, the thickness ×R of the remaining n-type layer is ◯ as shown in FIG. At this time, no current flows. However, if the thickness XD of the depletion layer including Xs and Xn does not exceed d, and therefore XR is positive, an n-type layer remains here constantly, and this becomes a conductive path for electrons, as shown in Figure 8. As shown in the curve (2), even if Vc is increased, the ID constantly flows. These relationships can be expressed as a mathematical formula: xn=Shikiki Seisho. ...■ ×S=No Mikumosha 2 ‐‐‐‐‐‐‐‐‐'5) Vb
i= or FP one FN ......{6
1XD=X30Xn. ．． ．． ．． ．．
．． (7) becomes.

Generally, in actual devices, No>>NA, so Xs>>Xn
That is, Xo is almost exclusively occupied by Xs.

Here, N^ and No are the impurity concentrations of the p-type layer and n-type layer, s is the dielectric constant of the substrate, and q is the elementary charge amount. From the above, the condition for the existence of the n-type layer 17 is that XR>0 in XR=d-Xo """{8}.

× when using silicon for the substrate.

is the relationship shown in FIG. 10. Further, the amount of impurity in the n-type layer, that is, the surface density of impurity, is determined from Xo×CB and has the relationship shown in (■) in FIG. That is, the present invention is the tenth
This is true in the region below the straight line marked ■ in the figure. In addition, the maximum value of the amount of transferred charge that serves as a signal for a charge transfer device including a basic charge-coupled device is 1 to 5 × 1, depending on the operating state.
It's P2/Me.

The charge density Pe induced on the surface of Sj under the electrode is basically expressed by the following equation. oe=dielectric constant of the insulating film, Ti is the thickness of the insulating film, V is the applied voltage, and q is the elementary charge amount.

For example, if we take the value of the Si02 film that is commonly used, then = 3.45 x Goo (Go = 8.854 x 10-
14F/skin) When V=10V and Ti=500△, D
It is calculated as e=3.8×1pi2/ground.

Ti and V are values that can be changed arbitrarily, but as the insulating film becomes thinner, the dielectric strength voltage decreases, so there is a limit.

Further, as for the voltage V, standard values of 5V and 12V are generally used. For 5V system, Ti=200A, 350△, 50
0A is often used.

In this case, De=4.8×1pi2/yo, respectively. 2.7×1 piece 2/ground, 1.9 x I2/c becomes.

Therefore, the maximum amount of charge transferred is approximately 1 to 5×12/ground.

With respect to this transferred charge amount, the charge amount of the n-type layer 17 is approximately 1'10 or more of the signal transferred charge, that is, the impurity surface density CB×
It is sufficient if Xo is 1 and 1 skin - 2 or more. This requires an S/N ratio of 40 to 6 B when normally transferring charges. 4. In the old and new versions, the maximum transfer charge amount is 1'10 or more 6MB
Then, 1/1000 is the minimum amount of transferred charge, and the noise is:
It must be less than this.

Therefore, in an actual device, there is a margin of 1'100,
Harmful traps are filled based on a value of 1/1000th of a tone or more, that is, a charge amount of 1/10th. Although the amount of charge in the trap is not about 1/10, it is preferable that the amount of charge is 1/10 or more because it affects the time to fill the trap. The upper limit should be determined in particular with consideration to actual use.

Here, CB represents the concentration of the substrate (bulk), and is a general term for acceptor concentration NA and donor concentration ND.

Further, the impurity concentration N^ of the p-type substrate is usually selected in the range of 1.4 to 1.6/s in a charge transfer device including a basic charge coupled device. In comparison, the n-type layer impurity concentration No can be controlled with sufficient precision at 1 to 5/ground or higher. Considering these limiting conditions, the values of No and Xo that can be used in the present invention in FIG. 10 are 5/mass or more and 1 or less, respectively. Further, the amount of impurity in the n-type layer 17 can be allowed to be approximately the same as the transfer charge of the signal. If it exceeds this, the charge of the n-type layer will be detected in the output in addition to the signal, and the characteristics will not only deteriorate, but the thickness of the n-type layer at this time, XD, must be less than 100△ from Fig. 10. However, since such a thin layer is actually very difficult to form, the gist of the present invention requires that the impurity surface density of the n-type layer be 1 to 3/3 at maximum. At this time n
The impurity concentration of the mold layer is 1 to 9/th. That is, in the present invention, the minimum impurity surface density of the n-type layer is 1 and 1/2 or more, in which case the impurity concentration is 1 and 5/mass or more, so the thickness x D is 1 mm or less, and the maximum impurity surface density is 1 and 5/mass or more. The density is less than 1 to 3/mass, at which time the thickness is x.

is 100△ or more, so the impurity concentration is 1 to 9/average or less. In addition, in the above description of the present invention, the n-type layer 17
Although it is assumed that the impurity concentration is distributed in a stepwise manner, in reality, it is often close to a Gaussian distribution, and the above-mentioned values have to be slightly changed, but this is essentially unrelated to the gist of the present invention.

The present invention does not limit the means for realizing the structure of the present invention.

A thin substrate with a thickness of 1 m or less and a layer 1 with different conductivity
7 can be formed by thermal diffusion, ion implantation, which are commonly used in semiconductor manufacturing processes, or by directly depositing an impurity-containing insulating film, such as a silicon oxide film 20 containing phosphorus or shelf elements, on the silicon surface. A method may be used in which the material is deposited and then heat-treated at several 100 degrees Celsius to cause slight diffusion. This is shown in FIG. The reason why these concentrations, thicknesses, areal densities, etc. may be the same as those in the above-mentioned embodiments is as follows.

That is, in general, the surface of the Si substrate in the gap between the electrodes 3 is hardly affected by the electrodes 3.

This is because the three crab pole gaps are far apart. Therefore,
This part of the trap has the greatest effect.

Therefore, if the electrode gap shown in Fig. 6 has the most suitable structure for operation, the impurity concentration and structure of this part remain the same as the first one.
This can be applied to the gap shown in Figure 2. Basically,
Since the traps in the gap have the greatest influence, if a region 17 exists under the electrode as shown in FIG. 12, it is sufficient to provide the same concentration, thickness, and areal density in the gap as in FIG. 6 of the present invention. It is.

In order to explain the present invention, p-type silicon is used as a semiconductor substrate,
N-type silicon was used for the layer 17, which has a conductivity different from that of the substrate, so that the transferred charges were electrons, but if the conductivities were reversed, the transferred charges would become holes, and all that was needed was to reverse the polarity of the applied voltage group. Yes, there is essentially no difference in the gist of the present invention.

[Brief explanation of drawings]

Figures 1 and 2 are diagrams showing the cross-sectional structure of a conventional basic charge-coupled device and its potential distribution, Figure 3 is a diagram showing the potential distribution in the gap between magnetic poles, and Figures 4 and 5 are embedded FIGS. 6 and 7 are diagrams showing the cross-sectional structure of a channel-type charge-coupled device and its potential distribution, FIGS. 6 and 7 are diagrams showing the cross-sectional structure of the charge transfer device of the present invention and its potential distribution, and FIGS. Illustrating the invention, lo-Vc curve and band structure, 1st
0 is a diagram showing a limited area of the present invention, and FIG. 11 is a diagram showing an embodiment of the present invention. Explanation of drawing numbers, 1...Semiconductor substrate, 2...
...Insulating film, 3...Transfer electrode, 4...
・Transfer charge, 5...Drain, 6...
Drain electrode, 7...Drain power supply, 8...
...Load resistance, 9...Source, 10...
... Source electrode, 11... Potential, 12...
...Capture level distribution, 13...Inter-electrode gap, 14.
...Layer with conductivity different from that of the substrate, 15...
Source power supply, 16...Valley of potential, 17...
・・Layer with a thin substrate and different torpor conductivity, 18・・・・・
・Interface between the insulating film and the substrate, 19... Junction between the substrate and a layer with a different conductivity/property from the substrate, 20...
An insulating film containing impurities. Diagram O]・2 Diagram 4 Diagram O3★S Diagram★Tsu Diagram

Claims (1)

[Claims] 1 A semiconductor substrate of a first conductivity type having an insulating film on its main surface, and an electrode array consisting of a plurality of transfer electrodes provided on the insulating film at predetermined intervals, In a charge transfer device that sequentially transfers charges of a second conductivity type to a surface portion of a semiconductor substrate under an insulating film by externally applied pulses, an impurity concentration of 10^ is applied to the surface region of the semiconductor substrate.
1^5~10^1^9/cm^3, thickness 1μm~100
Å, impurity surface density 10^1^1 ~ 10^1^3/cm^
A surface layer having a second conductivity type in a range of 2 is provided, and the charge of the second conductivity type is sequentially applied to the surface portion of the semiconductor substrate on which the surface layer is provided by the externally applied pulse. The charge transfer device is characterized in that the surface layer is a second conductivity type impurity layer continuously formed along the electrode row in a surface region of the semiconductor substrate below the electrode row.