JPS60223253A - Intermediate buffering system of communication processing system - Google Patents

Intermediate buffering system of communication processing system

Info

Publication number
JPS60223253A
JPS60223253A JP59077559A JP7755984A JPS60223253A JP S60223253 A JPS60223253 A JP S60223253A JP 59077559 A JP59077559 A JP 59077559A JP 7755984 A JP7755984 A JP 7755984A JP S60223253 A JPS60223253 A JP S60223253A
Authority
JP
Japan
Prior art keywords
memory
data
communication processing
file memory
file
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59077559A
Other languages
Japanese (ja)
Inventor
Hiroyuki Omura
大村 弘之
Fumio Adachi
安達 文夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP59077559A priority Critical patent/JPS60223253A/en
Publication of JPS60223253A publication Critical patent/JPS60223253A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/54Store-and-forward switching systems 
    • H04L12/56Packet switching systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

PURPOSE:To improve the throughout of a storage system by providing a common buffer memory between circuit correspondence parts and a file memory. CONSTITUTION:A common buffer memory 5 is provided between circuit correspondence parts 1-1-1-m and a file memory 3. The parts 1-1-1-m contain n-face buffer memories 2-1-2-n respectively and buffer data successively to transfer these data to a terminal connected to the memory 5 or either one of circuits a1-am. The transfer request given from the part 1-1 is immediately accepted by the memory 5 as long as the memory 5 has an idle area. While the queuing occurs at memories 2-1-2-n if the memory 5 is filled fully.

Description

【発明の詳細な説明】 (発明の属する分野) 本発明は、蓄積型通信処理装置において、共通バッファ
メモリを設置することにより、ファイルメモリの転送能
力を向上させ1通信速度の異なる端末を効果的に通信処
理装置に収容する通信処理システムにおける中間バッフ
ァリング方式に関“するものである。
DETAILED DESCRIPTION OF THE INVENTION (Field to which the invention pertains) The present invention improves the transfer capacity of file memory by installing a common buffer memory in a storage type communication processing device, and effectively connects terminals with different communication speeds. This invention relates to an intermediate buffering method in a communication processing system accommodated in a communication processing device.

(従来の技術) 第1図は従来の蓄積型通信処理装置の構成を示すもので
、l−1−1−mは回線対応部、2−1〜2−nはバッ
ファメモリ、3はファイルメモリ、4は中央制御装置で
ある。
(Prior Art) Fig. 1 shows the configuration of a conventional storage type communication processing device, in which l-1-1-m is a line support section, 2-1 to 2-n are buffer memories, and 3 is a file memory. , 4 is a central control unit.

回線対応部1−1において、回線a1に接続されている
端末からデータを受信する場合、n面あるパップアメモ
リ2−1〜2−nのn−1面が満杯となり、もう1面が
満杯になる前に少なくとも1面が空きとならなければバ
ッファメモリのオーバフローとなる。また、ファイルメ
モリ3から回線対応部を介して端末へデータを送信する
場合、回線対応部内のバッファメモリがすべて空きとな
り、端末に送るべきデータが無くなった場合はアンダー
フローとなる。このオーバフロー/アンデフローの確率
は端末の通信速度に依存し、高速な通信速度を持つ端末
に対しては高くなる。従って高速な端末に対してはシス
テムのサービス品質が低下する欠点があった。また、高
速な端末に対するサービス品質を向上させるために、ス
ループットの高い属性を有した蓄積媒体を使用すること
が考えられるが、低速な端末に対しては余剰設計となる
欠点があった。
When the line support unit 1-1 receives data from the terminal connected to the line a1, the n-1 side of the pap memory 2-1 to 2-n, which has n sides, becomes full, and the other side becomes full. If at least one side is not made free beforehand, the buffer memory will overflow. Furthermore, when data is transmitted from the file memory 3 to the terminal via the line correspondence section, an underflow occurs if the buffer memory in the line correspondence section becomes all empty and there is no more data to be sent to the terminal. The probability of overflow/undeflow depends on the communication speed of the terminal, and increases for terminals with high communication speed. Therefore, there is a drawback that the service quality of the system deteriorates for high-speed terminals. Furthermore, in order to improve the quality of service for high-speed terminals, it is conceivable to use a storage medium with attributes of high throughput, but this has the drawback of requiring a redundant design for low-speed terminals.

(発明の目的) 本発明は、これらの欠点を解決するために、回線対応部
とファイルメモリとの間に共通バッファメモリを設け、
蓄積系のスループットを向上させるようにした1通信処
理システムにおける中間バッファリング方式を提供しよ
うとするものである。
(Object of the Invention) In order to solve these drawbacks, the present invention provides a common buffer memory between the line corresponding section and the file memory,
The present invention attempts to provide an intermediate buffering method in a communication processing system that improves the throughput of the storage system.

(発明の構成および作用) 第2図は本発明の構成を示す一実施例のブロック図で、
l−1〜11は回線対応部、2−1〜2−nはバッファ
メモリ、3はファイルメモリ、4は中央制御装置を示す
ことは第1図と同じであり1回線対応部i−t〜11と
ファイルメモリ3との間に共通バッファメモリ5を設け
た点が第1図と異なっている。
(Structure and operation of the invention) FIG. 2 is a block diagram of an embodiment showing the structure of the invention.
1-1 to 11 are line corresponding parts, 2-1 to 2-n are buffer memories, 3 is a file memory, and 4 is a central control unit, which is the same as in FIG. The difference from FIG. 1 is that a common buffer memory 5 is provided between the file memory 3 and the file memory 3.

ここで、回線対応部1−t−i−は、それぞれn面のバ
ッファメモリ2−1〜2−nを有し、順次データをバッ
ファリングして共通バッファメモリ5または回線al”
a+*の中の何れかに接続されている端末に転送する。
Here, the line corresponding section 1-t-i- has n-sided buffer memories 2-1 to 2-n, respectively, and sequentially buffers data to the common buffer memory 5 or the line al''.
Transfer to any terminal connected to a+*.

いま1回線対応部1−1からファイルメモリ3ヘデータ
を転送する場合を考える。共通バッファメモリ5に空き
がある時は、回線対応部1−1がらの転送要求は直ちに
共通バッファメモリ5に受け付けられる。共通バッファ
メモリ5が満杯のときは、回線対応部1−1のバッファ
メモリ2−1〜2−nで待ちが生ずる。この状態の時に
従来の方式と同様にオーバフロー/アンプフロー確率が
発生する可能性がある。
Let us now consider the case where data is transferred from the single-line correspondence section 1-1 to the file memory 3. When the common buffer memory 5 has free space, the transfer request from the line correspondence section 1-1 is immediately accepted by the common buffer memory 5. When the common buffer memory 5 is full, a wait occurs in the buffer memories 2-1 to 2-n of the line handling section 1-1. In this state, there is a possibility that an overflow/amplifier flow probability will occur as in the conventional system.

第3図は、オーバフロー/アンプフロー確率を一定とし
て、従来の方式と本発明について、端末の通信速度Tv
と、ファイルメモリ3の転送能力Fdの関係を示したも
ので、Iは本発明の方式、■は従来の方式における特性
曲線である。
FIG. 3 shows the terminal communication speed Tv for the conventional method and the present invention, with the overflow/amplifier flow probability constant.
3 shows the relationship between the transfer capacity Fd and the transfer capacity Fd of the file memory 3, where I is the characteristic curve of the method of the present invention and ■ is the characteristic curve of the conventional method.

上記特性曲線Iから本発明は、高速な端末に対しては高
い転送能力を有することがわかる。従って高速な端末に
対しては蓄積面を有効に使用でき経済的である。これは
、高速な端末のピークトラヒックを共通バッファメモリ
5で平滑化するためである。また、従来の方式はシステ
ムに収容可能な端末の通信速度に制限があるが、本発明
の方式には制限はない。
It can be seen from the above characteristic curve I that the present invention has a high transfer capacity for high-speed terminals. Therefore, for high-speed terminals, the storage area can be used effectively and it is economical. This is to smooth out the peak traffic of high-speed terminals using the common buffer memory 5. Further, although the conventional method has a limit on the communication speed of terminals that can be accommodated in the system, the method of the present invention has no limit.

第4図は通信速度の異なる端末が混在している場合にこ
れらの端末を収容した場合の転送能力特性を示すもので
、αは全通信トラヒック量に対する高速端末の通信トラ
ヒック量の比率+ Fdは転送能力で、1は本発明の方
式、■は従来の方式の特性曲線を示し、本発明の方式は
従来の方式に比べて比率αに対する転送能力Fdの変動
が小さいことがわかる。すなわち、システム設計におい
て、従来の方式は変動率が大きいため、余剰設計が必要
であったのに対し、本発明の方式は通信速度の異なる端
末の通信トラヒック量比率の変動に対する余剰設計をす
る必要が無く経済的である。
Figure 4 shows the transfer capacity characteristics when accommodating terminals with different communication speeds, where α is the ratio of communication traffic of high-speed terminals to total communication traffic + Fd is In terms of transfer capacity, 1 indicates the characteristic curve of the method of the present invention, and ■ indicates the characteristic curve of the conventional method. It can be seen that the method of the present invention has smaller fluctuations in the transfer capacity Fd with respect to the ratio α than the conventional method. In other words, in system design, the conventional method requires redundant design due to large fluctuation rate, whereas the method of the present invention requires redundant design to accommodate fluctuations in the communication traffic ratio of terminals with different communication speeds. It is economical as there is no problem.

(発明の効果) 以上説明したように、本発明は、蓄積型通信処理装置に
おいて、回線対応部とファイルメモリとの中間に共通バ
ッファメモリを設け、高速な端末のピークトラヒックを
平滑化させてファイルメモリの転送能力を十分に生かす
ことができ、システムの有効利用を図れるという大きな
利点がある。
(Effects of the Invention) As explained above, the present invention provides a common buffer memory between the line handling section and the file memory in a storage type communication processing device, smoothes peak traffic of high-speed terminals, This has the great advantage of making full use of the memory's transfer ability and making effective use of the system.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の蓄積型通信処理装置の構成を示す図、第
2図は本発明の構成を示す一実施例のブロック図、第3
図及び第4図は従来の方式と本発明について転送能力特
性を示した図である。 ■−1〜I−m・・・回線対応部、2−1〜2−n・・
・バッファメモリ、 3 ・・・ ファイルメモリ、 
4中央制御装置、 5・・・共通バッファメモリ、a】
〜am甲回線。
FIG. 1 is a diagram showing the configuration of a conventional storage type communication processing device, FIG. 2 is a block diagram of an embodiment showing the configuration of the present invention, and FIG.
4 and 4 are diagrams showing the transfer capacity characteristics of the conventional system and the present invention. ■-1~I-m...Line support section, 2-1~2-n...
・Buffer memory, 3... File memory,
4 central control unit, 5... common buffer memory, a]
~am A line.

Claims (1)

【特許請求の範囲】[Claims] データを蓄積するファイルメモリと、端末からのデータ
を順次バッファリングして前記ファイルメモリに転送し
、あるいは、前記ファイルメモリからデータを受取りこ
れを端末に出力する複数の回線対応部を有し、データの
蓄積および通信処理を行う通信処理装置において、前記
回線対応部と前記ファイルメモリとの間に共通バッファ
メモリを設け、端末から前記回線対応部に入力されたデ
ータは前記共通バッファメモリに一旦蓄積した後前記フ
ァイルメモリに転送し、前記ファイルメモリのデータを
端末に出力する時は、そのファイルメモリのデータを前
記共通バッファメモリに読1げた後に前記回線対応部に
転送するようにしたことを特徴とする通信処理システム
における中間バッファリング方式。
It has a file memory for accumulating data, and a plurality of line support units that sequentially buffer data from a terminal and transfer it to the file memory, or receive data from the file memory and output it to the terminal. In a communication processing device that performs storage and communication processing, a common buffer memory is provided between the line corresponding section and the file memory, and data input from a terminal to the line corresponding section is temporarily stored in the common buffer memory. and when outputting the data in the file memory to the terminal, the data in the file memory is read into the common buffer memory and then transferred to the line corresponding section. An intermediate buffering method for communication processing systems.
JP59077559A 1984-04-19 1984-04-19 Intermediate buffering system of communication processing system Pending JPS60223253A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59077559A JPS60223253A (en) 1984-04-19 1984-04-19 Intermediate buffering system of communication processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59077559A JPS60223253A (en) 1984-04-19 1984-04-19 Intermediate buffering system of communication processing system

Publications (1)

Publication Number Publication Date
JPS60223253A true JPS60223253A (en) 1985-11-07

Family

ID=13637371

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59077559A Pending JPS60223253A (en) 1984-04-19 1984-04-19 Intermediate buffering system of communication processing system

Country Status (1)

Country Link
JP (1) JPS60223253A (en)

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