JPS60222819A - Optical integrated circuit and its production - Google Patents

Optical integrated circuit and its production

Info

Publication number
JPS60222819A
JPS60222819A JP7855784A JP7855784A JPS60222819A JP S60222819 A JPS60222819 A JP S60222819A JP 7855784 A JP7855784 A JP 7855784A JP 7855784 A JP7855784 A JP 7855784A JP S60222819 A JPS60222819 A JP S60222819A
Authority
JP
Japan
Prior art keywords
ridge
electrode
optical waveguide
optical
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7855784A
Other languages
Japanese (ja)
Inventor
Akishi Hongo
晃史 本郷
Hiroaki Inoue
宏明 井上
Takeyuki Hiruma
健之 比留間
Hiroyoshi Matsumura
宏善 松村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Cable Ltd
Hitachi Ltd
Original Assignee
Hitachi Cable Ltd
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Cable Ltd, Hitachi Ltd filed Critical Hitachi Cable Ltd
Priority to JP7855784A priority Critical patent/JPS60222819A/en
Publication of JPS60222819A publication Critical patent/JPS60222819A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To improve the life and reliability of an optical element by providing an insulating layer under an electrode which impresses a driving voltage thereby obviating generation of the breakdown of the electrode. CONSTITUTION:An insulating film 7 which flattens the shape of a ridge is formed on one surface of a substrate 4 after a ridge type waveguide 2 having the metallic electrode 1 is formed thereon. The tentire surface of the film 7 is thereafter uniformly etched and the film 7 on the ridge is thinner than the film 7 except on the ridge and therefor only the electrode 1 on the waveguide can be exposed. The layer 7 is formed under a bonding pad 6 when the pad 6 is formed by lift-off, etc. The easy formation of the layer 7 only under the pad 6 is thus made possible without using a mask.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は、光通信、光情報処理分野で用いられる光集積
回路及びその製作法に関するもので、特に電気光学効果
を利用する化合物半導体光集積回路に係るものである。
[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to an optical integrated circuit used in the fields of optical communications and optical information processing, and a method for manufacturing the same, and in particular to a compound semiconductor optical integrated circuit that utilizes electro-optic effects. This is related to.

〔発明の背景〕[Background of the invention]

近年、光通信の実用化が急速に進展しており、光部品の
小形化、高信頼化に対する研究開発が盛んに行なわれて
いる。電気光学効果を用いた導波路型光素子は、高速動
作が可能で、従来主に、大きな電気光学係数をもつ、L
iNb0iなどの誘電体材料が用いられてきた。しかし
ながら光源を含めアイソレータ、変調器などの個々の光
素子を一体化し、高密度の集積化を目ざすという観点か
らGaAs、 I n Pなどの化合物半導体材料を用
いた光集積回路も活発に研究がなされている。このよう
な化合物半導体材料による光素子は、リッジ形。
In recent years, the practical application of optical communications has progressed rapidly, and research and development are actively being carried out to make optical components smaller and more reliable. Waveguide-type optical devices using the electro-optic effect are capable of high-speed operation, and have conventionally mainly been used with L, which has a large electro-optic coefficient.
Dielectric materials such as iNbOi have been used. However, from the perspective of integrating individual optical elements such as light sources, isolators, and modulators, and aiming for high-density integration, active research is also being conducted into optical integrated circuits using compound semiconductor materials such as GaAs and InP. ing. Optical devices made of such compound semiconductor materials are ridge-shaped.

埋込形、装荷形などの光導波路が基本的な構成要素とな
っている。これらの3次元光導波路のうちリッジ型光導
波路は、光のエネルギー閉じ込め率が良好であり、曲率
の71%さな曲り導波路を形成し得る特長をもち、また
形成法も比較的容易である。
The basic component is an optical waveguide, such as an embedded type or a loaded type. Among these three-dimensional optical waveguides, ridge-type optical waveguides have a good optical energy confinement rate, can form curved waveguides with a curvature as small as 71%, and are relatively easy to form. .

第1図にリッジ形光導波路からなる方向性結合器の一例
を示す。光は主に電極直下のn −GaAs層に閉じ込
められる。光導波路上のAQはn ”−GaAs層とシ
ョットキー接触をしており、逆方向電圧を印加すること
により、電極直下の屈折率を変化させる。一般にこのよ
うな構造では光の閉じ込めは厚さ方向の方が横方向より
も強く、光導波路内の強度は楕円分布をしている。従っ
て光ファイバとの。
FIG. 1 shows an example of a directional coupler consisting of a ridge-shaped optical waveguide. Light is mainly confined in the n-GaAs layer directly under the electrode. The AQ on the optical waveguide has Schottky contact with the n''-GaAs layer, and applying a reverse voltage changes the refractive index directly under the electrode.Generally, in such a structure, light confinement depends on the thickness. The intensity in the optical waveguide is stronger in the direction than in the transverse direction, and has an elliptical distribution.Therefore, the intensity is stronger in the optical fiber.

結合を考慮した場合、リッジを高くし、強度分布を円形
に近づけ、大きな結合効率が得られるようにする必要が
ある。また、曲がりによる放射などによって生じる。
When considering coupling, it is necessary to make the ridge high and make the intensity distribution close to a circular shape to obtain a high coupling efficiency. It also occurs due to radiation caused by bending.

光導波路間の漏話を防ぐため、光導波路外ではスラブモ
ードがカットオフ附近になることが望ましい。先導波路
幅は単一モードのみが励振されるように10μm程度以
下と極めて細い。このため外部電極との接続には光導波
路の外側にボンディングパットを形成する必要がある。
In order to prevent crosstalk between optical waveguides, it is desirable that the slab mode is near the cutoff outside the optical waveguide. The width of the leading waveguide is extremely narrow, approximately 10 μm or less, so that only a single mode is excited. Therefore, it is necessary to form a bonding pad on the outside of the optical waveguide for connection with an external electrode.

このボンディングバットの下の光導波層はスラブモード
がカットオフ近傍になる膜厚であり、例えば波長を1.
3pmとし、n GaAs、 n 十GaAsの屈折率
をそれぞれ3.44,3.43とすれば、約1.2μm
の厚さとなる。従って、ボンディングバットのところで
、比較的低い駆動電圧でブレークダウンをおこす可能性
があり、光素子の寿命及び信頼性を極端に劣化させるも
のである。
The optical waveguide layer under this bonding butt has a thickness such that the slab mode is close to the cutoff, and the wavelength is, for example, 1.
3 pm, and the refractive index of n GaAs and n 10 GaAs are 3.44 and 3.43, respectively, then approximately 1.2 μm
The thickness will be . Therefore, breakdown may occur at the bonding butt at a relatively low driving voltage, which extremely deteriorates the life and reliability of the optical device.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、前述のブレークダウンによる電極破壊
を防ぐためになされたものであり、信頼性の高い光集積
回路とその製作法を提供することにある。
An object of the present invention is to provide a highly reliable optical integrated circuit and a method for manufacturing the same, which has been made to prevent electrode destruction due to the breakdown described above.

〔発明の概要〕[Summary of the invention]

本発明による光素子の構造は第2図に示すようになる。 The structure of the optical device according to the present invention is shown in FIG.

すなわち、光導波路の外側のエピタキシャル膜上に絶縁
層を介してボンディングパットが形成されている。
That is, a bonding pad is formed on the epitaxial film outside the optical waveguide with an insulating layer interposed therebetween.

以下、その製作法について第3図を用いて説明する。ま
ず、金属電極を有するリッジ形光導波路を形成したのち
、基板−面にリッジの形状を平坦化ならしめる絶縁膜を
形成する(3−1)、次に絶縁膜全面を一様にエツチン
グすれば、リッジ上の絶縁膜はリッジ外の絶縁膜よりも
薄いので、光導波路上の金属電極のみを露出させること
ができる(3−2)。最後にリフトオフなどによってボ
ンディングバットを形成すれば、ボンディングパットの
下に、絶縁層が形成される(3−3)。なお、ヘキ開な
どの理由で不要な絶縁膜を除去する場合には、ボンディ
ングパットをマスクとして、・不要な絶縁膜を選択的に
エツチングしてしまえばよい。リッジ上に絶縁膜を形成
したのち、リッジ上にスルーホールを形成し、外部電極
との接続を行なうことも可能であるが、極めて細い導波
路上にスルーホールを形成することは製作上高い精度を
要する。本発明によれば、マスクを使用することなく、
極めて容易にボンディングバットの下にのみ絶縁層を形
成することができる。
The manufacturing method will be explained below using FIG. 3. First, after forming a ridge-shaped optical waveguide with metal electrodes, an insulating film is formed on the substrate surface to flatten the ridge shape (3-1), and then the entire surface of the insulating film is uniformly etched. Since the insulating film on the ridge is thinner than the insulating film outside the ridge, only the metal electrode on the optical waveguide can be exposed (3-2). Finally, if a bonding butt is formed by lift-off or the like, an insulating layer is formed under the bonding pad (3-3). Note that when removing an unnecessary insulating film for reasons such as cleavage, the unnecessary insulating film can be selectively etched using the bonding pad as a mask. After forming an insulating film on the ridge, it is possible to form a through hole on the ridge and connect it to an external electrode, but forming a through hole on an extremely thin waveguide requires high manufacturing precision. It takes. According to the present invention, without using a mask,
The insulating layer can be formed only under the bonding bat very easily.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明による実施例を説明する。 Examples according to the present invention will be described below.

n ” GaAs基板上にMOCVD法により厚さ3μ
mのn GaAsのエピタキシャル層を形成した。この
基板にAQを蒸着した後、ホトレジストによって光導波
路のパターニングを行ない、イオンミリングによってリ
ッジ形光導波路を形成した。光導波路の幅は5μm、高
さは2μmである。このリッジ形光導波路の形状を平坦
化ならしめる絶縁膜としてポリイミドイソインドロキナ
ゾリンジオン樹脂又はポリイミド樹脂を選び、スピンナ
ーによって全面塗布して、全面に樹脂層を形成するにの
とき樹脂層の厚さは、光導波路外では0.7μmである
のに対し、光導波路上では0.2μmであった。次に、
樹脂層を塗布した基板を再びイオンミリングによってエ
ツチングする。第4図に示すように、加速電圧600V
、イオン電流密度0.35mA/cmZのとき、初期到
達真空度が10−”ton以下のときでは、樹脂層及び
AQのエツチング速度はそれぞれ130人/win p
 150人/winであり、再現性のよいエツチングが
可能である。また初期到達真空度が10”ton以上の
場合でも、到達真空度に対し、樹脂層のエツチング速度
は増大するのに対し、AQのエツチング速度は逆に減小
するのに対し、AQのエツチング速度は逆に減小する。
3μ thick by MOCVD method on GaAs substrate.
An epitaxial layer of m n GaAs was formed. After AQ was deposited on this substrate, an optical waveguide was patterned using photoresist, and a ridge-shaped optical waveguide was formed by ion milling. The width of the optical waveguide is 5 μm and the height is 2 μm. Select polyimide isoindoquinazolinedione resin or polyimide resin as an insulating film to flatten the shape of this ridge-shaped optical waveguide, and apply it to the entire surface with a spinner to form a resin layer on the entire surface. was 0.7 μm outside the optical waveguide, while it was 0.2 μm on the optical waveguide. next,
The substrate coated with the resin layer is etched again by ion milling. As shown in Figure 4, acceleration voltage 600V
, when the ion current density is 0.35 mA/cmZ and the initial vacuum level is 10-''ton or less, the etching rate of the resin layer and AQ is 130 people/win p.
150 people/win, and etching with good reproducibility is possible. Furthermore, even when the initial achieved vacuum level is 10" tons or more, the etching rate of the resin layer increases with respect to the achieved vacuum level, whereas the etching rate of AQ decreases, whereas the etching rate of AQ decreases. On the contrary, it decreases.

従ってエツチングしすぎによる光導波路上のAQの断線
の危険性は小さく、光導波路上での樹脂層(絶縁層)の
膜厚が多少不離かな場合でも、光導波路上のAQのみを
露出させることは容易である。最後にリフトオフによっ
てポンディングパッドを形成する。光導波路の外側に樹
脂層があるので、高いリッジの光導波路でも容易にリフ
トオフが可能である。本発明は方向性結合器形の光スィ
ッチに適用され、最終的に光スィッチの入出力端面はヘ
キ関する。このとき樹脂層があると良好なヘキ表面が得
られないので、ポンディングパッドの下以外の樹脂層は
プラブマアツシャーによってエツチング除去した、ポン
ディングパッドの下に樹脂層を設けないとき駆動電圧1
7V付近でブレークダウンによる破壊が生じたが、樹脂
層を介入させたことにより、絶縁破壊は30Vまで改善
された。
Therefore, the risk of disconnection of AQ on the optical waveguide due to excessive etching is small, and even if the thickness of the resin layer (insulating layer) on the optical waveguide is slightly different, it is possible to expose only AQ on the optical waveguide. It's easy. Finally, a bonding pad is formed by lift-off. Since there is a resin layer on the outside of the optical waveguide, even an optical waveguide with a high ridge can be easily lifted off. The present invention is applied to a directional coupler-type optical switch, and ultimately relates to input and output end faces of the optical switch. At this time, if there is a resin layer, a good cracking surface cannot be obtained, so the resin layer other than the one under the bonding pad is etched away using a plastic atsher. 1
Breakdown due to breakdown occurred at around 7V, but by intervening the resin layer, the dielectric breakdown was improved to 30V.

〔発明の効果〕〔Effect of the invention〕

以上の実施例で説明したように、本発明によれば、容易
な製作方法により、大きな駆動電圧を印加させても電極
の破壊を生じさせることがなく、光素子の寿命及び信頼
性という点でその効果は大きい。
As explained in the above embodiments, according to the present invention, the electrodes do not break even when a large driving voltage is applied, and the life and reliability of the optical device is improved due to the easy manufacturing method. The effect is great.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は化合物半導体を用いたリッジ形方向性結合器の
断面の一例である。第2図は駆動電圧を印加するボンデ
ィングパットの下に樹脂層(絶縁層)を介した光素子の
断面図である。第3図は第2図の構造をもつ光素子の作
製プロセスを示したものである。第4図は、イオンミリ
ングによるPIQとAQのエツチング速度を到達真空度
に対して示したものである。 1金属電極、2・・・リッジ形光導波路、3・・・高抵
抗エピタキシャル膜、4・・・基板、5・・・裏面電極
、6ボンデイングパツト、7・・・樹脂層(絶縁層)。
FIG. 1 is an example of a cross section of a ridge-type directional coupler using a compound semiconductor. FIG. 2 is a sectional view of an optical element with a resin layer (insulating layer) interposed below a bonding pad to which a driving voltage is applied. FIG. 3 shows a manufacturing process for an optical device having the structure shown in FIG. FIG. 4 shows the etching rate of PIQ and AQ by ion milling with respect to the ultimate vacuum degree. 1 metal electrode, 2... ridge type optical waveguide, 3... high resistance epitaxial film, 4... substrate, 5... back electrode, 6 bonding pad, 7... resin layer (insulating layer).

Claims (1)

【特許請求の範囲】 ■、電気光学効果を用いる化合物半導体光集積回路にお
いて、ブレークダウンによる電極破壊を改善するため、
駆動電圧を印加する電極の下に絶縁層を設けたことを特
徴とする光集積回路。 2、金属電極を有するリッジ型光導波路を構成した化合
物半導体の基板−面に、平坦化可能な絶縁膜を形成し、
この絶縁膜を一様にエツチングすることによって、リッ
ジ型光導波路の上部のみを露出させ、光導波路上の金属
電極と、I@縁膜上に形成するボンディングパットを接
続ならしめることを特徴とする Th光集積回路の製作法。
[Claims] (1) In order to improve electrode destruction due to breakdown in a compound semiconductor optical integrated circuit using the electro-optic effect,
An optical integrated circuit characterized in that an insulating layer is provided under an electrode to which a driving voltage is applied. 2. Forming a planarizable insulating film on the substrate surface of the compound semiconductor that constitutes the ridge-type optical waveguide with metal electrodes,
By uniformly etching this insulating film, only the upper part of the ridge-type optical waveguide is exposed, and the metal electrode on the optical waveguide is connected to the bonding pad formed on the I@edge film. Method of manufacturing Th optical integrated circuit.
JP7855784A 1984-04-20 1984-04-20 Optical integrated circuit and its production Pending JPS60222819A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7855784A JPS60222819A (en) 1984-04-20 1984-04-20 Optical integrated circuit and its production

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7855784A JPS60222819A (en) 1984-04-20 1984-04-20 Optical integrated circuit and its production

Publications (1)

Publication Number Publication Date
JPS60222819A true JPS60222819A (en) 1985-11-07

Family

ID=13665206

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7855784A Pending JPS60222819A (en) 1984-04-20 1984-04-20 Optical integrated circuit and its production

Country Status (1)

Country Link
JP (1) JPS60222819A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016218406A (en) * 2015-05-26 2016-12-22 富士通オプティカルコンポーネンツ株式会社 Optical Modulator Module

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5165955A (en) * 1974-12-05 1976-06-08 Nippon Telegraph & Telephone DOHAGATAHIKARISEIGYOSOSHI
JPS53139550A (en) * 1977-05-12 1978-12-05 Sumitomo Electric Ind Ltd Dielectric waveguide with electrodes and production of the same

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5165955A (en) * 1974-12-05 1976-06-08 Nippon Telegraph & Telephone DOHAGATAHIKARISEIGYOSOSHI
JPS53139550A (en) * 1977-05-12 1978-12-05 Sumitomo Electric Ind Ltd Dielectric waveguide with electrodes and production of the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016218406A (en) * 2015-05-26 2016-12-22 富士通オプティカルコンポーネンツ株式会社 Optical Modulator Module

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