JPS60220771A - Picture-area memory switching controlling system - Google Patents

Picture-area memory switching controlling system

Info

Publication number
JPS60220771A
JPS60220771A JP59078074A JP7807484A JPS60220771A JP S60220771 A JPS60220771 A JP S60220771A JP 59078074 A JP59078074 A JP 59078074A JP 7807484 A JP7807484 A JP 7807484A JP S60220771 A JPS60220771 A JP S60220771A
Authority
JP
Japan
Prior art keywords
buffer
picture
screen memory
data
area memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59078074A
Other languages
Japanese (ja)
Other versions
JPH0432748B2 (en
Inventor
Yoshinori Sugawara
菅原 芳典
Shigenori Koyata
小谷田 重則
Norio Shimada
嶌田 典郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59078074A priority Critical patent/JPS60220771A/en
Publication of JPS60220771A publication Critical patent/JPS60220771A/en
Publication of JPH0432748B2 publication Critical patent/JPH0432748B2/ja
Granted legal-status Critical Current

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  • Dot-Matrix Printers And Others (AREA)
  • Digital Computer Display Output (AREA)

Abstract

PURPOSE:To effectively utilize picture-area memories by providing a picture-area memory processor by which to perform the division of a buffer and a picture- area memory by size information of output paper, developmental processing for the picture-area memory, and parallel processing of print. CONSTITUTION:When developmental capacity of data for one printing paper to a picture-area memory is less than half of the picture-area memory, the development of data the second letter buffer 23 and pattern buffer 25 storing data for next printing as the picture-area memory 27 from the next address for the picture-area memory 26 after the ending of data development of the first letter buffer 22 and pattern buffer 24 is made in parallel with printing process of the data of the letter buffer 22 and pattern buffer 24 on the basis of control by the picture-area memory controller. The data printing of the letter buffer 23 and pattern buffer B25 is made by a printer 29 by reading out of the picture-area memory 27. Since the picture-area memories can be effectively utilized, parallel processing is made possible and the processing efficiency can be raised.

Description

【発明の詳細な説明】 (11発明の技術分野 本発明は数種類の大きさの用紙を印刷できるプリンタに
おける、実際の画面メモリのA以下の容量しか必要とし
ない大きさの用紙を連続的に印刷する場合の画面メモリ
を切り換えることにより効率よく印刷する方式に関する
Detailed Description of the Invention (11) Technical Field of the Invention The present invention relates to continuous printing of paper of a size that requires less than the actual screen memory capacity A in a printer capable of printing paper of several sizes. This invention relates to a method for efficiently printing by switching screen memory when printing.

(2)従来技術と問題点 従来は文字バッファ12と図形バッファ13 (第1図
参照)を1つづつ持ったプリンタの連続印刷方式は、ま
ず最初のデータのバッファリング(文字バッファ121
図形バッファ13へのバッファリング)、画面メモリ1
4への展開を実行し、印刷部15での印刷が開始された
ところで、次のデータのバッファリングを行ない、最初
のデータの印刷が終了したところで、次のデータの画面
メモリ14への展開を行なう方式であった。そして、ど
のような大きさの用紙を印刷する場合も間該方式で行な
うため、実際の画面メモリの2以下の容量しか必要とし
ない大きさの用紙を印刷する場合、常に画面メモリ14
上に使用しない領域が存在して処理効率が悪いという欠
点があった。
(2) Prior Art and Problems Conventionally, in the continuous printing method of a printer that has one character buffer 12 and one graphic buffer 13 (see Figure 1), the first step is to buffer the first data (character buffer 121).
Buffering to figure buffer 13), screen memory 1
4, and when the printing unit 15 starts printing, the next data is buffered, and when the printing of the first data is finished, the next data is expanded to the screen memory 14. This was the way to do it. Since printing is performed using the same method regardless of the size of paper, when printing paper of a size that requires less than the capacity of the actual screen memory, the screen memory 14 is always used.
This has the disadvantage that there is an unused area on top of the system, resulting in poor processing efficiency.

(3)発明の目的 本発明は前記欠点に鑑みて、画面メモリの2以下の容量
しか必要としない大きさの用紙を印刷する場合に、画面
メモリを有効に使い、印刷速度の向上を図る方式を提供
することを目的とする。
(3) Purpose of the Invention In view of the above drawbacks, the present invention provides a method for effectively using screen memory and improving printing speed when printing paper of a size that requires less than 2 screen memory capacities. The purpose is to provide

(4)発明の構成 サイズ情報に基づき、該バソラア及び画面メモリを分割
して、入力データを該分割されたバッファに格納する処
理と該バッファから画面メモリに展開する処理を平行処
理するとともに、該画面メモリへの展開処理と印刷を適
宜平行処理する画面メモリ制御手段を設けたことを特徴
とする画面メモリ切り換え制御方式により達成される。
(4) Based on the configuration size information of the invention, the bassola and screen memory are divided, and the process of storing input data in the divided buffer and the process of expanding from the buffer to the screen memory are performed in parallel; This is achieved by a screen memory switching control method characterized by providing a screen memory control means for suitably parallel processing of expansion processing to the screen memory and printing.

(5)発明の実施例 以下、図面を参照しつつ本発明の詳細な説明する。(5) Examples of the invention Hereinafter, the present invention will be described in detail with reference to the drawings.

第1図は従来の方式を示すブロック構成図である。図に
おいて、11はソフトデータ、12は文字バッファ、1
3は図形バッファ、14は画面メモリ、15は印刷部で
ある。
FIG. 1 is a block diagram showing a conventional system. In the figure, 11 is software data, 12 is a character buffer, 1
3 is a graphic buffer, 14 is a screen memory, and 15 is a printing section.

第2図は本発明の一実施例を示すブロック構成図である
FIG. 2 is a block diagram showing an embodiment of the present invention.

図において、2.1はソフトデータ、22は文字バッフ
ァA、23は文字バッファB、24は図形バッファA、
25は図形バッファB、26は画面メモリA、27は画
面メモリB、28は印刷部A。
In the figure, 2.1 is software data, 22 is character buffer A, 23 is character buffer B, 24 is graphic buffer A,
25 is a graphic buffer B, 26 is a screen memory A, 27 is a screen memory B, and 28 is a printing section A.

29は印刷部Bである。29 is a printing section B.

第3図は本発明の一実施例を示す画面メモリの切換部の
詳細を示す図である。
FIG. 3 is a diagram showing details of a switching section of a screen memory showing an embodiment of the present invention.

図において、31はホスト計算機、32はバッファ、3
3はシリアルインタフェースマイクロプロセッサ−13
4はバス、35は画面メモリ制御部(マイクロプロセン
サー)、36はメモリ137はiアドレス、38はjア
ドレス、39はデータバス、310はDMAコントロー
ラー2311は画面メモリ、312は印刷部である。
In the figure, 31 is a host computer, 32 is a buffer, 3
3 is a serial interface microprocessor-13
4 is a bus, 35 is a screen memory control unit (micro processor), 36 is a memory 137 for i addresses, 38 is a j address, 39 is a data bus, 310 is a DMA controller 2311 is a screen memory, and 312 is a print unit.

第4図は本発明の一実施例を示す画面メモリ制御部の1
画面、2画面切り換え制御の処理フローを示す図である
FIG. 4 shows one example of a screen memory control section showing an embodiment of the present invention.
It is a figure which shows the process flow of screen and 2 screen switching control.

第5図は本発明の一実施例を示す画面メモリ制御部の1
ライン印刷処理のフローチャートである。
FIG. 5 shows one example of a screen memory control section showing an embodiment of the present invention.
It is a flowchart of line printing processing.

本発明は文字バッファA22.B23と図形バッファA
24.B25を用意する。そして、印刷用紙1枚分のデ
ータの画面メモリへの展開容量が画面メモリ容量の2以
下の場合、第1の文字バソ面メモリB27として、次に
印刷を行なうデータの貯えられている第2の文字バフフ
ッ8235図形バッファB25のデータの展開を、画面
メモリ制御部35の制御の基に、該文字バッファA2,
2゜図形バッファA24に貯えられていたデータを印刷
部Aで印刷する処理と平行に、行なう。また文字バフフ
ッ8231図形バッファB25に貯えられていたデータ
の印刷は画面メモリBから読み出し印刷部B29により
行なう。本発明ではソフトデータ21を文字バフフッ8
231図形バッファB25と文字バッファA222図形
バッファA24の画面メモリA26への展開処理が平行
処理され、また文字バフフッ8231図形バッファB2
5の画面メモリB27への展開処理と、画面メモリA2
6の印刷部A28での印刷とが平行処理される様に画面
メモリ制御部35で制御される。
The present invention provides character buffer A22. B23 and figure buffer A
24. Prepare B25. If the capacity of the data for one sheet of printing paper to be developed into the screen memory is less than 2 of the screen memory capacity, the second character memory B27, which stores the data to be printed next, is used as the first character base memory B27. Character buffer 8235 Expands the data in the graphic buffer B25 under the control of the screen memory control unit 35.
This is performed in parallel with the process of printing the data stored in the 2.degree. graphic buffer A24 in the printing unit A. The data stored in the character buffer 8231 graphic buffer B25 is printed by reading it from the screen memory B and using the printing section B29. In the present invention, the soft data 21 is converted into character buffer 8.
231 graphic buffer B25 and character buffer A222 graphic buffer A24 are processed in parallel to the screen memory A26, and character buffer 8231 graphic buffer B2
5 to screen memory B27 and screen memory A2
The screen memory control unit 35 controls the printing process in parallel with the printing in the printing unit A28 of No. 6.

第3図をもとに更に詳細に説明すると、ホスト計算機3
1上のソフトウェア(プログラム)からの印刷データを
バッファ32 (文字バッファ、図形バッファを夫々複
数含む)へ、メモリ36中に格納されていた画面メモリ
制御部35のプログラムを呼出し実行することにとより
、バッファリングする、とともに、図示しないソフト指
示(ユーザ指示)の用紙の大きさ、情報を基に画面メモ
リ3−11へバッファリングされたデータを展開する。
To explain in more detail based on FIG. 3, the host computer 3
The print data from the software (program) on 1 is transferred to the buffer 32 (including multiple character buffers and graphic buffers) by calling and executing the program of the screen memory control unit 35 stored in the memory 36. , buffering, and develops the buffered data in the screen memory 3-11 based on the paper size and information of software instructions (user instructions, not shown).

次に該画面メモリへの展開処理と印刷部312への印刷
をDMAコントローラ310を使って行なう。 この場
合、1ラインごとの転送が終了してDMAコントローラ
310より、画面メモリ制御部35に割り込みが入って
くるごとに、第5図のフローチャートに示されるマイク
ロプログラムが実行され、印刷部へのDMA転送制御が
行なわれる。そして、バッファリングと画面メモリ31
1から印刷部312へのデータの転送はDMAコントロ
ーラ312が管理し、バッファ32から画面メモリ31
1へのデータの展開は画面メモリ制御部35が、管理す
るので、前記データのバッファリング、画面メモリ31
1へのデータの展開9画面メモリ31・1から、印刷部
312へのデータの転送が平行処理できる。
Next, the DMA controller 310 is used to develop the data into the screen memory and print it to the print unit 312. In this case, each time the screen memory control unit 35 receives an interrupt from the DMA controller 310 after the transfer of each line is completed, the microprogram shown in the flowchart of FIG. Transfer control is performed. And buffering and screen memory 31
1 to the printing unit 312 is managed by the DMA controller 312, and the data is transferred from the buffer 32 to the screen memory 31.
1 is managed by the screen memory control unit 35, so the buffering of the data and the screen memory 31
1. Data transfer from the 9-screen memory 31.1 to the printing unit 312 can be processed in parallel.

(6)発明の詳細 な説明したように、本発明によれば、画面メモリを有効
に利用できるとともに平行処理も行なうので、処理効率
の向上が図れる。
(6) As described in detail, according to the present invention, screen memory can be used effectively and parallel processing can be performed, so that processing efficiency can be improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の方式を示すブロック構成図である。 第2図は本発明の一実施例を示すブロック構成図である
。 第3図は本発明の一実施例を示す画面メモリの切換部の
詳細を示す図である。 第4図は本発明の一実施例を示す画面メモリ制御部の1
画面、2画面切り換え制御の処理フローを示す図である
。 第5図は本発明の一実施例を示す画面メモリ制御部の1
ライン印刷処理のフローチャートである。 記号の説明、21はソフトデータ、22は文字バッファ
A、23は文字バッファB、24は図形バンファA、2
5は図形バッファB226は画面メモリA、27は画面
メモリB、28は印刷部A。 29は印刷部B、31はホスト計算機、32はバンファ
、33はシリアルインタフェースマイクロプロセッサ−
134はバス、35は画面メモリ制御部(マイクロプロ
センサー上に切換プログラム)、36はメモリ、37は
iアドレス、38はjアドレス、39はデータバス、3
1oはDMAコントローラー、311は画面メモリ、3
12は印刷部。
FIG. 1 is a block diagram showing a conventional system. FIG. 2 is a block diagram showing an embodiment of the present invention. FIG. 3 is a diagram showing details of a switching section of a screen memory showing an embodiment of the present invention. FIG. 4 shows one example of a screen memory control section showing an embodiment of the present invention.
It is a figure which shows the process flow of screen and 2 screen switching control. FIG. 5 shows one example of a screen memory control section showing an embodiment of the present invention.
It is a flowchart of line printing processing. Explanation of symbols: 21 is soft data, 22 is character buffer A, 23 is character buffer B, 24 is graphic buffer A, 2
5 is a graphic buffer B 226 is a screen memory A, 27 is a screen memory B, and 28 is a print section A. 29 is a printing unit B, 31 is a host computer, 32 is a buffer, and 33 is a serial interface microprocessor.
134 is a bus, 35 is a screen memory control unit (switching program on the microprocessor sensor), 36 is a memory, 37 is an i address, 38 is a j address, 39 is a data bus, 3
1o is the DMA controller, 311 is the screen memory, 3
12 is the printing department.

Claims (1)

【特許請求の範囲】[Claims] 入力データをバッファ及び画面メモリ経由で印刷するシ
ステムにおいて、出力用紙のサイズ情報に基づき、該バ
ッファ及び画面メモリを分割して、入力データを該分割
されたバッファに格納する処理と該バッファから画面メ
モリに展開する処理を平行処理するとともに、該画面メ
モリへの展開処理と印刷を適宜平行処理する画面メモリ
制御手段を設けたことを特徴とする画面メモリ切り換え
制御方式。
In a system that prints input data via a buffer and screen memory, the buffer and screen memory are divided based on the size information of the output paper, and the input data is stored in the divided buffer and the screen memory is transferred from the buffer. 1. A screen memory switching control system, characterized in that a screen memory control means is provided, which performs parallel processing of development into the screen memory, and appropriately parallel processing of development into the screen memory and printing.
JP59078074A 1984-04-18 1984-04-18 Picture-area memory switching controlling system Granted JPS60220771A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59078074A JPS60220771A (en) 1984-04-18 1984-04-18 Picture-area memory switching controlling system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59078074A JPS60220771A (en) 1984-04-18 1984-04-18 Picture-area memory switching controlling system

Publications (2)

Publication Number Publication Date
JPS60220771A true JPS60220771A (en) 1985-11-05
JPH0432748B2 JPH0432748B2 (en) 1992-06-01

Family

ID=13651691

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59078074A Granted JPS60220771A (en) 1984-04-18 1984-04-18 Picture-area memory switching controlling system

Country Status (1)

Country Link
JP (1) JPS60220771A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6364764A (en) * 1986-09-05 1988-03-23 Canon Inc Output device
JPH01258976A (en) * 1987-12-14 1989-10-16 Ricoh Co Ltd Page printer
JPH02230422A (en) * 1989-03-03 1990-09-12 Nec Corp Keyboard display device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6364764A (en) * 1986-09-05 1988-03-23 Canon Inc Output device
JPH01258976A (en) * 1987-12-14 1989-10-16 Ricoh Co Ltd Page printer
JPH02230422A (en) * 1989-03-03 1990-09-12 Nec Corp Keyboard display device

Also Published As

Publication number Publication date
JPH0432748B2 (en) 1992-06-01

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