JPS6022045U - noise reduction circuit - Google Patents
noise reduction circuitInfo
- Publication number
- JPS6022045U JPS6022045U JP11459883U JP11459883U JPS6022045U JP S6022045 U JPS6022045 U JP S6022045U JP 11459883 U JP11459883 U JP 11459883U JP 11459883 U JP11459883 U JP 11459883U JP S6022045 U JPS6022045 U JP S6022045U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- noise reduction
- reduction circuit
- switching
- carrier wave
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Noise Elimination (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案の一実施例のブロック図、第２図は検波
回路３からステレオ復調回路５に入力される信号の波形
図、第３図はマルチパスノイズを含む検波回路３から復
調回路５に与えられる信号の波形を示す図である。
１・・・アンテナ、２・・・フロントエンド中間周波増
幅回路、３・・・検波回路、５・・・ステレオ復調回路
、６・・・スイッチングトランジスタ、９・・・表示灯
、１１・・・ステレオ副搬送波発生回路、１２・・・ス
イッチング回路、１４・・・復調回路、１７．１８・・
・コンデンサ、１９・・・増幅回路、２０，２１・・・
スピーカ。Fig. 1 is a block diagram of an embodiment of the present invention, Fig. 2 is a waveform diagram of a signal input from the detection circuit 3 to the stereo demodulation circuit 5, and Fig. 3 is a demodulation circuit from the detection circuit 3 including multipath noise. FIG. 5 is a diagram showing the waveform of a signal given to FIG. DESCRIPTION OF SYMBOLS 1... Antenna, 2... Front end intermediate frequency amplifier circuit, 3... Detection circuit, 5... Stereo demodulation circuit, 6... Switching transistor, 9... Indicator light, 11... Stereo subcarrier generation circuit, 12... switching circuit, 14... demodulation circuit, 17.18...
・Capacitor, 19... Amplifier circuit, 20, 21...
speaker.
Claims (1)
１の周期でスイッチング動作させる回路とを含むことを
特徴とするノイズ軽減回路。[Claims for Utility Model Registration] A noise characterized by including a switching circuit interposed before a demodulation circuit, and a circuit that performs a switching operation of the switching circuit in synchronization with a carrier wave and at a cycle that is an integer fraction of the carrier wave. mitigation circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11459883U JPS6022045U (en) | 1983-07-22 | 1983-07-22 | noise reduction circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11459883U JPS6022045U (en) | 1983-07-22 | 1983-07-22 | noise reduction circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6022045U true JPS6022045U (en) | 1985-02-15 |
Family
ID=30264844
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11459883U Pending JPS6022045U (en) | 1983-07-22 | 1983-07-22 | noise reduction circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6022045U (en) |
-
1983
- 1983-07-22 JP JP11459883U patent/JPS6022045U/en active Pending
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