JPS59174728U - Receiving machine - Google Patents

Receiving machine

Info

Publication number
JPS59174728U
JPS59174728U JP6957283U JP6957283U JPS59174728U JP S59174728 U JPS59174728 U JP S59174728U JP 6957283 U JP6957283 U JP 6957283U JP 6957283 U JP6957283 U JP 6957283U JP S59174728 U JPS59174728 U JP S59174728U
Authority
JP
Japan
Prior art keywords
tuning circuit
electronic tuning
coil
variable capacitance
capacitance diode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6957283U
Other languages
Japanese (ja)
Inventor
伸太郎 五味
Original Assignee
パイオニア株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by パイオニア株式会社 filed Critical パイオニア株式会社
Priority to JP6957283U priority Critical patent/JPS59174728U/en
Publication of JPS59174728U publication Critical patent/JPS59174728U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の受信機の一部回路図、第2図は第1図の
等価回路図、第3図は第1図の回路の周波数特性図、第
4図は本考案の実施回路図、第5図は第4図の回路の等
価回路図である。 主要部分の符号の説明、3・・・コイル、4・・・バリ
キャップ、8・・・前段アンプのトランジスタ、10・
・・後段アンプのトランジスタ。
Fig. 1 is a partial circuit diagram of a conventional receiver, Fig. 2 is an equivalent circuit diagram of Fig. 1, Fig. 3 is a frequency characteristic diagram of the circuit shown in Fig. 1, and Fig. 4 is an implementation circuit diagram of the present invention. , FIG. 5 is an equivalent circuit diagram of the circuit of FIG. 4. Explanation of symbols of main parts, 3...Coil, 4...Varicap, 8...Transistor of front stage amplifier, 10.
... Transistor of the rear stage amplifier.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 電子同調回路を有する受信機であって、前記電子同調回
路を構成するよう互いに直列に設けられたコイル及び可
変容量ダイオードと、前記コイルと可変容量ダイオード
との直列接続回路に更に直列に設けられた前記電子同調
回路のための負荷と、前記電子同調回路へ高インピーダ
ンスで信号を供給する信号源とを含むことを特徴とする
受信機。
A receiver having an electronic tuning circuit, wherein a coil and a variable capacitance diode are provided in series with each other so as to constitute the electronic tuning circuit, and a coil and a variable capacitance diode are further provided in series with a series connection circuit of the coil and the variable capacitance diode. A receiver comprising: a load for the electronic tuning circuit; and a signal source providing a signal at high impedance to the electronic tuning circuit.
JP6957283U 1983-05-10 1983-05-10 Receiving machine Pending JPS59174728U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6957283U JPS59174728U (en) 1983-05-10 1983-05-10 Receiving machine

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6957283U JPS59174728U (en) 1983-05-10 1983-05-10 Receiving machine

Publications (1)

Publication Number Publication Date
JPS59174728U true JPS59174728U (en) 1984-11-21

Family

ID=30199723

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6957283U Pending JPS59174728U (en) 1983-05-10 1983-05-10 Receiving machine

Country Status (1)

Country Link
JP (1) JPS59174728U (en)

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