JPS60217774A - High-definition television receiver - Google Patents

Abstract

PURPOSE:To offset diffused signals without the information of horizontal cycle so as to obtain excellent pictures, by finding the voltage difference between fields of a reference voltage inserted into a vertical blanking period and changing the time of the flat section of a staircase wave in accordance with the found voltage difference. CONSTITUTION:FM-demodulated high-definition TV signals are inputted from an input terminal 1 and supplied to the 1st AD converter 5. Signals sampled and quantized at the AD converter 5 are supplied to the 1st gate circuit 6 and the digital value of a reference voltage period is gated by a gate pulse inputted from another input terminal 2. The digital value is supplied to a change-over switch 8 after it is subjected to addition and averaging operation and a mean value in the vicinity of the rise of a diffused signal and another mean value in the vicinity of the fall of the diffused signal are separated from the digital value and outputted by the switch 8. By detecting the maximum and minimum values of the diffused signal from the two mean values and finding the difference between them at a subtractor circuit 11, the counting value of a counter 13 is controlled with the output of the subtractor circuit 11 and the time of the flat section of a staircase wave for correction is changed.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a high-definition television receiver, and particularly to a high-definition television receiver suitable for receiving a high-definition television signal superimposed with a low-frequency signal for energy diffusion. Regarding machines.

[Background of the invention]

Broadcasting high-definition TV signals via 120H) band satellite broadcasting Wl
Noh Nit LeMUS B (MuLtipLa 5
ubJ1yquiztU〒LirL! IMacmcLi
nl ) system has been proposed (Reference: Ninomiya et al.
)', Television Society Technical Report TKBs95-2).

However, in this 12 GH) band satellite broadcasting, energy dispersion is required (Reference: Japan Broadcasting Corporation, ``Broadcasting Satellite Technology 1, Published by Japan Publishing Association, p. 46), and triangular waves synchronized with 7-rem period. spread signals are superimposed. Conventional NT
In the SO system, this spread signal can be removed relatively easily by clamping the horizontal blanking period.

However, MUSK is a straight TO engineering(']'LmaroQ
A signal format called 6m-yrgsztdIrLtation) in which a luminance signal and a color difference signal are time-division multiplexed is used. This multiplexes time-base compressed color difference signals line-sequentially during the horizontal retrace period. Therefore, unlike the conventional 1iT80, the no-signal flat area is equal to 4 samples (1 sample interval is approximately 60 nS) as shown in Figure 1.
Therefore, it is only about 0.24 μs). Therefore, in terms of waveform distortion and noise caused by mismatched cables,
It is difficult to perform kutemp during this period.

[Purpose of the invention]

An object of the present invention is to provide a high-definition television receiver that correctly reproduces a reference DC level by removing the energy diffusion signal from a high-definition television signal on which the energy diffusion signal is superimposed without using horizontal period information, thereby obtaining a good image. Our goal is to provide the following.

[Summary of the invention]

To achieve the above purpose, a reference voltage (for example, indicating the zero level of the color difference signal, -7 gray level) is applied during the vertical retrace period.
is inserted, digitally measure the DC voltage difference of this reference voltage between fields (or frames), and digitally generate a staircase wave whose time in the flat part changes according to this voltage difference. By generating this signal, the spread signal can be canceled with high precision without using horizontal period information.

[Embodiments of the invention]

An embodiment of the high-definition television receiver of the present invention is shown in FIG. 2. In FIG. 2, 1 is a first input terminal, 2 is a second input terminal, 6 is a third input terminal, and 4 is a third input terminal. 4 input terminal, 5 a first AD converter, 6 a first gate circuit, 7 a first integration circuit, 8 a first switch, 9 a second integration circuit,
10 is a third integration circuit, 11 is a first subtraction circuit, 12 is a first programmable counter, 13 is an up/down counter, 14 is a second programmable counter, 15 is a second gate circuit, and 16 is a second gate circuit. 2 is a subtraction circuit, and 17 is an output terminal.

A high-definition television signal that has been FM demodulated into a baseband signal is input from a first input terminal 1 . A spread signal is superimposed on this signal. This spread signal, for example, repeats 2 frames as shown in FIG.
H7) is a triangular wave. For 12GH, i-band satellite broadcasting, it is necessary to perform energy diffusion of 600KH, )pp. In order to satisfy the Komai-Carson law and transmit data without difficulty, the frequency deviation of the main carrier wave should be approximately 10 MH, )PP. Since pre-emphasis is applied to the video signal, the low frequency spread signal is attenuated by 10 dB. Therefore, in order to perform PP spreading of 600 kHz, it is necessary to superimpose a spreading signal of approximately 0.2 vp-p on a video signal of 1 vp-p.

By the way, MUSRi is a highly band-compressed signal, which requires digital signal processing to be restored to the original high-definition television signal on the receiving side. Therefore, the first A'D converter 5 samples and quantizes the input signal. This first AD
The sampling frequency of the converter 5 may be selected to be the number of repetition waves of one row of sample points of MUSE (16.2 MHJ). Further, the number of quantization bits may be 8 bits. As the dynamic range of the input section of the first AD converter 50, it is sufficient to set the video signal amplitude I V p-p, the spread signal 0.2V1)-p, and 1.4Vp-1) in consideration of amplitude variations, etc. It is. At this time, the spread signal occupies about 14% of the dynamic range, and occupies about 36 steps out of 256 steps.

The output of this first Ap converter 5 is supplied to the first gate circuit B. Here, the frame pulse separated from the input signal and the gate pulse input from the second input terminal 2 for gating the reference voltage period created using the horizontal synchronization signal are used to generate the digital value of the reference voltage period. is extracted. The extracted digital values of the reference voltage period are added and averaged in the first integration circuit 7 for each reference voltage period.

A frame pulse separated from the input signal is input from the third input terminal 3, and the average value of the reference voltage period near the rising start and the average value of the reference voltage period near the falling start of the spread signal shown in FIG. The values are separated by the first switch 8 and output to two outputs respectively.

These two average values are calculated by the second integrating circuit 9 and the sixth integrating circuit, respectively.
The integration circuit 10 separately adds over multiple frames,
averaged. In this way, the minimum and maximum values of the spread signal shown in FIG. 3 can be detected digitally and accurately.

The difference between the second integrating circuit 9 and the third integrating circuit 10 is calculated as the first
The subtraction circuit 11 calculates the amplitude of the spread signal. Assuming that this amplitude is equal to N times, the up/down counter 1
The counter value of 3 is changed by N steps during one frame to obtain a staircase wave for correction. At this time, the first step is to determine which frame should increase or decrease the counter value.
This can be easily done using the sign of the output of the subtraction circuit 11.

Further, the change in the number of steps for one frame of the up/down counter 13 can be executed as follows.

If the number of steps determined by the first subtraction circuit 11 is N, the number of scanning lines of a high-definition television signal is 1125, so the length L per step is L=(1125÷N)XH(S
) (However, H: 1 horizontal scanning period is about 227 μs).

An example of the relationship between the number of steps and the length per step is shown in FIG. For example, when the number of steps is 36, the length of one step is approximately 31.3H. Therefore, the number of divisions of the first programmable counter 12 is set to 31, and the number of divisions of the second programmable counter 14 is set to 3. Or, a signal of the same frequency as the horizontal synchronization signal synchronized therewith is sent to the first counter using the second programmable counter.
One pulse is dated once every six pulses of the output of the programmable counter 12. In this way, the first
The programmable counter of is 3'1 2 out of 3 times.
Frequency division is performed once by 62 frequency division operations. Therefore, 31.3 frequency division operations are performed on average, and the length per step can be set to 31.3H. In this way, by gating the input signal of the first gross grantor, it becomes possible to process even fractions. Of course, the second programmable counter 14 and the second gate 15 may be omitted if the accuracy is sacrificed a little.

In this way, in order to correct the triangular wave-like spread signal, the digitally generated step-wave signal can be reduced to a value of -46'dB or less in the second subtraction plane from the output signal of the first AD converter 5. can. The detection limit for flicker is about -4 oa:s, so it is possible to set it to a value that is completely acceptable.◇ In the above explanation, the video signal is AD in the form of a diffuse signal superimposed.
However, in this form, the quantization accuracy deteriorates by the amplitude of the spread signal. AD converter, DA that operates at low speed
By adding a converter, it is possible to prevent this deterioration of quantization accuracy. An example in this case is shown in FIG. Fifth
In the figure, 18 is LP? , 19 is a second AD converter,
20 is a DA converter, 21 is a third subtraction circuit, 22 is a second
23 is a fourth integration circuit, 24 is a fifth integration circuit, and 25 is a fourth subtraction circuit.

The input signal input from the first input terminal 1 is
After removing high frequency noise in step 8, the second AD converter 19
The reference voltage within the vertical retrace period is sampled and quantized. The number of bits of this second AD converter 19 should be 6 bits, and the operating speed should be about a fraction of one horizontal scanning period, that is, a conversion speed of about 100 KHJ. In the following processing, the operation of the up/down counter 13 is controlled in the same manner as in the case of FIG. In the case of FIG. 5, the output of this up/down counter 16 is converted into an analog signal by a DA converter 20. This converted analog signal is subtracted from the input signal by a third subtraction circuit 21. In this way, the correction waveform is generated purely digitally, but the subtraction process is performed analogously. The number of bits of this DA converter 20 is only 6 bits, and the operating speed is 10K.
H, ) is sufficient.

In this way, since the spread signal is corrected as an analog signal, the input dynamic range of the first AD converter 5 used for signal processing can be used only for the video signal. At this time, the conversion sensitivity of the DA converter 20 is
Variations may occur due to the influence of circuit elements, and there is a possibility that a very small error may occur in the amplitude of the correction waveform.

In order to completely correct this, the frame-to-frame level difference of the reference voltage during this vertical retrace period, that is, the correction error, is determined from the output of the first AD converter 5 using the same procedure, and this correction error is eliminated. The conversion sensitivity of the DA converter can be controlled as follows. At this time, if the polarities of the first switch 8 and the second switch 22 are controlled in synchronization, the sign of the first subtraction circuit 11 will change the sign of the fourth d[sign of the subtraction circuit 25]. Accordingly, it is possible to correctly control whether to increase or decrease the conversion sensitivity of the DA converter 20. Of course, it is not necessary to remove the spread signal completely, and the video signal I
VT)-1), it is sufficient that it is -40 dB or less, and such feedback control of the conversion sensitivity of the DA converter 20 is not necessarily necessary.

Furthermore, it is also possible to simplify the device by providing an AD converter of the same level as the second AD converter 18, performing correction error detection, and making signal processing to return the band compression signal to the original high-definition television signal independent. It can be said that it is an effective method.

〔Effect of the invention〕

As explained above, since the high-definition television receiver according to the present invention digitally generates a correction waveform for correcting the energy diffusion signal, it is possible to accurately and stably correct the energy diffusion signal, thereby producing a high-quality video signal. Therefore, it is suitable as a 12GH7 band satellite broadcasting receiver.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the waveform of the horizontal synchronization period of MUSE, FIG. 2 is a diagram showing an embodiment of the high-definition television receiver of the present invention, FIG. Figure 4 is a diagram showing the relationship between the number of steps of the staircase wave and the length per step, and Figure 5 is a diagram showing the relationship between the number of steps of the staircase wave and the length per step.
It is a figure showing an example of. 1.2, 3.4... Input terminal 5.18... AD converter 6.15... Gate circuit 7.9.10.23.24... Integrating circuit 8.22...
・Switch circuit 11.16, 21.25...Subtraction circuit 12.14...
・Programmable counter 13... Up/down counter 20... DA converter accent Ruhi HD naked → Procedural amendment (method) Person making the amendment/Relationship with the score Patent applicant name Name L5101 Co., Ltd. Standing production fee
person

Claims (1)

[Claims] It is characterized by having an AD converter that samples and quantizes a reference voltage period inserted into a vertical retrace period of an input signal, and a counting circuit whose speed is modulated using the different reference voltage periods of the output of the AD converter. A high-definition television receiver.