JPS60211698A - Read only memory device - Google Patents
Read only memory deviceInfo
- Publication number
- JPS60211698A JPS60211698A JP59066944A JP6694484A JPS60211698A JP S60211698 A JPS60211698 A JP S60211698A JP 59066944 A JP59066944 A JP 59066944A JP 6694484 A JP6694484 A JP 6694484A JP S60211698 A JPS60211698 A JP S60211698A
- Authority
- JP
- Japan
- Prior art keywords
- single crystal
- memory cell
- read
- absence
- micro
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
Landscapes
- Read Only Memory (AREA)
- Semiconductor Memories (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、高密度、大容量性を備えた新規な構成より成
る読出し専用記憶装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a read-only storage device having a novel configuration with high density and large capacity.
従来例の構成とその問題点
電子計算機やデータ通信などの情報処理において記憶装
置が重要な役割を果たしているが、その応用範囲や能力
の拡大のために記・聰谷量の増大が必要とされている。Conventional configurations and their problems Storage devices play an important role in information processing in electronic computers and data communications, but in order to expand their application range and capabilities, it is necessary to increase the amount of storage and storage. ing.
読出し専用記・厖装置は、原理的には多数の集合体から
成る記憶セル内に2安定な状態を保持し、指定する任意
の記憶セル内の記憶された状態の2つの論理値を弁別し
、外部へ信号として再生できるようにしたものである。In principle, a read-only storage device maintains two stable states in a storage cell consisting of a large number of aggregates, and distinguishes between two logical values of the stored state in any specified storage cell. , which can be reproduced as a signal to the outside.
半導体記憶装置は、現在主記憶として広く用いられてお
り、半導体集積回路波イホエの進展とあいまって、高速
度、高集積、大容量化が進んでいる。Semiconductor storage devices are currently widely used as main memories, and with the development of semiconductor integrated circuits, they are becoming faster, more highly integrated, and have a larger capacity.
第1図は、半導体記憶装置のうちの読出し専用記憶(R
ead 0nly Memory:ROM) (7))
−914を示す図でマスクROMと呼ばれているもので
ある。このメモリーの構成は、ワードラインAとディジ
ソドラインBで二次元のマトリクスを作り、両ラインの
結合素子の接続の有無を2値情報として記憶するもので
ある。結合素子としてはバイポーラ素子を用い、エミッ
タが接続されているものがゝ1 ″接続されていないも
のが’ o ”を表わす。接続の有無の情報書き込みは
製造時のホトマスクによって定められる。このマスクR
OMの形成は、半導体集積回路技術を用いているため、
高速、高密度。FIG. 1 shows a read-only memory (R) of a semiconductor memory device.
ead 0nly Memory: ROM) (7))
-914, which is called a mask ROM. The configuration of this memory is such that a two-dimensional matrix is created by word line A and digisodo line B, and the presence or absence of connection of the coupling elements of both lines is stored as binary information. A bipolar element is used as the coupling element, and those whose emitters are connected represent "1" and those whose emitters are not connected represent "o". Writing information on whether or not there is a connection is determined by a photomask during manufacturing. This mask R
Since the formation of OM uses semiconductor integrated circuit technology,
High speed, high density.
大容量化か可能であるか、素子を形成するだめの製造工
程が複雑で、コストか置くつくという問題点かある。There are problems with whether it is possible to increase the capacity, and the manufacturing process for forming the element is complicated and costs are high.
また、各メモリーセルには単層で素子か形成されている
ため1ビツトの容量しか持てず、垂直方向の複数ビット
の記録はてきないという欠点がある。Furthermore, each memory cell has a single-layer element, so it has a capacity of only one bit, and it is not possible to record multiple bits in the vertical direction.
発明の目的
本発明は上記欠点を除去するととのでき、垂直方向の記
録が可能な、新規な構成より成る読出し専用記憶装置を
提供せんとするものである。OBJECTS OF THE INVENTION The present invention aims to eliminate the above-mentioned drawbacks and to provide a read-only storage device of a new construction, which allows vertical recording.
発明の構成
本発明は、単結晶中に格子定数が局所的に異なる微小格
子歪領域の有無を備えた記憶セルと、セル表面に電気音
響変換素子を形成し、微小格子歪領域の有無を音響平面
波の反射波で検出して読出す構成にした読出し専用記憶
装置である。Structure of the Invention The present invention comprises a memory cell that is provided with a single crystal to detect the presence or absence of a microlattice strain region with locally different lattice constants, and an electroacoustic transducer element formed on the cell surface to acoustically detect the presence or absence of a microlattice strain region. This is a read-only storage device configured to detect and read out using reflected waves of plane waves.
実施例の説明
第2図(a)は本発明の記憶セルの一実施例を示す構造
図である。単結晶1中に区分された記憶セル2が集合し
ており、各記憶セル中には転位3が配置されており、転
位の有無が2値情報として書き込まれている。DESCRIPTION OF THE EMBODIMENTS FIG. 2(a) is a structural diagram showing an embodiment of the memory cell of the present invention. Memory cells 2 divided into a single crystal 1 are assembled, dislocations 3 are arranged in each memory cell, and the presence or absence of dislocations is written as binary information.
第2図(b)は記憶セル中の情報を読出す為の構成を示
す断面構造図である。各記憶セル2上に圧電性物質膜4
および電極5を形成し、圧電振動子を構成しである。電
極6にパルス電圧を印加し、圧電振動子より結晶中へ超
音波を入射すると、転位がある記憶セルには、転位によ
る反射波が出力信号として電極5より読出され、転位が
ない記憶セルからは出力されない。反射波は単結晶中の
格子定数が局所的に異なる微小格子歪領域が存在すれば
生じるので、転位の他に点欠陥などの格子欠陥でも同様
の現象が得られる。丑だ、格子定数の異なる不純物原子
を用いても可能である。FIG. 2(b) is a cross-sectional structural diagram showing a configuration for reading information in a memory cell. A piezoelectric material film 4 is placed on each memory cell 2.
and electrodes 5 are formed to constitute a piezoelectric vibrator. When a pulse voltage is applied to the electrode 6 and ultrasonic waves are applied to the crystal from the piezoelectric vibrator, reflected waves due to the dislocations are read out as output signals from the memory cells with dislocations, and waves reflected from the dislocations are read out as output signals from the memory cells without dislocations. is not output. Reflected waves are generated when there are microlattice strain regions in a single crystal where the lattice constants are locally different, so a similar phenomenon can be obtained with lattice defects such as point defects in addition to dislocations. It is also possible to use impurity atoms with different lattice constants.
次に、記憶セルの指定番地を読出す為の構成を示す回路
図を第3図に示す。ワードラインXとディジットライン
Yで二次元のマトリクスを作り、圧電振動子の電極6を
各ラインに接続しである。Next, FIG. 3 shows a circuit diagram showing a configuration for reading a designated address of a memory cell. A two-dimensional matrix is created with word lines X and digit lines Y, and electrodes 6 of a piezoelectric vibrator are connected to each line.
指定ワードラインよりパルス電圧を駆動すると、指定し
たディジットラインより指定番地の記憶セルの情報を読
出すことができる。By driving a pulse voltage from a designated word line, information in a memory cell at a designated address can be read from a designated digit line.
次に、記憶セル中に転位を書込む方法を第4図(a)〜
(C)に示す。単結晶T中の記憶セル表面に荷電粒子ビ
ーム8を入射し、結晶表面にダメージ領域9を形成する
。荷電粒子は、電子、イオン等で行なう(2L)。次に
(b)に示すように、単結晶表面からエヒタキノヤル層
10を成長させる。この場合、適当な熱処理をほどこし
てもよい。その結果荷電粒子が入射した領域に転位11
が成長する。次に(C)に示す如く、記憶セル表面に圧
電性物質12及び電極材料13を形成し、ホトエッチで
パターン形成する。Next, we will explain how to write dislocations into memory cells in Figures 4(a) to 4(a).
Shown in (C). A charged particle beam 8 is incident on the surface of a memory cell in a single crystal T to form a damaged region 9 on the crystal surface. The charged particles are electrons, ions, etc. (2L). Next, as shown in (b), an Ehitakinoyal layer 10 is grown from the surface of the single crystal. In this case, appropriate heat treatment may be applied. As a result, dislocations 11 occur in the area where the charged particles were incident.
grows. Next, as shown in (C), a piezoelectric material 12 and an electrode material 13 are formed on the surface of the memory cell and patterned by photoetching.
以上の実施例は、記憶セル内に1ビ、/)の情報がある
場合であるが、第5図(a)に示すように、記憶セル内
の単結晶層を何層にも重ねて、各層に転位を配置するこ
とにより1つの記憶セル内に書き込むビット数を増加さ
せることができる。出力はビット情報に対応した時間経
列のパルス信号として読出される。(b)のごとく、パ
ルス信号の振幅は減衰するため、書き込める最大のビッ
ト数は、パルス波高が弁別できるしきい値以上で決定さ
れる。In the above embodiment, there is information of 1 bit, /) in the memory cell, but as shown in FIG. By arranging dislocations in each layer, the number of bits written in one memory cell can be increased. The output is read out as a time series pulse signal corresponding to bit information. As shown in (b), since the amplitude of the pulse signal is attenuated, the maximum number of bits that can be written is determined by a value equal to or higher than the threshold value at which the pulse height can be discriminated.
本実施例の場合、寸法的制約は以下のように決定される
。圧電振動子の幅をり、転位の深さ−iLとすると、平
面波の条件として、
D>10+L ・旧・・(1)
を満たす必要がある。一方、転位が入射波と相互作用す
る条件として、入射波の波長をλとすると、λく□1.
・・・・(2)
となる。従って圧電振動子の固有振動数fはf=r〉1
o−τ パ・・・(3)
を満たすことが必要とされる。ここでVは単結晶中の音
速である。In the case of this example, the dimensional constraints are determined as follows. Assuming that the width of the piezoelectric vibrator is equal to the width of the piezoelectric vibrator and the depth of the dislocation is -iL, it is necessary to satisfy the following plane wave condition: D>10+L Old... (1). On the other hand, as a condition for a dislocation to interact with an incident wave, if the wavelength of the incident wave is λ, then λ is □1.
...(2) becomes. Therefore, the natural frequency f of the piezoelectric vibrator is f=r〉1
o−τ pa...(3) is required to be satisfied. Here, V is the speed of sound in a single crystal.
シリコン単結晶の場合、v−80oo@、、’sて転位
の深さとしてL=1/jfiで形成すると、f>80G
Hz
となる。アクセスタイムは圧電振動子の電気音咄変換の
遅れを無視すると、
t =−= 100 ps6c
となる。圧電振動子の幅は
D)10μm
となり、この場合のメモリーセルサイズは10Cμyt
?となる。In the case of silicon single crystal, if v-80oo@,,'s is formed with L=1/jfi as the dislocation depth, then f>80G
Hz. The access time is t=-=100 ps6c if the delay in electro-phonic conversion of the piezoelectric vibrator is ignored. The width of the piezoelectric vibrator is D) 10μm, and the memory cell size in this case is 10Cμyt.
? becomes.
発明の効果
本発明によれば、
(1) マスク工程が少なく製造コストを低くすること
ができる。Effects of the Invention According to the present invention, (1) The number of mask steps is small, and manufacturing costs can be reduced.
(2)製造プロセスが通常の半導体集積回路技術不用い
て実施できるため、大容量化が可能で、篠速性も得られ
る。(2) Since the manufacturing process can be carried out without using ordinary semiconductor integrated circuit technology, it is possible to increase the capacity and achieve high throughput.
(3)1つの記憶セル内に、垂直方向に多数ピッ1の記
録ができ、高密度化が可能である。(3) A large number of pips can be recorded in the vertical direction in one memory cell, and high density recording is possible.
等の効果を有し、工業的価値の高いものである。It has the following effects and is of high industrial value.
、4、図面の簡単な説明
第1図は従来の半導体記憶装置の構成を示す図、第2図
(a) 、 (b)は本発明の記憶セル構成の一例を示
す図、第3図は本発明による記憶装置の回路図、第4図
(2L)〜(C)は本発明の記憶セルを形成する工程断
面図、第5図(a)は本発明の複数ビットの垂直記録を
もった記憶セルの断面図、第5図(b)は第5図(a)
の記憶セルを読み出した場合のパルスを示す図である。, 4. Brief Description of the Drawings FIG. 1 is a diagram showing the configuration of a conventional semiconductor memory device, FIGS. 2(a) and (b) are diagrams showing an example of the memory cell configuration of the present invention, and FIG. A circuit diagram of a memory device according to the present invention, FIGS. 4(2L) to (C) are cross-sectional views of the process of forming a memory cell of the present invention, and FIG. A cross-sectional view of the memory cell, FIG. 5(b) is similar to FIG. 5(a).
FIG. 3 is a diagram showing pulses when reading out a memory cell of FIG.
1.7・・・単結晶、3,11・・・・転位、4゜12
・・・圧電性物質、5,13・・・・・・電極。1.7...Single crystal, 3,11...Dislocation, 4゜12
...Piezoelectric material, 5,13... Electrode.
代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
図
第2図
l゛° ・・0・′
第3図
Y
第4図Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2 l゛° ・・0・′ Figure 3 Y Figure 4
Claims (3)
領域を有する複数個の記憶セルと、前記記°憶セル内へ
音響平面波を入射し、前記記憶セル内の微小格子歪領域
の有無を反射波として検出する電気音響変換素子とを備
えだことを特徴とする読出し専用記憶装置。(1) A plurality of memory cells each having micro lattice strain regions with locally different lattice constants in a single crystal, and an acoustic plane wave being incident into the memory cells to create micro lattice distortion regions within the memory cells. A read-only storage device comprising an electroacoustic transducer that detects the presence or absence of a reflected wave.
領域が、垂直方向に複数領域布することを特徴とする特
許請求の範囲第1項記載のン゛シ出し専用記憶装置。(2) A storage device exclusively for indexing according to claim 1, characterized in that a plurality of micro lattice strain regions having locally different lattice constants are distributed in the vertical direction in the single crystal.
領域が、転位によって形成されていることを特徴とする
特許請求の範囲第1項または第2項記載の読出し専用記
憶装置。(3) The read-only storage device according to claim 1 or 2, wherein the micro lattice strain regions having locally different lattice constants are formed by dislocations in the single crystal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59066944A JPS60211698A (en) | 1984-04-04 | 1984-04-04 | Read only memory device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59066944A JPS60211698A (en) | 1984-04-04 | 1984-04-04 | Read only memory device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60211698A true JPS60211698A (en) | 1985-10-24 |
Family
ID=13330622
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59066944A Pending JPS60211698A (en) | 1984-04-04 | 1984-04-04 | Read only memory device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60211698A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4990489A (en) * | 1987-07-06 | 1991-02-05 | Mitsubishi Denki Kabushiki Kaisha | Read only memory device including a superconductive electrode |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5650569A (en) * | 1979-09-29 | 1981-05-07 | Matsushita Electric Ind Co Ltd | Semiconductor memory cell |
-
1984
- 1984-04-04 JP JP59066944A patent/JPS60211698A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5650569A (en) * | 1979-09-29 | 1981-05-07 | Matsushita Electric Ind Co Ltd | Semiconductor memory cell |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4990489A (en) * | 1987-07-06 | 1991-02-05 | Mitsubishi Denki Kabushiki Kaisha | Read only memory device including a superconductive electrode |
US5130273A (en) * | 1987-07-06 | 1992-07-14 | Mitsubishi Denki Kabushiki Kaisha | Method for manufacturing a read only memory device using a focused ion beam to alter superconductivity |
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