JPS60210835A - Manufacture of semiconductor device and device therefor - Google Patents

Manufacture of semiconductor device and device therefor

Info

Publication number
JPS60210835A
JPS60210835A JP6694684A JP6694684A JPS60210835A JP S60210835 A JPS60210835 A JP S60210835A JP 6694684 A JP6694684 A JP 6694684A JP 6694684 A JP6694684 A JP 6694684A JP S60210835 A JPS60210835 A JP S60210835A
Authority
JP
Japan
Prior art keywords
semiconductor
substrate
layer
single crystal
crystal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6694684A
Other languages
Japanese (ja)
Inventor
Kazuya Kikuchi
菊池　和也
Tadanaka Yoneda
米田　忠央
Tsutomu Fujita
勉 藤田
Hitoshi Kudo
均 工藤
Masaoki Kajiyama
梶山　正興
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP6694684A priority Critical patent/JPS60210835A/en
Publication of JPS60210835A publication Critical patent/JPS60210835A/en
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02488—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)

Abstract

PURPOSE:To enable a semiconductor single crystal layer of good crystallinity having a desired film thickness to be formed easily also on an insulation substrate by a method wherein a substrate to be treated is supplied with a semiconductor material in the state of molecular rays and at the same time irradiated with radioactive rays. CONSTITUTION:An SiO2 is formed on a substrate, e.g. Si substrate 1. Next, this substrate 1 is set up in a superhigh vacuum: a crystal source made of semiconductor constituent such as Si source is evaporated on heating by using an electron gun or the like, thus scattering the Si 3 in the state of molecular rays. At the same time, the substrate is irradiated with the radioactive lays 4. At this time, the Si 3 in the state of molecules comes into activation on irradiation with the radioactive rays 4; then, on evaporation on the film 2, this element grows in crystal and simultaneously formed into a single crystal Si layer 5. This manner enables the formation of the layer 5 while the Si 3 easily grows in crystal on evaporation on the film 2. Besides, this element forms the layer 5 while growing in crystal in a superhigh vacuum; therefore, a good-quality layer 5 of good crystallinity without the mixing of impurities can be obtained.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、半導体装置の製造方法、特に半導体単結晶層
の製造方法及びそれに用いる製造装置に関するものであ
る。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for manufacturing a semiconductor single crystal layer and a manufacturing apparatus used therefor.

従来例の構成とその問題点 従来、絶縁膜上に半導体単結晶層を形成する方法として
、非晶質あるいは多結晶の半導体層に光線あるいは電子
線などの放射線を照射してアニールすることによって単
結晶化する方法がある。Conventional Structures and Problems Conventionally, as a method for forming a semiconductor single crystal layer on an insulating film, an amorphous or polycrystalline semiconductor layer is annealed by irradiating radiation such as a light beam or an electron beam. There is a way to crystallize it.

しかし、従来の方法においては、下記のような問題点が
ある。However, the conventional method has the following problems.

（１）　非晶質あるいは多結晶の半導体層形成後、試料
を空気中に取り出し、空気中で放射線を照射して単結晶
化するため、（ａ）不純物が混入し粗雑な単結晶層にな
ってしまう。Φ）半導体層の膜厚が厚いので放射線を照
射してアニールを行ない単結晶するのに時間がかかる。(1) After forming an amorphous or polycrystalline semiconductor layer, the sample is taken out into the air and irradiated with radiation in the air to form a single crystal. I end up. Φ) Because the semiconductor layer is thick, it takes time to irradiate it with radiation and anneal it to form a single crystal.

（０）放射線のエネルギー密度を高くする必要があり、
そのため、表面に損傷を生じる。(0) It is necessary to increase the energy density of radiation,
This causes damage to the surface.

俳）　プラズマｃｖｎ法によって形成した非晶質シリコ
ン層中には水素が含有する。そのため、放射線による単
結晶化において、（ａ）単結晶化が抑制され時間がかか
る。（ｂ）また、水素の析出によって表面状態の悪い粗
雑な単結晶膜になってしまう。(Ha) Hydrogen is contained in the amorphous silicon layer formed by the plasma CVN method. Therefore, in single crystallization by radiation, (a) single crystallization is suppressed and takes time. (b) Furthermore, hydrogen precipitation results in a rough single crystal film with poor surface condition.

（３）ＣＶＤ法によって形成した多結晶シリコン層を単
結晶化した場合、（ａ）多結晶シリコン層のグレインサ
イズが大きく、表面状態が悪くなる。(3) When a polycrystalline silicon layer formed by the CVD method is made into a single crystal, (a) the grain size of the polycrystalline silicon layer becomes large and the surface condition deteriorates.

（ｂ）グレインバンダリーによって単結晶化が抑制され
時間がかかる。（Ｃ）放射線のエネルギー密度を高くす
る必要があり、そのだめ表面に損傷を生じる。(b) Single crystallization is suppressed by grain boundaries and takes time. (C) It is necessary to increase the energy density of the radiation, which causes damage to the surface.

発明の目的 本発明はこのような従来の問題に鑑み、絶縁基板上にも
結晶性が良く、しかも、所望の膜厚を有する半導体単結
晶層を容易に形成することができる半導体単結晶層の製
造方法及びそれに用いる製造装置を提供することを目的
とする。Purpose of the Invention In view of these conventional problems, the present invention provides a semiconductor single crystal layer that can easily be formed on an insulating substrate with good crystallinity and a desired thickness. The purpose of the present invention is to provide a manufacturing method and a manufacturing device used therefor.

発明の構成 本発明は、超高真空下で半導体材料の構成元素、例えば
シリコンＳ１　を電子銃を用い加熱蒸発させる。蒸発し
たＳｉの分子線に放射線を照射しながら被処理基板上に
蒸着する。このとき、放射線の照射されたＳｉは活性状
態であり、基板に蒸着されたＳｉを核として結晶成長し
ながら、単結晶Ｓｉ層が形成されていくという独特の方
法を用いていることを特徴とするものである。すなわち
、分子線状態のＳｉに放射線を照射するため容易にＳｉ
が活性状態となり、基板上に蒸着された際、結晶成長し
ながら単結晶Ｓｉ層が形成されていくというものである
。また、結晶成長しながら所望の厚さを有する単結晶Ｓ
ｉ層を形成するだめ、結晶性が良く、しかも、超高真空
中で行なうため、不純物の混入もないというものである
。以下図面を用いて詳細に説明する。Structure of the Invention In the present invention, constituent elements of a semiconductor material, such as silicon S1, are heated and evaporated using an electron gun under an ultra-high vacuum. The evaporated Si molecular beam is evaporated onto the substrate to be processed while being irradiated with radiation. At this time, the irradiated Si is in an active state, and a unique method is used in which a single crystal Si layer is formed by crystal growth using the Si deposited on the substrate as a nucleus. It is something to do. That is, since Si in the molecular beam state is irradiated with radiation, it is easy to
When the silicon becomes active and is deposited on a substrate, a single crystal Si layer is formed while crystal growth occurs. In addition, it is possible to obtain a single crystal S with a desired thickness while growing the crystal.
Since the i-layer is formed, it has good crystallinity, and since it is carried out in an ultra-high vacuum, there is no contamination of impurities. This will be explained in detail below using the drawings.

実施例の説明 第１図は本発明にかかる半導体単結晶層の製造方法の第
１の実施例を示す。DESCRIPTION OF EMBODIMENTS FIG. 1 shows a first embodiment of the method for manufacturing a semiconductor single crystal layer according to the present invention.

基板例えばＳｉ基板１上に絶縁膜例えば５ｉｎ２膜２を
形成する。次に、上記Ｓｉ基板１を超高真空（１ｏ　Ｔ
ｏｒｒ　程度）中にセットし、半導体材料の構成元素に
よる結晶源例えばＳｌ源に電子銃などを用いて加熱蒸発
し、Ｓｉ３を分子線の状態で飛ばす。同時に放射線４例
えばＣＷＡｒレーザー。An insulating film, for example, a 5in2 film 2 is formed on a substrate, for example, a Si substrate 1. Next, the Si substrate 1 is placed in an ultra-high vacuum (1o T
orr) and heated and evaporated using an electron gun or the like in a crystal source of constituent elements of the semiconductor material, such as a Sl source, to emit Si3 in the form of molecular beams. At the same time radiation 4 e.g. CWAr laser.

エキシマレーザ−などを照射するっこのとき、分子線状
態のＳｉ３は、放射線４の照射によって活性状態となり
、５ｉ０２膜２上に蒸着された際、結晶成長しながら単
結晶Ｓｉ層５が形成される。When irradiating with an excimer laser or the like, Si3 in a molecular beam state is activated by the radiation 4, and when deposited on the 5i02 film 2, a single crystal Si layer 5 is formed through crystal growth. .

以上、第１の実施例によれば、分子線状態のＳｉ３に放
射線４を照射するため、容易にＳ１３が活性状態となる
。従って、５ｉｎ２膜２上にＳｉ３が蒸着された際、容
易に結晶成長しながら単結晶Ｓ、ｉ層５を形成すること
ができる。しかも、超高真空中で結晶成長しながら単結
晶Ｓｉ層６を形成するため、結晶性が良く、不純物の混
入のない良質の単結晶Ｓｉ層６を得ることができる。As described above, according to the first embodiment, since the radiation 4 is irradiated to the Si3 in the molecular beam state, the S13 is easily activated. Therefore, when Si3 is deposited on the 5in2 film 2, the single crystal S, i layer 5 can be formed while easily crystal growing. Moreover, since the single-crystal Si layer 6 is formed while growing crystals in an ultra-high vacuum, a high-quality single-crystal Si layer 6 with good crystallinity and no impurities can be obtained.

次に本発明の第２の実施例について第２図を用いて説明
する。Next, a second embodiment of the present invention will be described using FIG. 2.

８１基板１０上に５ｉ０２膜１１を形成する。次に上記
Ｓｉ基板１ｏを超高真空中にセットし、８ｉ源に電子銃
などを用いて加熱蒸発し、５１１２を分子線の形で飛ば
す。同時に所望領域に放射線１３例えばＣＷＡｒレーザ
ー、エキシマレーザ−などを照射する。このとき、放射
線１３が照射されている所望領域の分子線状態の５ｉ１
２は、活性状態となりＳｉＯ２膜１１上に蒸着された際
、結晶成長しながら所望のパターンを有する単結晶Ｓｉ
層１４が形成される。また、放射線１３が照射されてい
ない領域のＳｉＯ２膜１１上には非晶質あるいは多結晶
のＳｉ層１６が形成される。A 5i02 film 11 is formed on an 81 substrate 10. Next, the above-mentioned Si substrate 1o is set in an ultra-high vacuum, and heated and evaporated using an electron gun or the like as an 8i source to emit 5112 in the form of a molecular beam. At the same time, a desired area is irradiated with radiation 13, such as a CWAr laser or an excimer laser. At this time, 5i1 of the molecular beam state in the desired region irradiated with the radiation 13
2 is a single crystal Si having a desired pattern while crystal growing when it is activated and deposited on the SiO2 film 11.
Layer 14 is formed. Further, an amorphous or polycrystalline Si layer 16 is formed on the SiO2 film 11 in a region not irradiated with the radiation 13.

以上、第２の実施例によれば、所望領域に放射線１３を
照射することによって、所望のパターンを有する単結晶
Ｓｉ層１４を選択的に形成することができる。また、第
１の実施例と同様に、容易に結晶性の良い、不純物の混
入のない良質の単結晶８１層１４を得ることができる。As described above, according to the second embodiment, the single crystal Si layer 14 having a desired pattern can be selectively formed by irradiating the desired region with the radiation 13. Further, as in the first embodiment, a high-quality single crystal 81 layer 14 with good crystallinity and no impurities can be easily obtained.

単結晶Ｓｉ層１４形成後、非晶質あるいは多結晶のＳｉ
層１６は、エツチングレートの差によって除去したり、
酸化して５ｉｎ２膜にしてもよい。After forming the single crystal Si layer 14, amorphous or polycrystalline Si layer 14 is formed.
The layer 16 may be removed depending on the difference in etching rate, or
It may be oxidized to form a 5in2 film.

次に本発明にかかる半導体単結晶層の製造に用いる製造
装置の実施例を第３図に示す。Next, FIG. 3 shows an embodiment of a manufacturing apparatus used for manufacturing a semiconductor single crystal layer according to the present invention.

本発明の半導体単結晶層製造装置において、２０はリア
クタ、２１は回転機、２２は回転軸、２３は試料台、２
４はヒーター、２６は超高真空排気口、２６は放射線入
射窓、２７はシャッター、２８は液体窒素溜め、２９は
半導体結晶源例えばＳｉ源、３ｏは電子銃、３１は放射
線発生装置例えばｃＷＡｒレーザー、エキシマレーザ−
である。In the semiconductor single crystal layer manufacturing apparatus of the present invention, 20 is a reactor, 21 is a rotating machine, 22 is a rotating shaft, 23 is a sample stage, 2
4 is a heater, 26 is an ultra-high vacuum exhaust port, 26 is a radiation entrance window, 27 is a shutter, 28 is a liquid nitrogen reservoir, 29 is a semiconductor crystal source such as a Si source, 3o is an electron gun, and 31 is a radiation generator such as a cWAr laser. , excimer laser
It is.

第３図に示す半導体単結晶製造装置において、試料台２
４表面に対して対向側に放射線入射窓２６が設けられて
おり、放射線入射窓２６の外部に放射線発生装置３１が
ある。したがって、放射線発生装置３１より発生した放
射線は、試料台２４にセットした基板３２表面に垂直に
照射される。また、試料台２４の側面の一方側に半導体
結晶元素の分子線を発生するための分子線発生室として
半導体結晶源２９、電子銃３１、シャッター２７、液体
窒素溜め２８が設けられており、他方側に超高真空排気
口２６が設けられている。したがって、電子銃３１によ
って半導体結晶源２９より加熱蒸発した分子線状態の半
導体結晶はシャッター２７が開くと、基板３２表面上に
供給され、超高真空排気口２５より排気される。In the semiconductor single crystal manufacturing apparatus shown in FIG.
A radiation entrance window 26 is provided on the side opposite to the four surfaces, and a radiation generating device 31 is provided outside the radiation entrance window 26. Therefore, the radiation generated by the radiation generator 31 is perpendicularly irradiated onto the surface of the substrate 32 set on the sample stage 24. Further, a semiconductor crystal source 29, an electron gun 31, a shutter 27, and a liquid nitrogen reservoir 28 are provided as a molecular beam generation chamber for generating molecular beams of semiconductor crystal elements on one side of the sample stage 24, and on the other side. An ultra-high vacuum exhaust port 26 is provided on the side. Therefore, when the shutter 27 opens, the semiconductor crystal in a molecular beam state heated and evaporated from the semiconductor crystal source 29 by the electron gun 31 is supplied onto the surface of the substrate 32, and is exhausted from the ultra-high vacuum exhaust port 25.

したがって、本発明の半導体単結晶層製造装置によれば
、電子銃３１によって半導体結晶源２９より加熱蒸発し
た分子線状態の半導体結晶は、基板３２表面通過の際、
放射線発生装置３１より発生した放射線により活性な状
態となり、基板３２上に半導体単結晶層が形成される。Therefore, according to the semiconductor single crystal layer manufacturing apparatus of the present invention, the semiconductor crystal in the molecular beam state heated and evaporated from the semiconductor crystal source 29 by the electron gun 31 passes through the surface of the substrate 32.
It is activated by the radiation generated by the radiation generating device 31, and a semiconductor single crystal layer is formed on the substrate 32.

、また、回転機２１によって試料台２４を回転すれば、
さらに均一な半導体単結晶層を形成することができる。, Moreover, if the sample stage 24 is rotated by the rotating machine 21,
Furthermore, a uniform semiconductor single crystal layer can be formed.

発明の効果 以上、本発明の半導体単結晶層の製造方法及びそれに用
いる製造装置を用いれば、下記のような効果が得られる
。Effects of the Invention In addition to the effects of the invention, the following effects can be obtained by using the method of manufacturing a semiconductor single crystal layer of the present invention and the manufacturing apparatus used therefor.

１、分子線状態の半導体結晶に放射線を照射するだめ、
容易に半導体結晶が活性状態になる。従って容易に結晶
成長がおこなえる。1. The semiconductor crystal in the molecular beam state cannot be irradiated with radiation,
The semiconductor crystal easily becomes active. Therefore, crystal growth can be easily performed.

２、半導体層形成後、単結晶化する従来方法と異なり、
単結晶化しながら、所望の厚さを有する半導体単結晶層
を形成するため、（ＩＬ）単結晶化するための時間が不
要である。（ｂ）放射線のエネルギー密度は低くて良く
、表面損傷が生じない。2. Unlike the conventional method of forming a single crystal after forming a semiconductor layer,
Since a semiconductor single crystal layer having a desired thickness is formed during single crystallization, no time is required for (IL) single crystallization. (b) The energy density of the radiation may be low and no surface damage will occur.

（Ｃ）結晶性の良い半導体単結晶層が得られる。(C) A semiconductor single crystal layer with good crystallinity can be obtained.

３、超高真空中で結晶成長しながら半導体単結晶層を形
成するため、結晶性が良く、不純物の混入のない良質の
半導体単結晶層が得られる。3. Since the semiconductor single crystal layer is formed during crystal growth in an ultra-high vacuum, a high quality semiconductor single crystal layer with good crystallinity and no impurities can be obtained.

４、放射線を所望領域のみに照射することによって所望
のパターンを有する半導体単結晶層を選択的に形成する
ことができる。4. A semiconductor single crystal layer having a desired pattern can be selectively formed by irradiating only desired regions with radiation.

本実施例では、下地基板として５１０２膜を用いて説明
したが、Ｓ１５　Ｎ４膜あるいは単結晶基板を用いても
同様な結果が得られる。Although this embodiment has been described using a 5102 film as the base substrate, similar results can be obtained using an S15 N4 film or a single crystal substrate.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本発明の一実施例にかかる半導体単結晶層の製
造工程断面図、第２図は本発明の他の実施例にかかる半
導体単結晶層の製造工程断面図、第３図は本発明にかか
る半導体単結晶層製造装置の装置断面図である。 １、１ｏ・−＝Ｓ＝基板、　２　、１１−＝・Ｓ、４０
２１１（，３，１２・・・・・分子線状態のＳｉ、４．
１３・・・・・・放射線、５，１４・・・・・単結晶Ｓ
１層、２０・・・・リアクタ、２５・・・・超高真空排
気口、２９・・・・・半導体結晶、３０・・・・・・電
子銃、３１・・・・・・放射線発生装置。FIG. 1 is a sectional view of the manufacturing process of a semiconductor single crystal layer according to an embodiment of the present invention, FIG. 2 is a sectional view of the manufacturing process of a semiconductor single crystal layer according to another embodiment of the invention, and FIG. FIG. 1 is a cross-sectional view of a semiconductor single crystal layer manufacturing apparatus according to the invention. 1, 1o・-=S=substrate, 2, 11-=・S, 40
211(,3,12...Si in molecular beam state, 4.
13...Radiation, 5,14...Single crystal S
1st layer, 20...Reactor, 25...Ultra-high vacuum exhaust port, 29...Semiconductor crystal, 30...Electron gun, 31...Radiation generator .

Claims (3)

【特許請求の範囲】[Claims] （１）被処理基板上に分子線状態の半導体材料を供給す
ると同時に放射線を照射し、前記被処理基板上に前記半
導体材料から成る半導体単結晶層を形成することを特徴
とする半導体装置の製造方法。(1) Manufacturing a semiconductor device characterized by supplying a semiconductor material in a molecular beam state onto a substrate to be processed and irradiating radiation at the same time to form a semiconductor single crystal layer made of the semiconductor material on the substrate to be processed. Method. （２）被処理基板上に分子線状態の半導体材料を供給す
るのと同時に所望領域に放射線を照射し、前記半導体材
料から成る所望のパターンを有する半導体単結晶層を選
択的に形成することを特徴とする半導体装置の製造方法
。(2) At the same time as supplying a semiconductor material in a molecular beam state onto a substrate to be processed, a desired region is irradiated with radiation to selectively form a semiconductor single crystal layer having a desired pattern made of the semiconductor material. A method for manufacturing a featured semiconductor device. （３）試料台と、前記試料台の側面の一方側に般社られ
た半導体結晶の分子線発生室、他方側に設けられた超高
真空排気口と、前試料台表面の対向側に設けられた放射
線発生装置とを備えていることを特徴とする半導体装置
の製造装置。(3) A sample stand, a semiconductor crystal molecular beam generation chamber provided on one side of the sample stand, an ultra-high vacuum exhaust port provided on the other side, and an ultra-high vacuum exhaust port provided on the opposite side of the front sample stand surface. What is claimed is: 1. A semiconductor device manufacturing apparatus, comprising: a radiation generating device including a radiation generating device;
JP6694684A 1984-04-04 1984-04-04 Manufacture of semiconductor device and device therefor Pending JPS60210835A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6694684A JPS60210835A (en) 1984-04-04 1984-04-04 Manufacture of semiconductor device and device therefor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6694684A JPS60210835A (en) 1984-04-04 1984-04-04 Manufacture of semiconductor device and device therefor

Publications (1)

Publication Number Publication Date
JPS60210835A true JPS60210835A (en) 1985-10-23

Family

ID=13330683

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6694684A Pending JPS60210835A (en) 1984-04-04 1984-04-04 Manufacture of semiconductor device and device therefor

Country Status (1)

Country Link
JP (1) JPS60210835A (en)

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