JPS6020756B2 - cathode ray tube display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a cathode ray tube display device that divides the display screen of a color cathode ray tube into a large number of pixels and displays characters, graphs, etc. by controlling the brightness of the pixels.

Generally, color cathode ray tube display devices form images such as characters and graphs by dividing a display screen into a large number of pixels and controlling the brightness of the pixels.

The information necessary for image formation in this case is provided by three memories MR and M corresponding to the three primary colors of red, green, and blue, each having a memory capacity corresponding to the number of pixels, as shown in FIG. , Mo as brightness control signals for each color. The brightness control signals stored in these three memories MR, Mc, and MB are sequentially read out for each pixel based on the pixel position signal synchronized with the raster scan, thereby creating an image corresponding to the brightness control signals stored in the memories. The configuration is such that the following can be obtained. Therefore, in such a color negative wire tube display device, by controlling the generation of each brightness control signal of red, green, and blue for each color, red, green, blue, yellow, magenta, cyan, white, black It is possible to control eight colors. However, when performing a certain kind of display, there are cases where more display colors are required in addition to the above-mentioned eight colors, such as an intermediate color between these eight colors.

That is, in addition to the above eight colors, display colors whose gradation is delayed may be required. Therefore, as shown in FIG. 1, a negative ray tube display device has been proposed that is small-scale and can display colors with many gradations.

In the figure, M, , M2, and M3 are brightness control signal memories that store color brightness control signals that control color brightness in each pixel, and these memristors M, to M3
has a memory capacity (bit capacity) corresponding to the number of pixels on the display screen, and the color brightness control is addressed and memorized by an address signal with a cycle eight times the dot position signal representing each pixel position synchronized with raster scanning. The signal is output in 8-bit parallel. PS, ~3 is the memory M, ~M
This is a parallel-to-serial converter that serially sends out 8-bit color brightness control signals from 3 to 3 bits in series at the same period as the dot position signal, bit by bit. In this case, if the memories M, ~M3 are configured to generate color brightness control signals corresponding to the three primary colors (red, green, and blue), the output from the parallel/serial converters PS, ~3 is By using the brightness control signal in units of 1 bit, it is possible to express eight types of display colors as shown in Table 1 below. Table 1 Next, SL is a display color control signal memory (hereinafter abbreviated as memory) MR. ~MB read/write signal R/W is “1”
a selector that selectively outputs the address control signal from the computer CPU or the keyboard KB when MR. ~MB, is the memory address mq corresponding to the 3-bit signal given from selector SL
~mb8, respectively, and this memory address mq~m
Each of b8 has a display color (as shown in Table 1 above).
The display color control signal memory (MR. ~MB. The stored contents (display color control signal) are read out by the output signal of selector SL.

Note that this memory MR. ~M8, is memory MR. ~MB
, when the read/write signal R/W is "1", it is a write mode, and when it is "0", it is a write mode. Next, DAI~
DA3 is a DA converter that converts the 4-bit display color control signals outputted from the memories MR and ~MB into corresponding analog signals, and this DA converter DAI~
The output signal of DA3 is applied to each color cathode of a color cathode ray tube CRT via an amplifier circuit (not shown).

In this case, a part of the display surface of the color cathode ray tube CRT has
A monitor unit MN is provided which displays in color what gradation the display colors (red to black) shown in Table 1 are currently set to.

Next, the CCT converts the outputs of variable resistors VRr, VRg, and VRb, which are provided corresponding to the three primary colors of red, edge, and blue, into corresponding digital signals in AD converters ADC1, ADC2, and ADC3, and further converts these outputs into corresponding digital signals. A digital signal is sent to the data bus DB via the buffer gates 80, BG2, BG3, and the memory MR. ~MB, the value of the 4-bit display color control signal stored in the variable resistor VRr,V
This is a display color control signal setting change circuit for changing the display color control signal settings to values corresponding to the outputs (setting values) of Rg and VRb. in this case,
Which display color from red to black is to be changed in setting of the display color control signal is specified by color designation switches SW, -SW8 provided on the keyboard KB corresponding to the display colors from red to black. In addition, the input signals of the buffer gates BG, ~8G3 are input signals IP, ~IP from the computer CPU.
When 3 is given, it is sent to the data bus DB. In such a configuration, in the memo IJMR, ~MB, when trying to obtain 8 types of display colors as shown in Table 1, for example, 4-bit display color control as shown in Table 2 below is required. A signal is written to each memory address mb, to mb8. According to Table 2, memory MR. If a display color control signal as shown in Table 2 is written in ~MB, and a 3-bit brightness control signal corresponding to the image to be displayed is applied from selector SL, then
For example, when this 3-bit brightness control signal indicates "00", the memory address m of each memory N&, ~MB, etc.
The contents of b. are revealed.

As a result, only analog signals indicating the red display color are output from the DA converters DAI to DA3. For this reason,
The display color of the image on the screen is red. However, memory M
When the display color control signal stored in the memory address mq of R is set to a value "1000" which is smaller than the maximum value "1111", the output signal level of the DA converter DAI becomes smaller by this amount. Therefore, the displayed color is slightly pale and red. Therefore, memory MR. By changing the value of the display color control signal stored in ~MB, by the Z change circuit CCT, in this embodiment, it is possible to obtain a display color of iro tone (1111 to 0000) for each color among the eight colors. . However, in this conventional device, the memories MR.about.M.
, because the display color control signal No. 2 for each color is set (memorized) by variable resistors VRr, VRg, and VRb, the displayed color may be displayed on the monitor where the gradation after the setting change is completely different from the original gradation. It may appear in the evening, and has the disadvantage that it is difficult to adjust the gradation characteristics.
2. For example, when changing the yellow gradation, use the color designation switch (SW, ~S) on the keyboard KB.
When one of W8) is pressed, an address signal designating the memory location of the yellow display color printing control signal is applied from the keyboard KB to the selector SL. At the same time, memory MR.
A read/write signal R/W of "1" is given to MB. As a result, among the memory addresses mb and -mb8 of the memories MRI-MB, the memory address mb4 corresponding to yellow is given a display color control signal set by the variable resistors VRr, VRg, and VRb provided via the data bus DB. is memorized. However, at this time, it is completely unclear what kind of gradation the setting positions of the operators of the variable resistors VRr, VRg, and VRb correspond to. For this reason, depending on the setting positions of the operators of the variable resistors VRr to VRb, the gradation after the change may be completely different.
In order to obtain a desired gradation, the positions of the VRr to VRb operators must be changed many times, and the changing process is troublesome, and furthermore, there are disadvantages in that fine adjustment is difficult. In addition, since variable resistors VRr to VRb are used, AD
This method requires a converter, and has the drawback that the circuit configuration is large-scale and expensive. In view of the above points, the present invention has been made in order to solve such problems and eliminate such drawbacks, and its purpose is to make the change in the display color control signal step-like, and to It is an object of the present invention to provide a cathode ray tube display device in which fine adjustment and change of gradation is easy, and since no AD converter is used, the structure is small-scale and inexpensive.

To achieve such an object, the present invention includes a first circuit that generates a color brightness control signal for controlling the color brightness of red, green, and blue in each pixel; , a second circuit that selects and outputs display color control signal values stored in a plurality of memories corresponding to the three primary colors of blue; Alternatively, a third circuit for changing settings by sequentially applying a signal "11" from a switch is provided, and the cathode voltage of each color in the color cathode ray tube is controlled by the display color control signal.

Hereinafter, embodiments of the present invention will be explained in detail based on the drawings.

FIG. 2 is a block diagram showing an embodiment of the present invention,
The same reference numerals as in FIG. 1 indicate corresponding parts.

The difference between FIG. 2 and FIG. 1 is that the display color control signal setting change circuit CCT is switched to 0 (SWr, SW).
g, SWb, a chattering removal circuit CE, a buffer gate BG, and an interrupt request signal generation circuit ISG. In this case, each time the switches SWr to SWb are switched to the upper side of the figure, the setting display color control signal value is increased by 1, and each time they are switched to the lower side of the figure, the setting display color control signal value is increased by 1. The number is decreased sequentially.
Further, the electronic computer CPU also includes an interrupt request signal generation circuit I.
When an interrupt request signal INT is generated from SO, a program as shown in FIG. 3 is executed. 0 Therefore, in such a configuration, when one of the color designation switches SW, to SW8 on the keyboard KB is operated to designate a color whose gradation is desired to be changed, the computer CP outputs the input signals IP, is sent to buffer gate BG, and the output signal of buffer gate BG is stored in its own internal register via data bus DB.

Next, the display color control signal for the color specified by the color specification switches SW, to SW3 is sent to the memory MR. ~MB, is read into its own internal accumulator. Next, add the contents of the register and the contents of the accumulator,
The addition result is applied to the color designation switch SW. ~Memory MR. corresponding to the color specified by SW3. ~MB, is stored in the memory address. That is, each time the interrupt request signal INT is generated, the computer CPU transmits the display color control signal regarding the designated color to the memory MR. ~MB, is extracted, the contents of the output signal of the buffer gate BG are added to the contents of this discussion, and the addition result is stored in the memory MR.~MB. as a new display color control signal. For example, memory MR. Assume that the contents of memory address mb, of ~MB, are as shown in Table 2.

Therefore, when the switch SWr is switched to the lower side of the diagram only once, a signal that decreases the value of the red display color control signal by "1" is output from the chattering removal circuit CE. This signal is supplied to buffer gate 8G and is also input to NAND gate NG of interrupt request signal generation circuit ISO. The output signal of the NAND gate NG is differentiated by a portion consisting of a capacitor C, a resistor 1 and a NAND gate NG2, and the differentiated signal is applied to the computer CP as an interrupt request signal INT. Therefore, when any one signal is output from the chattering removal circuit CE, an interrupt request signal INT to the computer CPU is generated.

Therefore, the signal input to the buffer gate BQ (for example, a signal that decreases the red display color control signal value by "1") is electronically transmitted via the data des DB in response to the generation of the interrupt request signal INT. Read into the register in the computer ℃PU. As a result, the above-mentioned three addition operations are executed, and the contents of the memory address mb are reduced by "1" to become "1110". That is, the display color control signal is changed to a display color control signal that is slightly pale and indicates a red gradation. Such an operation is executed every time the switch SWr is operated. Therefore,
The display color control signal stored at memory address 4 address mb changes its value to "1" each time the switch SWr is operated toward the lower side of the diagram.
The number decreases step by step one by one. Conversely, when the switch SWr is operated upward in the diagram, the tar rl
'' will increase step by step. Such an operation is performed in exactly the same manner in the case of switches SWg and SWb. As described above, in the present invention, the setting is changed by sequentially applying a signal of "11" or "11" to the value of the display color control signal currently in use from the switch.

As is clear from the above description, according to the present invention, the red, edge, and tone are A circuit that selects and outputs display color control signal values stored in multiple memories corresponding to the three primary colors, and a signal of "11" or "11" as the display color control signal value set in this circuit. With a simple configuration that includes a circuit that sequentially applies settings from a switch and 0, it is possible to change the display color control signal in a step-like manner, and it is extremely easy to adjust and change gradation characteristics. Furthermore, since no AD converter is used, the structure can be made smaller, and the cost can be reduced as the structure is made smaller, so the practical effect is extremely large.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a conventional cathode ray tube display device, FIG. 2 is a block diagram showing an embodiment of the cathode ray tube display device according to the present invention, and FIG. 3 is a process for changing the display color control signal in FIG. 2. FIG. 3 is a diagram showing a program. M, ~M3... Brightness control signal memory, PS, ~
PS3...Parallel/serial converter, SL...
・Select, DAI~DA3...DA converter,
CPU...Electronic computer, 8G.../Zatsufuagate, KB...Keyboard, MN...
...Monitor section, CRT...Color cathode ray tube, SWr, SWg, SWb...Switch, CE
-Chattering removal circuit, ISG...Interrupt request signal generation circuit. Figure 1 Figure 2 Figure 3

Claims (1)

[Claims] 1. In a cathode ray tube display device that divides the display screen of a color cathode ray tube into a large number of pixels and displays characters, graphs, etc. by controlling the brightness of the pixels, the color brightness of red, green, and blue in each pixel is controlled. a first circuit that generates a color brightness control signal to be controlled; and a display color control signal value stored in a plurality of memories corresponding to the three primary colors of red, green, and blue based on the color brightness control signal; a second circuit that outputs the display color control signal value; and a third circuit that sequentially applies a signal of "+1" or "-1" from a switch to the display color control signal value to be set to the second circuit to change the setting of the display color control signal value. 1. A cathode ray tube display device, characterized in that each of six cathode voltages in a color cathode ray tube is controlled by a control signal.