JPS60207123A - Camera under sequence control of computer - Google Patents

Abstract

PURPOSE:To transfer accurately data by providing an absorbing circuit and absorbing a momentary write or read inhibiting signal generated by voltage variation even if a supply voltage to a CPU varies temporarily while data is written in or read out of RAM. CONSTITUTION:The absorbing circuit consisting of a resistance 11 and a capacitor 12 is provided on a line 28 and even if the output of a comparator 7 goes up to H momentarily, the level of the line 28 is held below the threshold level of gates 26 and 27, i.e. at L in the charging time of a capacitor 12 and the absorbing circuit absorbs a short impulsive noise. Then, the gates 27 and 26 respond to the momentary L H L variation of the comparator 7 to inhibit writing and reading operation. Consequently, data is transferred accurately without reference to the influence of a temporary drop in supply voltage.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a camera whose photographing operation is controlled by a microcomputer.

Cameras in which the shooting operation is controlled by a microcomputer are known, and in this type of camera, data such as film sensitivity and preset values are transferred to the AM, and based on the data written to the RAMK. Arithmetic processing is performed by the CPU.

Generally, if the voltage of the computer Fi is below a predetermined value, the data writing operation to the RAM cannot be performed accurately, so the voltage supplied to the computer is detected,
When this voltage is below a predetermined value, it is necessary to inhibit the write operation.

On the other hand, cameras use batteries as a power source, and the battery stored in the battery compartment may be disconnected from its contacts due to external vibrations.In such cases, the voltage supplied to the computer may be interrupted. decreases temporarily. Therefore, if we take the above configuration as a type that prohibits writing when the supply voltage drops, if the temporary voltage drop occurs while data is being written to the RAM, accurate data cannot be written to the RAM.
There is a drawback that even if the voltage cannot be written to and the voltage returns to a normal level, the computer thereafter performs signal processing based on the erroneous data transferred to the RAM.

The present invention was made in view of this point, and the output of a detection circuit that detects the voltage level supplied to the computer is transmitted to the computer's writing or Fi reading control circuit via an integral element, and a temporary voltage drop is detected. Even if the circuit momentarily sends out a signal that prohibits writing or reading,
The present invention absorbs this and prevents the writing or reading operation of the shifter from being inhibited by the instantaneous prohibition signal, so that accurate data writing or reading operations can be performed at all times.

Next, the present invention will be explained.

FIG. 1 is a circuit diagram showing an embodiment of a camera equipped with a write control circuit according to the present invention.

In the figure, reference numeral 1 denotes a power supply battery, which is directly connected to a circuit when housed in a battery compartment, so that a microcomputer, which will be described later, is always supplied with operating voltage from the battery. 2 is a DC/DC converter as a boost circuit for boosting the battery output. The converter detects the level of line 2a, and operates when the level is low and outputs output terminal 2a.
A boosted output is supplied to b. The level of the line 2a is set to a low level by a command from a microcomputer by operating a release operating member, which will be described later. 4 is a constant voltage circuit to which a boosted output is applied and outputs a constant voltage; 5 is a power supply transistor for supplying the entire boosted output to a control circuit (W/CH knob-r (black computer)) to be described later;
8, 9.10 is a voltage dividing resistor for dividing the boost output, 6
is a comparator that compares the voltage at the voltage dividing point of the resistors 8 and 9 with the constant voltage circuit output, and outputs a high level (hereinafter referred to as H) when the boosted output is below a predetermined level (first level). , low level when it is above a predetermined level (hereinafter referred to as "low level")
Output.

Reference numeral 7 is a comparator V-type whose output is an open collector, and when the output of the booster circuit is above a predetermined level (second level) higher than the first level, the comparator
When the level is below the second level, a high level is output as a prohibition signal.

11 is a bluer-tube resistor, 12 is a capacitor for absorbing pulsed signals, and 13 is a backup battery for backing up the AM23Q built in the microcomputer 20 (even if the power output decreases)
The contents of LAM23 are retained.

In addition to the RAM (Random Access Memory), the microcomputer 20 includes ROMs 1 to 22, a CPU (Central Millet Grocering Unit) 21 with a variable operating clock, and an upper LIOM.

AND gates 26 and 27 and an interface circuit 24 are built in as transfer circuits that control writing and reading operations to the RAM. The microcomputer-2
Line 27a in 0 is a line for transmitting the write signal (H) from VicPU21 to the gate 27, and in response to the gate 27Fi, Hq enables access to the small output RAM and performs data write operation to the RAM. Let them do it. The line 26a is a line for transmitting the read signal (H) from the CPU 21 to the gate 26.
The gate 26 sends H in response to the H, indicating that access to the RAM 23 is possible and notifying the CPU 21 of either 0M22 or 0A.
Perform all reading operations from M23.

A switch 25 is turned off when the battery 1 is set in the battery storage chamber, and when the switch is turned off, the reset of the oscillator 31 and the microcomputer 20 is canceled.

Reference numeral 32 denotes a state detection switch group that is linked to an operating member such as a release button, a film sensitivity setting operating member, a film advance detection member, etc. The state of the switch group 32 is read into the microcomputer via an interface circuit 24. It will be done.

33 is a drive circuit for driving camera elements (not shown) (for example, a release magnet, a shutter control magnet, a display, a film winding motor) according to commands from the microcomputer 20.

34 is a microcomputer 20 and an oscillator 31'J
This is a capacitor for backup.

Next, the operation of the embodiment of the present invention shown in FIG. 1 will be explained.

Now, assuming that the battery 1 is stored in the battery compartment, the output voltage DD of the battery 1 is applied to the microcomputer 20 and the oscillator 31 via the diode 3.

As mentioned above, the switch 25 is off when the battery is stored, and the computer 20 and oscillator 31
has been reset. Therefore, the oscillator 31 supplies a clock to the microcomputer 20, and the microcomputer is activated and operates according to the program stored in the R,0M22.

The contents of this program are not directly related to this application, so
Although the explanation thereof will be omitted, this program causes the microcomputer 20 to detect the switch state of a predetermined switch in the switch group 32 that is linked to the switch operating member, and to set the line 2atL and put the suction circuit 2 into the operating state. . As a result, the boosted output of the drive circuit 33 is applied, and the boosted output is detected by the resistors 8 to 1O, and when the boosted output rises to the above-mentioned first level, the output IL of the converter 6 is changed. The transistor 5 is turned on and the booster circuit output is applied to the oscillator 31 and the microcomputer 20 instead of the output of the battery 1.

The rear microcomputer detects the predetermined switch/notch state of the switch group 32 that is linked to the press of the release button, transmits the press release signal of the release button to the QCPU 21 via the interface circuit 24, and performs photometry when the release button is pressed. It is activated by the magnet drive circuit 32 which performs calculations and starts the camera mechanism, runs the shutter front curtain and starts exposure, and then waits for the shutter speed to elapse according to the above calculation result and then releases the shutter. The magnet drive circuit 33 for moving the curtain is activated and the exposure is completed. The microcomputer also detects the end of exposure using the switch group 32, transmits this to the PU via the interface circuit 24, and drives the shutter charge motor by the drive circuit 33 to wind the film and start one sequence of shooting. terminate.

A program for controlling the photographing sequence in this manner is built into the ROM, and photographing control is executed according to the program as described above.

Further, when controlling the sequence of photographing operations described above, the microcomputer 20 further performs the above-mentioned calculation (photometering, not shown) based on the film sensitivity value set by the operation of the switch linked to the film sensitivity setting member of the switch group 32. A digital value obtained by AD converting the circuit output, a preset aperture value, and a shutter time calculation based on the above preset film sensitivity value) can be executed according to the program, and the film counter can be incremented in conjunction with the above film winding. Stepping operations such as
This is executed by data transfer with 1. That is, for example, film sensitivity information is detected by the CPU 21 in the operation state of the film sensitivity setting switch in the switch group 32, and
A high signal is sent from the gate 27 to the line 27a, and a write signal (H) is sent from the gate 27 to the RAM 23 to enable access to all of the RAM, and is sequentially updated (incremented by 1) while the setting switch is operated. This is done by transferring a digital value (updating of the digital value is executed by a program in the CPU 21) to the RAM 23. The preset aperture υ value is also determined by detecting the state of the aperture setting switch in the switch group 32 using a microcomputer and setting the preset aperture υ value in the same way.
Write to AM23.

In this way, data on film sensitivity and aperture value are converted to I(
After the data is written in AM23, when the above-mentioned release operation member is operated, line 11 is sent from line 26a of CPU21, gate 26 sends out a read signal ()l), the data is read from RAM23 to CPU21, and the CPU
Exposure calculation (・S seconds, (film sensitivity data) 10 Bv (brightness data) - Av (aperture data) = Tv (
(secondary data), and Bv is set to A by an AD converter.
This is the D-converted photometry output, and this data is written in the AM 23 in the same manner as described above), and the result of this calculation is sent out as H from the line 27a of the CPU.
By writing the data into the RAM 23 again, the arithmetic operation described above is executed by data transfer between the RAM and the CPU according to the program.

Regarding the advance of the film counter, the switch group 32 indicates that the film has been wound by the motor.
Detected by a predetermined switch, H is sent out from the line 26a of the CPU, a read signal (H) is sent out from the gate 26, and the data (previous film count data) in the RAM 23 is transferred to the icPU. The CPU adds 1 to this transfer cheater and then adds H from line 27a of the CPU.
is sent out, and this 1 addition data is transferred to the RAM 23. In this way, each time a film winding operation is performed, the contents of the RAM are incremented by 1, thereby incrementing the film counter by transferring data between the RAM and the CPU according to a program.

In cameras where sequence control is performed by a microcomputer in this way, various data are transferred to the RAM, and processing such as calculations is executed based on the data transferred to the RAM. RA of
It is essential that write and read operations to M are always executed accurately.

In general, microcomputers require a voltage higher than the computer's guaranteed operating voltage (the second level: guaranteed write/read voltage) in order to accurately write data to the RAM and read data from the RAM. For this reason, in the present invention, the comparator 7 detects the entire boosted voltage and only when the voltage supplied to the computer is above the level @2, the comparator 7 outputs Lt [ It looks like it will be released. Therefore, when H is sent from the CPU 21 to the read/writes 27a and 26a as a command signal for a write or read operation, only when the boosted output is higher than the second level, 26.27 is used as the write or read signal (
H) is transmitted to the RAM 23, and the above-mentioned write and read operations are permitted only when the voltage supplied to the computer is sufficient, controlling so that accurate data is always written to the RAM.

However, with this configuration, while writing the data to the RAM, for example, the battery in the battery compartment may turn on and off due to external vibrations, or the boost output may temporarily drop due to load driving, causing the output of the comparator 7 to decrease. When the signal temporarily shifts from L to H, the write operation is prohibited.

Therefore, when the voltage supplied to the computer drops momentarily as mentioned above during writing, the data cannot be accurately transferred to the RAM or transferred from the RAM to the CPU, resulting in incorrect data being written or read. Ru.

Therefore, even if the boosted output decreases momentarily and then returns to the second level or higher, the processing by the computer will be performed based on incorrect data, resulting in an inconvenience.

For this reason, in the present invention, an absorption circuit consisting of a resistor 11 and a capacitor 12 is provided in the line/28, so that even if the output of the comparator 7 momentarily becomes H,
2) during the charging time of line 28 to 26.
The gate 27 is held below the threshold level of the comparator 7, that is, at L, and this circuit absorbs short pulse noise.
．． 26 responds to a write operation, or if the write operation is performed during a read operation, the read operation is completely prevented from being inhibited.

Incidentally, when the boost output temporarily decreases, the voltage from the boost circuit applied to the microcomputer 20 via the transistor 5 also decreases temporarily, but during this time, the backup voltage charged in the capacitor 34 is A voltage is applied to the computer 20, and a voltage is also applied to the RAM from the backup battery 13, and as mentioned above, the guaranteed operating voltage of the computer is lower than the above two levels, so the microcomputer Even if the operating voltage itself fluctuates temporarily, a voltage higher than the guaranteed operating voltage will be supplied from the capacitor 34 to the computer during this time, and the data writing operation to the RAM will be supplied to the computer. It is not affected by a decrease in boost output.

As described above, in the present invention, even if the voltage supplied to the computer temporarily drops while writing data to RAM or reading data from RAM, this temporary voltage change can cause Since the write or read prohibition signal is absorbed by the absorption circuit, accurate data transfer is always possible without being affected by a temporary drop in the voltage supplied to the computer.

In addition, the above-mentioned absorption circuit can not only absorb the temporary change in the signal due to the above-mentioned temporary voltage drop, but also absorb external noise (motor noise, radio wave noise) to the line 28. The influence of external noise can also be prevented.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of a camera equipped with a computer according to the present invention. 7... Comparator, 11... Resistor, 12...
Capacitor, 26.27...gate. Patent applicant Canon Co., Ltd.

Claims (1)

[Claims] In a camera that includes a transfer circuit that transfers data to a memory circuit, a processing circuit that processes data in the memory circuit, and a computer that controls the camera's photographing sequence, the supply voltage level to the computer is detected and the A detection circuit that generates a prohibition signal that prohibits the transfer circuit from transferring data to the memory circuit when the voltage is equal to or higher than a predetermined value F, and an integral element connected to the output of the detection circuit are provided to integrate the output of the detection circuit. A camera controlled by computer intelligence, characterized in that the information is transmitted to the transfer circuit through an element.