JPS60200771A - Controlling method of 3-phase stationary power converter - Google Patents

Abstract

PURPOSE:To obtain a high output voltage while obtaining similarity to the desired waveform by forming a target phase voltage waveform having a simple relation to a voltage waveform between target lines, and controlling to obtain the target phase voltage waveform. CONSTITUTION:Pulse width modulation controllers 3-5 of 3 phases in a power inverter 2 for supplying a voltage from a DC power source 1 to 3-phase AC loads 6 have voltage generators 7 for generating target voltage waveforms between lines and target phase voltage waveform generators 9. The generator 9 superposes the waveform of 1/3 period with the output of the generator 7 to generate a target phase voltage, and a comparator 11 compared it with the output of a triangular voltage generator 10 to obtain pulse width modulation control signals 12-18. The output phase voltage of the inverter 2 is fed back to the comparator 8 to obtain a phase voltage waveform similar in average value to the target phase voltage waveform.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a method for controlling a static power converter that can obtain high three-phase output voltage values using a pulse width modulation (PWM) three-phase bridge type inverter or the like.

2. Description of the Related Art A method of obtaining an output voltage approximating a sine wave using a pulse width modulation impark or cycloconverter is already known. By the way, when obtaining a three-phase approximate sine wave output voltage using the pulse width modulation method, the switching elements of each phase are controlled on and off so that a single sine wave is obtained. In order to control the output voltage value, the conduction time of the switching element is set to tt71J (fll).Therefore, regardless of the control of the output voltage value.

Approximate sine waves can be obtained. However, if the four-time width of the switching element reaches the maximum (fttlJ (ft=1 limit) K1), it is no longer possible to obtain an output voltage higher than this.Of course, if the power supply voltage is increased, the KFB force will increase It is possible to increase the voltage, but it is even more difficult at a given power supply voltage.
It is advantageous if an output voltage is available.

OBJECTS OF THE INVENTION An object of the present invention is to provide a control method for a three-phase static power converter that can obtain a high output voltage while ensuring approximation to a desired waveform.

Structure of the Invention To achieve the above object, the present invention provides a reference wave (for example, a waveform obtained by multiplying the waveform ea of the embodiment by v'a and shifting the phase by one phase) corresponding to a target line voltage (for example, a waveform obtained by multiplying the waveform ea of the embodiment by v'a and shifting the phase by one phase). The example sine waves ea, eb, ec) include a waveform with the same polarity as the reference wave in the 0 to 2π interval, and the -245π to -π interval and -π to -ππ open- are the reference wave 3 3
3 and a waveform of different polarity, and the i-period waveform is formed such that the same-polarity waveform and the different-polarity waveform have symmetry with each other (for example, the waveform eol of the embodiment).

The target phase voltage waveform (
For example, the waveform e in the example. a, eob, and eo() are formed or assumed for each phase, and the conversion switching elements of each phase are controlled so as to obtain a phase voltage waveform that approximates the target phase voltage waveform in accordance with the Hirai Kiki average value. 3 characterized by
The present invention relates to a method of controlling a phase stationary power converter.

Effects of the Invention According to the above invention, a target phase voltage waveform having a simple relationship with the target line voltage waveform is formed or assumed, and control is performed so as to obtain this target phase voltage waveform. A high output voltage can be obtained while maintaining approximation to the desired waveform. In addition, the target phase voltage waveform is an hourglass shape that has been transformed to include a frequency component three times that of the target line voltage waveform, so even if the target phase voltage waveform does not match the reference wave, the line voltage waveform of the three-phase output Three times the frequency component is removed from the voltage waveform, and an output that approximates the target line voltage waveform can be obtained.

Embodiment FIG. 1 shows a pulse width modulation type three-phase inverter according to a first embodiment of the present invention. This three-phase inverter has a DC power supply il+ and six switching transistors Sr.
, St, SR, S4. An inverter (2) in which Sa and Ss are connected in a three-phase bridge, and a control circuit for each phase +31 (
41 (5), and an inverter (
2), it is configured to convert into a sine wave with an approximate average value and supply it to the idle load (6) of a three-phase father-flow motor, etc. (
It's true.

Pulse width i + J Mj control circuit + 31 t4) t5J
have substantially the same configuration, the control circuit of the 3rd phase
(7) is a target sine wave voltage generation circuit, in which the output line voltage of the reversing device (2J is the target) is shown in Fig. (81 is a subtractive synthesis circuit, which performs voltage correction by subtracting the waveform obtained from the target sine wave voltage waveform generation circuit f7J and the first phase voltage of the inverse converter (21). target sine e
This is the circuit that obtains the pressure.

(9) is a Megura phase tortoise pressure waveform generation circuit, which is shown in Fig. 3 (al
This is a circuit that forms a target sine wave eaK in Figure 3 (shown as a solid line in dl). This is the target signal for PWM control of the switching transistors S, , S, and the switching transistors S, , S2 are as shown in FIG.
It is turned on and off so that the waveform of dl can be obtained. The details of the force forming method of the drum shape shown in FIG. 3 fdl will be explained soon.

(Lull is a triangular wave voltage generation circuit, and
1-triangular wave city 1 pressure (11+aJ is generated. ulJ
is a comparison circuit, and FIG. 4 (target phase voltage waveform e of al.

It consists of a voltage comparator that compares a and a triangular wave voltage (IUa) to form a pulse width control signal as shown in FIG. 4 (bl). The pulse width modulation control No. 8 of FIG. 4 (bl) obtained from the comparison circuit 0υ is supplied to the base of the transistor SI by the line
The ft1lJ rtl signal, inverted at 3+, is provided by line U to the base of transistor S2. Second
and the third phase control cape circuit (4F (51)).A similar pulse width modulation ffi+J control signal is formed, and the line u5
℃transistor 83~S6 according to 1u61071181
are supplied to the base of each.

The control signal pulse width modulated to obtain the target phase voltage waveforms e, a, eob, and eoo of the first, second, and third phases shown in FIG.
When the switching transistors SI to S6 are connected to the output line α91 of the inverter t21 (2(1) 1
A waveform whose average value approximates a sine wave is obtained between the valley lines of 211. For example, the first phase line (19+) and the second phase line (
20), an output voltage is obtained which approximates the waveform obtained by advancing the phase of the waveform ea of FIG. 3 (al) by -.

Next, the relationship between the sine wave ea shown in FIG. 3 (al) and the target phase pressure technique e.a in FIG. 3 tdl will be explained.

Current waveform (110 cities, source dragon pressure E).

The polarity of the part beyond the slice level is reversed and the third
Figure (obtains the drum shape of bl.Furthermore, O~2π of Figure 3 tel
Place the part that exceeds the slice level in the section.

Figure 3 (obtain the composite waveforms e and h of cl. After that, the third
Fig. 3 (composite waveform e. β of cl)
Figure 3 (dl drum shape e.a and 1-
Ru. Accordingly, the waveform e and a of di in FIG. 3 can be expressed by the following equation.

eoa-ea+eoh =SInωt+eoh However, ω is 2πf, and f is the output frequency.

Note that e in each section. h is as follows.

It is.

FIG. 2 shows the target phase pressure waveform e in FIG. 3. 8. eob, eo
.

A circuit for forming the is shown. (7a), (7b)
, (7c) is the first. Second. and a third phase target sine wave voltage generation circuit.

There is no problem with the value of .

(22aJ, (22b), (22c) are slice circuits.

The waveforms obtained from the target sine wave voltage generation circuits (7a) (7b) (7C) are set to 1, for example, the level of the surface current voltage E, that is +
lX is a circuit that slices at the -1 level and extracts the portion exceeding the slice level as shown in FIG. 3 [bl]. In addition, changing the slice level "'((If not supported.

33 (is a 7JD arithmetic synthesis circuit, and the slice part taken out from the three slice circuits 22a, 22b, and 22bJ (22c) is combined to obtain the drum-shaped e and h of C1 in FIG. 3. .

In addition, bmTE'ast pressure ea, eb, eo&1-
-yt (Since the phase difference is 120 degrees, the waveform shown in FIG. 3 (C1) can be obtained from j of the addition/synthesis circuit.

(24a) (24b) (24cJ is the target sine wave voltage e
a, eb.

The drum shape e obtained from the 710 arithmetic synthesis circuit for eo. h.
This is the (oral) tract that forms ob and eoc.

By the way, from the circuit (9) shown in the circuit of Figure 1, if a sine wave is generated in the same manner as the conventional method, the maximum installation of the output line voltage will be @Eo is expressed by the following equation.

However, Ed is the voltage of DC voltage (11).In other words, it is impossible to make the trough width of pulse width modulation greater than the range Ed that does not cause waveform distortion.Of course, there is no problem even if waveform distortion occurs. In this case, the amplitude of the output line voltage can be made closer to the top current power supply voltage by changing the arrangement of pulse width modulation pulses.

On the other hand, in the method according to the present invention, it is possible to obtain a line-to-line pressure having an amplitude equal to the blood flow electromagnetic pressure Ea without causing the drum-shaped distortion in terms of implementation.

Specifically, the amplitude E of the maximum output line voltage in the conventional method. -, and it is possible to increase the output line pressure by approximately 15%.

On the other hand, the Souryu pressure is the drum shape e in Figure 3 Fdl. Considering the distortion caused by aK'1-, in a three-phase AC circuit (
-Even if the three-phase voltage is distorted, if it has symmetrical distortion, the line voltage waveform will not include harmonics of the series shown in the following equation.

5n-3 (where n is an integer of ], 2...) Figure 3. Idl drum shape e. a is a waveform obtained by superimposing waveforms e and h of FIG. 3 (cl) on waveform ea of FIG.
-3 harmonics are not included.

As a result, the phase voltage waveform e in FIG. 3 Fdl. B*en
The line voltage waveform corresponding to b* e oc includes 6n-3
does not include harmonics.

Next, a second embodiment of the present invention will be described with reference to FIGS. 5 and 6. However, the parts common to the first embodiment in FIGS. , the same reference numerals are used to omit the explanation 1112i.In the method shown in FIG. 5, the waveform e8 of FIG.
When the target phase voltage waveform generation circuit (9)
Figure (waveform e of dl. Generates a.

On the other hand, from line (191 to pulse width modulation phase voltage eAY)
Detect it and input it to this filter flash. Filter 4)
) constitutes the average value voltage generation circuit, and the sixth
The average value voltage eA (waveform shown by the dotted line) of the pulse width modulated output voltage e shown in principle in Figure (al) is obtained.

6υ is a voltage comparison circuit, which compares the average value voltage eA obtained from the filter ■j with the target phase difference shown in FIG. 3 (dl or FIG. 6 Tdl) obtained from the target al voltage waveform generation circuit (9).

Pressure waveform e. a and obtains an output corresponding to the difference.

01J is a Schmitt trigger circuit which has a hysteresis characteristic between an upper trigger level vT+ and a lower OO trigger level vTt to obtain an output voltage. That is.

When eA-eoa obtained from the comparison circuit t311 becomes thicker than the upper trigger level ■T+, a low level output is generated, and when eA-eoa becomes smaller than the lower trigger level ■Tz, a high level output is generated. This is the circuit where this occurs. In addition, the comparison circuit GIJ and the Schmitt trigger circuit (31
I may be an integrated IC.

(321 is a transistor base drive circuit, which controls the transistor 82 to turn off based on the high level output of the Schmitt trigger circuit), and conversely turns off the transistor SR'la.
0: On control, see Schmitt trigger circuit (311
) This is a circuit that generates a pulse that turns on the transistor s1 and turns off the transistor 82 based on the low level output.

Figure 6 shows the state of the valley in Figure 5 in principle, where (a) is the voltage of the output line (L scratch), (b) is the voltage of the output line (20), and (C) is the line (191 and (20
) and line voltage.

(di indicates the gradual phase tortoise pressure waveform. The first of the inverse converter +21
Once the pulse width modulated output voltage eA shown in FIG. 6 (al) is detected from the phase output line discharge, it is averaged by the filter output and becomes the average value voltage eA of FIG. 6 (al).

The comparator circuit 3υ is 2 Fig. 6 (average voltage eA of al and 6
The target phase voltage waveform e in Figure (dl) is compared with a, and a voltage corresponding to the difference is generated. When the voltage difference exceeds the hysteresis value of the Schmitt trigger circuit 6D, the output state is reversed. If When the detected average voltage eA is higher than the target phase voltage waveform e.a (.), the transistor S1 is controlled off in order to lower the output amplitude. Conversely, when the average voltage eA is higher than the target phase voltage waveform e.a. If the output voltage is also low, the transistor S is turned on in order to increase the output amplitude.

Although the control based on the first phase control circuit (3) has been described above, similar control is performed in the second and third phase control circuits 141+5J. Now, the detection voltage of the second phase is eB,
The average value of the pressure is eB, the first phase voltage of JC is eob, and the third phase detection voltage is 'le. , its average value voltage, its target value, pressure? e. 0 and ``fT1.'', the control is of first order.

Under the condition of eB-eob>VTI, transistor s3 is turned off and transistor S4 is turned on, and under the condition of eB-eob<VT.

Transistor S is turned on and transistor S4 is turned off.

On the other hand, under the conditions of eo−eoo〉■,I, the transistor S
, is turned off and S6 is turned on, and under the condition that eo-eoo<VTl, the transistor S5 is turned on and S is turned off.

If the first phase is also expressed in the same format as above, eA-eoa>
Under the condition of VTl, the transistor S1 is turned off and S is turned on, and under the condition of eA-eoa<vT2, the transistor SL is turned on and S2 is turned off.

By the circuit 1 shown in Fig. 5, the output phase voltage of the inverter (2) is adjusted to the target phase voltage waveform e.a shown in Fig. 3 (di) or Fig. 6 (di). , the output voltage can be increased, and the maximum range can be increased.

FIG. 8 shows a target phase voltage generation circuit according to a third embodiment of the present invention. That is, another example of the target phase voltage generation circuit (9) shown in FIGS. 1 and 5 is shown. Further, FIGS. 9 and 10 show the states of each part in FIG. 8.

Similarly to FIG. 2, in FIG. The first, second and third phase sine waves (reference waves) ea, eb,
ec is supplied.

(25) is a positive three-phase half-wave rectifier circuit composed of diodes, and a three-phase sine wave voltage generation circuit (Fig. This circuit obtains the positive half-wave rectified waveform e3 of FIG. 9 fbl.

(7! 61 is a negative three-phase half-wave rectifier circuit composed of diodes, which half-wave rectifies the sine waves ea - eb and ec in Fig. 9 (negative half-wave rectified waveform of bl) This is a circuit that obtains e.

The Q force is the first subtraction circuit, and it is added from the power source (1a) corresponding to the - voltage E of the DC power source (1) shown in FIG. 1, and the voltage waveform e4 shown in FIG. C4 corresponds to the three-phase half-wave rectified waveform e3, so it contains a frequency component three times that of the fundamental sine wave ea.The rut is the second subtraction circuit, and the power supply ( 1b) to obtain the voltage waveform e6 shown in FIG. 9 (C1).

(29) is an intermediate value waveform generation circuit, in which the waveform e4 in FIG. 9 (C1 obtained from the first subtraction circuit) and the waveform e6 in FIG. 9 tel obtained from the second subtraction circuit (28) are shown. This is a circuit that obtains the waveform e7 shown in FIG. 9 (dl) through which intermediate point.

That is, this circuit (29) is a circuit that adds the value of waveform e4 and the value of waveform eI at each time point (phase angle) to obtain a negative waveform C7.

(24a) (24b) (24c) is a target sine wave voltage eB, C4) and an intermediate value waveform generation circuit (J9) at eo.
) is superimposed to form the target phase voltage waveform eoa of the first phase shown in FIG. If the waveform e7 of FIG. 9 fd) is superimposed on the sine wave eB of FIG. 9 ial, a waveform that can be obtained by voltage E is obtained. Since this is a phase voltage that cannot be obtained with an inverter, the waveform shown in FIG. 9(e) is a phase voltage that can be obtained with an inverter. Therefore, the inverter shown in FIG. 1 or 5 is driven so as to obtain the waveform shown in FIG. 9(e). If the pulse width of the inverter (2) is controlled so that the waveform shown in FIG. 9(e) is approximately obtained, the waveform e7 in FIG. 9(dl) has a frequency three times that of the sine wave e3. Since it is a waveform and a symmetrical wave, 3
Due to the characteristics of phase alternating current, they cancel each other out and do not appear in the three-phase line voltage. Therefore, a sinusoidal line voltage having a magnitude of -shifted sinusoidal waves ea, eb, and ec and multiplied by V'3 is obtained. FIG. 9 shows the waveform of the sine wave ea.

Modifications The present invention is not limited to the above-described embodiments, and, for example, the following modifications are possible.

Target phase voltage waveform e shown in Figure 3 fdl. a, eob
, ec0 may not be formed analogously, but may be formed using a digital circuit.

CB) The filter (26) in Figure 5 is a circuit that generates a digital signal indicating the average value, the target phase voltage waveform generation circuit (9) is also configured to generate a digital signal, and the two are digitally compared. It's okay.

(C) Subtractive synthesis circuit for output voltage control (8)
may be transferred to the output stage of the target phase voltage waveform generation circuit (9).

The υ pulse width modulation control signal may be formed by creating a signal in which a triangular wave voltage (10a) is superimposed on the target phase voltage waveform e.a shown in FIG. 4 (al), and comparing this signal with a predetermined level.

1 2 4 5 ■ Slice level is -π to -π, -π terπ3 3
There is no problem in moving up and down while being sliced within the 3 3 section. Note that if the maximum amplitude of the voltage generated from the target sine wave voltage generation circuit (7) is less than the slice level, slicing is not performed, the superimposed waveform eo11 becomes zero, and the target phase voltage waveform becomes a sine wave.

(F') It is applicable not only to a three-phase inverter but also to a three-phase cycloconverter. FIG. 11 shows the principle of only the first phase of the cycloconverter t7, and FIG. 12 shows the operation of FIG. 11. The secondary winding (4υ) of the power transformer (40) is configured in a center tap type, and the thyristor A
, B, C, and D to the load (42).The power transformer (40) is supplied with alternating current as shown in Figure 12, and 0
In the ~π interval, the conduction of thyristors A and B is controlled as shown in FIG. 12(B), and πta2π171', ! 'l Condolence 1,
Sun, -kidney (-me If -r Aρ T) also Haiku 11 Ya 1
Summer Kosuke! The phase voltage waveform shown in FIG. 12(C) is obtained at +#A/-+. The target phase voltage waveform when controlling the conduction angle in this way is shown, for example, as waveform e in FIG. 3(d). If a, the waveform is e. Thyristors A to D are controlled to approximate a. Although only the first phase is shown in FIGS. 11 and 12, the second and third phases are similarly configured.

(G) Applicable even when the target waveform is not a sine wave. For example, in order to obtain the target waveform e3 shown in the actual device in FIG. 7, the target phase voltage waveform e is shown by the dotted line. a, and switch S, ~ to obtain the waveform eoa shown by this dotted line.
Controls S6.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing a three-phase inverter according to the first embodiment of the present invention, FIG. 2 is a block diagram showing a target phase voltage waveform generation circuit, and FIGS. 3 is a waveform diagram showing the states of each part in FIG. 2. FIG. FIG. 5 is a circuit diagram showing a three-phase inverter according to a second embodiment of the present invention, and FIG. 6 is a waveform diagram showing the states of each part in FIG. FIG. 7 is a waveform diagram showing waveforms of a modified example. FIG. 8 is a block circuit diagram showing a target phase voltage generation circuit according to a third embodiment of the present invention. 9 and 10 are waveform diagrams showing the states of each part in FIG. 8. Figure 11 is a circuit diagram showing one phase of the cycloconvert,
FIG. 12 is a waveform diagram of each part in FIG. 11. (1)...DC power supply, (2)...Inverse converter, (,3
1 (41 (51...Control circuit, (7)...Target sine wave voltage generation circuit, (9)...Target phase voltage waveform generation circuit. Fig. 1 Fig. 4 Fig. 5

Claims (1)

[Claims] +11 Equivalent target phase voltage waveforms including waveforms of different polarity from the standard reference wave having a shape corresponding to the target line voltage, and such that the waveforms of the same polarity and the waveforms of the different polarity have symmetry with each other. 3-phase static power conversion, characterized in that conversion switching elements of each phase are controlled so as to obtain a phase voltage waveform that is formed or assumed in each phase and approximates the target phase voltage waveform in an average value. How to control the device.