JPS60198788A - Structure of josephson ic - Google Patents

Structure of josephson ic

Info

Publication number
JPS60198788A
JPS60198788A JP59053609A JP5360984A JPS60198788A JP S60198788 A JPS60198788 A JP S60198788A JP 59053609 A JP59053609 A JP 59053609A JP 5360984 A JP5360984 A JP 5360984A JP S60198788 A JPS60198788 A JP S60198788A
Authority
JP
Japan
Prior art keywords
earth
ground
integrated circuit
josephson
shield plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59053609A
Other languages
Japanese (ja)
Other versions
JPH025018B2 (en
Inventor
Kunio Yamashita
山下 邦男
Yutaka Harada
豊 原田
Yuji Hatano
雄治 波多野
Hideaki Nakane
中根 英章
Shinichiro Yano
振一郎 矢野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP59053609A priority Critical patent/JPS60198788A/en
Publication of JPS60198788A publication Critical patent/JPS60198788A/en
Publication of JPH025018B2 publication Critical patent/JPH025018B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N69/00Integrated devices, or assemblies of multiple devices, comprising at least one superconducting element covered by group H10N60/00

Abstract

PURPOSE:To reduce influences of a magnetic field generated by earth current by a method wherein a ground plane is arranged in insulation from earth terminals by providing earth lines connected to the earth terminals of an IC. CONSTITUTION:In a Josephson IC chip 201, an earth plate 207 to pass earth currents of ICs 203-206 is formed on an Si substrate 202 by using an Nb film. An insulation layer 209 is produced except the aperture of the earth terminals 208 connecting the earth plate 207 to the earth lines 213 of the ICs 203-206. A shield plate 210 is formed out of an Nb film where the apertures of the earth terminals 208 have been removed with accelerated Ar atoms, and an insulation layer 211 is produced except the apertures of the earth terminals 208 so as to cover the shield plate 210. The ICs 203-206 are produced after formation of superconductive films 212 (Pb alloy) to fill the apertures of the earth terminals 208 and of the earth lines 213 (Pb alloy). The earth plate 207 is connected to a bonding pad 217.

Description

【発明の詳細な説明】 [発明の利用分野] 本発明はジョセフソン・コンピュータ等に用いるジョセ
フソン集積回路に係り、特に信頼性の高い集積回路に好
適な構造に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a Josephson integrated circuit used in a Josephson computer and the like, and particularly to a structure suitable for a highly reliable integrated circuit.

[発明の背景] 従来のジョセフソン集積回路(例えばIBMJourn
al of Re5earch and Develo
pment、 Vol 24Na2130〜142.1
95〜205)は、回路のアース電流を流出するための
アース板をシールド機能をもつグランドプレーンで代用
している。その従来例を第1図に示す。
BACKGROUND OF THE INVENTION Conventional Josephson integrated circuits (e.g. IBM Journal
al of Re5earch and Develo
pment, Vol 24Na2130~142.1
95 to 205), a ground plane having a shielding function is used as a substitute for the ground plate for draining the ground current of the circuit. A conventional example is shown in FIG.

ジョセフソン集積回路チップ101において、地磁気等
外部からの磁気から回路を保護するためのシールド板と
して用いるグランドプレーン102は、超伝導体で形成
される。これは、超伝導体は磁気を遮蔽するからであり
、グランドプレーンは、ポンディングパッド部103,
112を除いてほぼチップ全面に作製されている。ジョ
セフソン回路104〜107にはパッド108から電源
線109を通して給電される。そしてジョセフソン回路
104〜107のアース電流は、アース端子110.グ
ランドプレーン102を通り、ポンディングパッド11
2に流出する。
In the Josephson integrated circuit chip 101, the ground plane 102 used as a shield plate for protecting the circuit from external magnetism such as earth's magnetism is formed of a superconductor. This is because the superconductor shields magnetism, and the ground plane is connected to the bonding pad portion 103,
It is fabricated on almost the entire surface of the chip except for 112. Josephson circuits 104 to 107 are supplied with power from pad 108 through power supply line 109. The ground current of the Josephson circuits 104-107 is then passed through the ground terminals 110. Passing through the ground plane 102, the bonding pad 11
2.

このような構造では、ジョセフソン集積回路104〜1
07のアース電流111はジョセフソン回路回路107
の下面を流れることになる。そ(7)M果、アース電流
111によって発生する磁界がジョセフソン集積回路1
07のスイッチング素子のしきい値曲線を変動させ、極
端な場合には電圧状態にスイッチしてしまい、集積回路
が誤動作するという欠点があった。
In such a structure, Josephson integrated circuits 104-1
07 earth current 111 is Josephson circuit circuit 107
It will flow under the surface. (7) As a result, the magnetic field generated by the earth current 111
This has the disadvantage that the threshold curve of the 07 switching element fluctuates, and in extreme cases it switches to a voltage state, causing the integrated circuit to malfunction.

[発明の目的] 本発明の目的はジョセフソン集積回路におけるアース電
流による誤動作を防止し、集積回路の信頼性を向上した
、ジョセフソン集積回路の構造を提供することにある。
[Object of the Invention] An object of the present invention is to provide a structure of a Josephson integrated circuit that prevents malfunctions caused by ground current in the Josephson integrated circuit and improves the reliability of the integrated circuit.

[発明の概要] 本発明では、ジョセフソン集積回路のアース電流によっ
て発生する磁界を集積回路と遮断することのできる構造
をとることにより上記欠点をなくすものである。具体的
には従来のグランドプレーンの持つ二つの機能を、独立
に設けたアース線とシールド板とで果すようにした。こ
の構成によりアース電流による回路の誤動作の低減が図
れる。
[Summary of the Invention] The present invention eliminates the above-mentioned drawbacks by employing a structure that can isolate the integrated circuit from the magnetic field generated by the ground current of the Josephson integrated circuit. Specifically, the two functions of a conventional ground plane are fulfilled by an independently provided ground wire and shield plate. This configuration can reduce circuit malfunctions caused by ground current.

[発明の実施例] 以下、本発明の詳細な説明する。[Embodiments of the invention] The present invention will be explained in detail below.

その第1の実施例を第2図(a)、 (b)に示す。磁
気遮断用のシールド板210とアース電流を流すための
アース線207(図面においては板状に形成されている
ので、以下、アース板と言うことにする)を絶縁層20
9を介して設け、二層構造とした場合゛の実施例である
。さらに具体的には、シールド板210の下に絶縁層2
09に介して、アース板207を設け、アース電流によ
って発生する磁界をシールド板210で遮断するように
した構造の実施例である。
The first embodiment is shown in FIGS. 2(a) and 2(b). A shield plate 210 for magnetic shielding and a ground wire 207 (hereinafter referred to as a ground plate since it is formed in a plate shape in the drawing) for flowing a ground current are connected to an insulating layer 20.
This is an embodiment in which a two-layer structure is provided through a cylindrical layer 9. More specifically, an insulating layer 2 is provided under the shield plate 210.
This is an embodiment of a structure in which a grounding plate 207 is provided through the grounding plate 09, and a shielding plate 210 blocks the magnetic field generated by the grounding current.

第2図(a)に回路チップ201の平面図、第2図(b
)にアース端子部208のAA’断面図を示す。ジョセ
フソン集積回路チップ201において、熱酸化したSt
基板202上に直流マグネトロン・スパッタ法で作製し
たNb膜を用いて、集積回路203〜206のアース電
流を流すためのアース板207を形成する。つぎに、ア
ース板207と集積回路203〜206のアース線 213とを接続するアース端子208の開口部を除き、
絶縁層(例えば5in)209を通常のリフトオフ法で
作製する。さらに、アース端子208の開口部を加速し
たAr原子によって除去(イオンエツチング)したNb
膜でシールド板210を形成し、絶縁層211を絶縁層
209と同様に、アース端子208の開口部を除き、か
つシールド板210をおおうように作製する。つぎにア
ース端子208の開口部の穴うめ用の超電導膜212と
スイッチング素子のベース電極と同層のアース線213
を例えばPb合金で形成した後、集積回路203〜20
6を作製する。集積回路203〜206はポンディング
パッド214から電源線215を通じて給電し、アース
板207はポンディングパッド217と接続する。
FIG. 2(a) is a plan view of the circuit chip 201, and FIG. 2(b) is a plan view of the circuit chip 201.
) shows a cross-sectional view taken along line AA' of the ground terminal portion 208. In the Josephson integrated circuit chip 201, thermally oxidized St
A grounding plate 207 through which grounding currents of the integrated circuits 203 to 206 flow is formed on the substrate 202 using an Nb film produced by DC magnetron sputtering. Next, except for the opening of the ground terminal 208 that connects the ground plate 207 and the ground wires 213 of the integrated circuits 203 to 206,
An insulating layer (for example, 5 inches) 209 is fabricated by a normal lift-off method. Furthermore, Nb removed (ion etched) by accelerated Ar atoms from the opening of the ground terminal 208.
A shield plate 210 is formed of a film, and an insulating layer 211 is produced in the same manner as the insulating layer 209 so as to cover the shield plate 210 except for the opening of the ground terminal 208. Next, a superconducting film 212 for filling the opening of the ground terminal 208 and a ground wire 213 on the same layer as the base electrode of the switching element.
are formed of, for example, a Pb alloy, and then the integrated circuits 203 to 20
6 is prepared. The integrated circuits 203 to 206 are supplied with power from a bonding pad 214 through a power line 215, and the ground plate 207 is connected to the bonding pad 217.

このような構造の集積回路では、集積回路203〜20
6のアース電流216はアース線213、穴うめ用超電
導膜212を通り、アース板207に流出し、ポンディ
ングパッド?17に向って流れ、集積回路205の下を
通ることになる。しかしながら、アース板207の上面
にはシールド板210が設けられているため、アース電
流216で発生する磁界はシールド板210によって遮
蔽される。その結果、例えば集積回路205のしきい値
曲線が変化することもなく、誤動作することもない。
In an integrated circuit having such a structure, the integrated circuits 203 to 20
The grounding current 216 of No. 6 passes through the grounding wire 213 and the hole-filling superconducting film 212, flows out to the grounding plate 207, and connects to the bonding pad? 17 and passes under the integrated circuit 205. However, since the shield plate 210 is provided on the upper surface of the earth plate 207, the magnetic field generated by the earth current 216 is shielded by the shield plate 210. As a result, for example, the threshold curve of the integrated circuit 205 does not change and malfunctions do not occur.

以上説明したように、実施例によればアース電流による
磁界をシールド板で遮蔽することができ、集積回路の誤
動作を防止する効果がある。
As explained above, according to the embodiment, the magnetic field caused by the earth current can be shielded by the shield plate, which has the effect of preventing malfunction of the integrated circuit.

第3図(a)、 (b)で第2の実施例を説明する。The second embodiment will be explained with reference to FIGS. 3(a) and 3(b).

尚、第2図(b)はアース端線313のBB’断面を示
したものである。シールド板303とアース線305と
を絶縁層304を介して設けた二層構造の場合である。
Incidentally, FIG. 2(b) shows a BB' cross section of the ground end wire 313. This is a case of a two-layer structure in which a shield plate 303 and a ground wire 305 are provided with an insulating layer 304 interposed therebetween.

具体的にはシールド板303の上面にアース線305を
設けた場合の実施例であり、アース線305を流れる電
流によって発生する磁気がアース線の直下に集中し、ア
ース線305かられずかでも離れると急激に小さくなる
ため集積回路には磁界の影響が及ばない。
Specifically, this is an example in which a ground wire 305 is provided on the upper surface of the shield plate 303, and the magnetism generated by the current flowing through the ground wire 305 is concentrated directly under the ground wire and is separated from the ground wire 305 even if only a little. Since the magnetic field suddenly becomes smaller, the integrated circuit is not affected by the magnetic field.

ジョセフソン集積回路チップ301において、熱酸化し
たSi基板302上にシールド板303をNb膜で形成
し、その表面を酸化して酸化膜314 (Nb20g)
を形成し、絶縁層(例えば5iO)304を蒸着した後
、スイッチング素子のベース電極と同層の材料(例えば
Pb合金)でアース41305を作製する。その後、電
源線306をポンディングパッド307に接続した集積
回路308〜311を作製し、アース線305はポンデ
ィングパッド312と接続する。
In the Josephson integrated circuit chip 301, a shield plate 303 is formed of a Nb film on a thermally oxidized Si substrate 302, and its surface is oxidized to form an oxide film 314 (Nb 20g).
After forming an insulating layer (for example, 5iO) 304, a ground 41305 is made of the same material (for example, Pb alloy) as the base electrode of the switching element. Thereafter, integrated circuits 308 to 311 are manufactured in which the power line 306 is connected to the bonding pad 307, and the ground line 305 is connected to the bonding pad 312.

このような構造の集積回路では、集積回路のアース電流
313はすべてアース線305に集まりポンディングパ
ッド312に流出し、集積回路308〜311の下面を
通らない。さらに、アース線305と集積回路308〜
311の距離を、例えば40〜50μmにすればアース
電流313による磁界がアース線305直下の約115
00に減少する。したがって、アース電流で発生する磁
界によって集積回路が誤動作するようなことはない。
In an integrated circuit having such a structure, all of the ground current 313 of the integrated circuit gathers on the ground wire 305 and flows out to the bonding pad 312, and does not pass through the bottom surfaces of the integrated circuits 308-311. Furthermore, the ground wire 305 and the integrated circuit 308~
If the distance of 311 is set to, for example, 40 to 50 μm, the magnetic field due to the ground current 313 will be approximately 115 μm directly below the ground wire 305.
00. Therefore, the integrated circuit will not malfunction due to the magnetic field generated by the earth current.

以上説明したように、第2の実施例によれば軸茎の集積
回路と同じ工程でアース線を独立に設けることができ、
アース電流が集積回路の下面を通過しないため、アース
電流による集積回路の誤動作を防止する効果がある。
As explained above, according to the second embodiment, the ground wire can be provided independently in the same process as the integrated circuit of the stem,
Since the ground current does not pass through the bottom surface of the integrated circuit, it is effective in preventing malfunction of the integrated circuit due to the ground current.

さらに、第4図(a)、 (b)で第3の実施例を説明
する。尚、同図(b)は、アース端子406のcc’断
面図である。シールド板404とアース板403(もし
くはアース線)を分割した一層の超電導膜で構成した場
合の実施例である。
Further, a third embodiment will be explained with reference to FIGS. 4(a) and 4(b). In addition, FIG. 4B is a cc' cross-sectional view of the ground terminal 406. This is an example in which the shield plate 404 and the ground plate 403 (or the ground wire) are composed of a single layer of divided superconducting film.

ジョセフソン集積回路チップ401において、熱酸化し
たSi基板402上に直流マグネトロンスパッタリング
によってNb膜を作製し、フッ酸。
In the Josephson integrated circuit chip 401, a Nb film was formed on a thermally oxidized Si substrate 402 by direct current magnetron sputtering, and then diluted with hydrofluoric acid.

硝酸、水の混合液でエツチングし、アース線403とシ
ールド板404を分離する。つぎに、アース線403と
スイッチ素子のベース電極405とを接続するための超
電導膜(例えばpb金合金406を作製する。その後、
通常の工程で集積回路(409〜412)を形成し、ポ
ンディングパッド407と電源[408から集積回路4
09〜412に給電できるように配線し、アース線40
3はポンディングパッド414に接続する。尚、層41
5はシールド板404表面を酸化した酸化膜であり、層
416はSiOの絶縁膜である。
The earth wire 403 and the shield plate 404 are separated by etching with a mixture of nitric acid and water. Next, a superconducting film (for example, a pb gold alloy 406) for connecting the ground wire 403 and the base electrode 405 of the switch element is fabricated.
The integrated circuits (409 to 412) are formed by a normal process, and the integrated circuit 4 is connected to the bonding pad 407 and the power supply [408].
Wire so that power can be supplied to 09 to 412, and connect the ground wire 40
3 connects to the bonding pad 414. Furthermore, layer 41
Reference numeral 5 is an oxide film obtained by oxidizing the surface of the shield plate 404, and layer 416 is an insulating film of SiO.

このような構造の集積回路では、集積回路409〜41
2のアース電流413はアース線403に集まり、ポン
ディングパッド414に流れる。したがって、集積回路
のアース電流413は集積回路の下面を通過しないため
、アース電流によって発生する磁界は集積回路に影響を
およぼさない。
In an integrated circuit having such a structure, integrated circuits 409 to 41
The ground current 413 of No. 2 collects on the ground wire 403 and flows to the bonding pad 414. Therefore, since the integrated circuit ground current 413 does not pass through the bottom surface of the integrated circuit, the magnetic field generated by the ground current does not affect the integrated circuit.

以上説明したように、第3の実施例によれば、アース線
とシールド板を分離し、同層で独立に設けることにより
、アース電流による集積回路の誤動作を防止する効果が
ある。
As described above, according to the third embodiment, by separating the ground wire and the shield plate and providing them independently in the same layer, there is an effect of preventing malfunctions of the integrated circuit due to ground current.

[発明の効果] 本発明によればアース電流によって発生する磁界の影響
を減少させることができ、アース電流によるジョセフソ
ン素子の誤動作を防止し、集積回路の信頼性を向上する
効果がある。
[Effects of the Invention] According to the present invention, it is possible to reduce the influence of a magnetic field generated by a ground current, prevent a Josephson element from malfunctioning due to a ground current, and improve the reliability of an integrated circuit.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の集積回路の平面図、第2.第3゜第4図
はそれぞれ本発明による集積回路チップの異なる実施例
を示す。 101.201,301,401・・・ジョセフソン集
積回路チップ、203〜206,308〜311.40
9〜412・・・ジョセフソン集積回路、208.40
6・・・アース端子、207,303゜404・・・シ
ールド板、207,305,403・・・アース線。 特許出願人 工業技術院長川田裕部 磨 ITA /〃 覇 2 凋 t’(l) (z) 宴 3 図 (+2.2 場 4 l (6)
FIG. 1 is a plan view of a conventional integrated circuit, and FIG. 3 and 4 each show a different embodiment of an integrated circuit chip according to the invention. 101.201, 301, 401... Josephson integrated circuit chip, 203-206, 308-311.40
9-412...Josephson integrated circuit, 208.40
6... Earth terminal, 207,303°404... Shield plate, 207,305,403... Earth wire. Patent applicant Hirobe Kawata, Director of the Agency of Industrial Science and Technology

Claims (1)

【特許請求の範囲】 1、基板上にはジョセフソン集積回路を設け、該基板下
層には超伝導体で形成された外部磁気シールド用のグラ
ンドプレーンを有するものにおいて、該集積回路のアー
ス端子に接続したアース線を設け、該グランドプレーン
を該アース端子と絶縁して配置したことを特徴とするジ
ョセフソン集積回路の構造。 2、第1項において、前記シールド板の下方に絶縁層を
介して前記アース線を設け、前記集積回路のアース端子
の下部にあるシールド板に開口部を設け、該開口部を介
して該アース端子と該アース線とを接続したことを特徴
とするジョセフソン集積回路の構造。 3、第1項において、前記アース線と前記シールド板は
、基板に形成された超伝導体の膜をエツチングにより分
断することにより構成されていることを特徴とするジョ
セフソン集積回路の構造。
[Claims] 1. A Josephson integrated circuit is provided on a substrate, and a ground plane for external magnetic shielding formed of a superconductor is provided on the lower layer of the substrate, in which a grounding terminal of the integrated circuit is provided. A structure of a Josephson integrated circuit, characterized in that a connected ground wire is provided, and the ground plane is arranged insulated from the ground terminal. 2. In item 1, the ground wire is provided below the shield plate via an insulating layer, an opening is provided in the shield plate below the ground terminal of the integrated circuit, and the ground wire is connected to the ground through the opening. A structure of a Josephson integrated circuit characterized in that a terminal and the ground wire are connected. 3. The structure of the Josephson integrated circuit according to item 1, wherein the ground wire and the shield plate are constructed by dividing a superconductor film formed on the substrate by etching.
JP59053609A 1984-03-22 1984-03-22 Structure of josephson ic Granted JPS60198788A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59053609A JPS60198788A (en) 1984-03-22 1984-03-22 Structure of josephson ic

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59053609A JPS60198788A (en) 1984-03-22 1984-03-22 Structure of josephson ic

Publications (2)

Publication Number Publication Date
JPS60198788A true JPS60198788A (en) 1985-10-08
JPH025018B2 JPH025018B2 (en) 1990-01-31

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP59053609A Granted JPS60198788A (en) 1984-03-22 1984-03-22 Structure of josephson ic

Country Status (1)

Country Link
JP (1) JPS60198788A (en)

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Publication number Priority date Publication date Assignee Title
JP6010005B2 (en) 2013-09-09 2016-10-19 株式会社東芝 Semiconductor device and manufacturing method thereof
JP6074345B2 (en) 2013-09-24 2017-02-01 株式会社東芝 Semiconductor device and manufacturing method thereof

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5889878A (en) * 1981-11-21 1983-05-28 Nippon Telegr & Teleph Corp <Ntt> Superconductive circuit device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5889878A (en) * 1981-11-21 1983-05-28 Nippon Telegr & Teleph Corp <Ntt> Superconductive circuit device

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