JPS60196955A - Manufacture of dielectric isolation plate - Google Patents
Manufacture of dielectric isolation plateInfo
- Publication number
- JPS60196955A JPS60196955A JP5327884A JP5327884A JPS60196955A JP S60196955 A JPS60196955 A JP S60196955A JP 5327884 A JP5327884 A JP 5327884A JP 5327884 A JP5327884 A JP 5327884A JP S60196955 A JPS60196955 A JP S60196955A
- Authority
- JP
- Japan
- Prior art keywords
- silicon layer
- porous silicon
- current density
- porous
- hole diameter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の一技術分野〕
本発明は複数の単結晶シリコンの島の側面及び底面が二
酸化シリコンの絶縁層で囲まれた半導体集積回路用の誘
電体分離基板の製造方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention provides a method for manufacturing a dielectric isolation substrate for a semiconductor integrated circuit in which the side and bottom surfaces of a plurality of single-crystal silicon islands are surrounded by an insulating layer of silicon dioxide. It is related to.
半導体集積回路装置における集積度の向上、特性の改善
を目的として誘電体分離技術の利用が考えられている。The use of dielectric isolation technology is being considered for the purpose of increasing the degree of integration and improving the characteristics of semiconductor integrated circuit devices.
これは、単結晶シリコンの島の周囲及び底面を二酸化シ
リコン層で囲んで完全に分離しようとするものである。This is intended to completely isolate the periphery and bottom of a single-crystal silicon island by surrounding it with a silicon dioxide layer.
この誘電体分離にも種々のタイプがあるが、最近注目さ
れているのは多孔質シリコンを酸化することによって二
酸化シリコンの誘電体分離領域を形成する方法によるも
のである。多孔質シリコンは単結晶シリコン基板をフッ
化水素溶液中で陽極化成処理して形成している。There are various types of dielectric isolation, but one that has recently attracted attention is a method in which a dielectric isolation region of silicon dioxide is formed by oxidizing porous silicon. Porous silicon is formed by anodizing a single crystal silicon substrate in a hydrogen fluoride solution.
本発明は上記のような誘電体分離基板の製造方法に係る
もので、陽極化成処理による多孔質シリコン層の形成方
法に特徴を有するものである。The present invention relates to a method of manufacturing a dielectric isolation substrate as described above, and is characterized by a method of forming a porous silicon layer by anodization treatment.
本発明の前提となる多孔質シリコンの酸化による誘電体
分離基板の製造方法の一般例について第1図に従って説
明する。第1図は誘電体分離基板の製造方法を示す正面
断面図である。A general example of a method for manufacturing a dielectric isolation substrate by oxidizing porous silicon, which is the premise of the present invention, will be described with reference to FIG. FIG. 1 is a front sectional view showing a method of manufacturing a dielectric isolation substrate.
P型の昨結晶シリコン基板10を用意する( A)。A P-type pre-crystalline silicon substrate 10 is prepared (A).
この単結晶シリコン差板10をフッ化水素溶液中で陽極
化成処理して表面に多孔質シリコンNllを形成する(
B)。この多孔質シリコン層110表面にNmの単結晶
シリコン層12をエピタキシアル成長させる(C)。単
結晶シリコン層12の一部にP型の領域13を拡散まだ
はイオン打ち込み等によって形成する(D)。このP型
の領域13を陽極化成処理によって多孔質シリコン14
に代える(E)。単結晶シリコン基板10に形成された
多孔質シリコン層11とエピタキシアル層12内に形成
された多孔質シリコン領域14を酸化シリコン15とす
るCF)。このようにして、二酸化シリコン15によっ
て囲まれた単結晶シリコンの島16が形成された誘電体
分離基板が得られる。This single crystal silicon differential plate 10 is anodized in a hydrogen fluoride solution to form porous silicon Nll on the surface (
B). A Nm single crystal silicon layer 12 is epitaxially grown on the surface of this porous silicon layer 110 (C). A P-type region 13 is formed in a part of the single crystal silicon layer 12 by diffusion or ion implantation (D). This P-type region 13 is anodized to form a porous silicon 14.
(E). CF) in which a porous silicon layer 11 formed in a single crystal silicon substrate 10 and a porous silicon region 14 formed in an epitaxial layer 12 are silicon oxide 15. In this way, a dielectric isolation substrate is obtained in which islands 16 of single crystal silicon surrounded by silicon dioxide 15 are formed.
上記のような誘電体分離基板の製造方法においては、多
孔質シリコン層の上に単結晶シリコン層をエピタキシア
ル成長させている。多孔質シリコンは文字通シ結晶内に
多数の孔が形成されておシ。In the method for manufacturing a dielectric isolation substrate as described above, a single crystal silicon layer is epitaxially grown on a porous silicon layer. Porous silicon literally has many pores formed within its crystal.
これを模式的に表わすと第2図のようになる。すなわち
、基板20内に孔21が形成された構造となっている。This can be schematically represented as shown in Figure 2. That is, the structure is such that a hole 21 is formed within the substrate 20.
この孔の径が大き過ぎたシ、密度が多過ぎると多孔質シ
リコン層の上に形成される単結晶シリコン層の結晶性が
劣化する。故にエピタキシアル層の厚みが薄い場合には
結晶性が大幅に劣化するので、結晶性を良くするために
はエピタキシアル層の厚みを厚くしなければならない。If the diameter of the pores is too large or the density is too high, the crystallinity of the single crystal silicon layer formed on the porous silicon layer will deteriorate. Therefore, if the thickness of the epitaxial layer is small, the crystallinity will be significantly degraded, so in order to improve the crystallinity, the thickness of the epitaxial layer must be increased.
本発明は上記のような問題を解決して多孔質シリコンノ
ーの上に結晶性の良好な単結晶シリコン層をエピタキシ
アル成長させることのできる誘電体分離基板の製造方法
を提供することを目的とする。An object of the present invention is to provide a method for manufacturing a dielectric isolation substrate that can solve the above problems and epitaxially grow a single crystal silicon layer with good crystallinity on a porous silicon layer. do.
また、結晶性を改善するだけでなく酸化を容易にして短
時間に二酸化シリコン領域を形成できるような多孔質シ
リコン層を形成することを目的とする。Another object of the present invention is to form a porous silicon layer that not only improves crystallinity but also facilitates oxidation so that a silicon dioxide region can be formed in a short time.
本発明は、単結晶シリコン基板内に形成する多孔質シリ
コン層を二層hL、表面を孔径の小さな多孔質シリコン
層とし、基板の内部は孔径の大きな多孔質シリコン層と
することによって上記の目的を達成するものである。The present invention achieves the above object by forming a porous silicon layer formed in a single crystal silicon substrate in two layers hL, with a porous silicon layer with a small pore diameter on the surface and a porous silicon layer with a large pore diameter inside the substrate. The goal is to achieve the following.
これによって、表面に形成されるエピタキシアルシリコ
ン層は結晶性が良好となシ、内部は孔径が大きくなって
酸化し易くなるものである。As a result, the epitaxial silicon layer formed on the surface has good crystallinity, but the inside has a large pore diameter and is easily oxidized.
多孔質シリコン層の孔径な変える手段としては、陽極化
成中に多孔質シリコン層に印加する電流密度を変化させ
る。変化は複数回行うことができるが、実用的には二層
で充分で、始めは微小電流密度を、後にはやや大きい電
流密度を印加する。As a means of changing the pore diameter of the porous silicon layer, the current density applied to the porous silicon layer during anodization is changed. The change can be made multiple times, but for practical purposes, two layers are sufficient, and a small current density is applied at first, and a slightly larger current density is applied later.
以下、多孔質シリコン層の形成方法を中心として本発明
の実施列について説明する。Hereinafter, embodiments of the present invention will be described with a focus on the method of forming a porous silicon layer.
陽極化成処理は、前記のように、フッ化水素溶液中で基
板の裏面の電極とフッ化水素溶液中の電極との間に電流
を印加して行う。この陽極化成処理は、一般には30〜
50%の溶液中で5〜100rnA/cm’の電流密度
で行われている。As described above, the anodization treatment is performed in a hydrogen fluoride solution by applying a current between the electrode on the back surface of the substrate and the electrode in the hydrogen fluoride solution. This anodizing treatment is generally performed for 30~
It has been carried out in a 50% solution at a current density of 5-100 rnA/cm'.
本発明は、陽極化成処理の条件における電流密度が多孔
質シリコンの性質を左右する点に注目してなされたもの
で、電流密度を変化させることによって多孔質シリコン
層を二層に形成するものである。The present invention was made by focusing on the fact that the current density under the conditions of anodizing treatment influences the properties of porous silicon, and it forms a two-layer porous silicon layer by changing the current density. be.
本発明の実施例では、50%のフッ化水素溶液中で、5
μmの単結晶シリコンを多孔質化した。In an embodiment of the invention, in a 50% hydrogen fluoride solution, 5
Single crystal silicon of μm size was made porous.
この際は表面の0.5μmの部分でId 5 mA/C
W?の電流密度で陽極化成処理し、残シの4.5μmは
100mA/c−の電流密度で陽極化成処理をした。こ
の結果できた二つの多孔質シリコンは性質が異なシ。In this case, Id 5 mA/C at a 0.5 μm portion of the surface.
W? The remaining 4.5 μm was anodized at a current density of 100 mA/c-. The two resulting porous silicones have different properties.
表面の電流密度の小さな条件で陽極化成処理した部分で
は孔径が小さくなっておシ、内部の電流密度の大きな条
件で陽極化成処理した部分では孔径が大きくなっていた
。第3図第4図はこれを模式的に示した図である。The pore diameter was small in the part anodized with a low current density on the surface, and large in the part anodized with a high internal current density. 3 and 4 are diagrams schematically showing this.
なお、上記のようにして形成された二つの多孔−質シリ
コン層を後や工程において酸化したところ。Note that the two porous silicon layers formed as described above were oxidized later or in the process.
酸化膜の性質が若干異なっていることが確認された。It was confirmed that the properties of the oxide films were slightly different.
本発明では、前記のように孔径の小さな多孔質シリコン
層と孔径の大きな多孔質シリコン層を形成しているので
1表面に形成される単結晶シリコン層の結晶性が改善さ
れるとともに、絶縁層を形成するための酸化が容、易と
なる。In the present invention, since a porous silicon layer with a small pore diameter and a porous silicon layer with a large pore diameter are formed as described above, the crystallinity of the single crystal silicon layer formed on one surface is improved, and the insulating layer It becomes easier to oxidize to form.
また、酸化後の反りが小さくなることが確認された。前
記の実施列で950℃、1時間の酸化で得られた基板(
20X 20 am )の反シは32μmとなっておシ
、同じ電流密度で陽極化成処理したものよシ反シが小さ
くなっていた。It was also confirmed that the warpage after oxidation was reduced. The substrate obtained by oxidation at 950° C. for 1 hour in the above-mentioned series (
20×20 am) was 32 μm, which was smaller than that of the one subjected to anodization treatment at the same current density.
第1図は誘電体分離基板の製造方法を示す正面特許出願
人
東光株式会社
第1図
第 2 図 21
第 3 図
第 4 図
手続補正書
昭和59年5月4日
寵
特許庁長官 若杉和夫殿
事件の表示
昭和59年特許願第53278号
2、発明の名称
誘電体分離基板の製造方法
3、補正をする者
事件との関係 特許出願人
主訴(8145) 東京都大田区東雪谷2丁目1番17
号4゜
5、補正により増JJuする発明の数 O補正の対象
明細書の発明の詳細な説明の憫
補正の内容
1)明細書第4頁第6行の「の上に」を「と接正します
。
(3)同第4頁第8行の「結晶性が大幅に」を「全層に
わたって結晶性が」と訂正しまず。Figure 1 shows a front view showing the manufacturing method of a dielectric isolation substrate Patent applicant: Toko Co., Ltd. Figure 1 Figure 2 Figure 21 Figure 3 Figure 4 Procedural amendment May 4, 1981 Mr. Kazuo Wakasugi, Commissioner of the Patent Office Display of case 1982 Patent Application No. 53278 2 Name of invention Method for manufacturing dielectric isolation substrate 3 Person making amendment Relationship to case Patent applicant Main lawsuit (8145) 2-1-17 Higashiyukidani, Ota-ku, Tokyo
No. 4゜5, Number of inventions increased by amendment O Contents of the amendment to the detailed description of the invention in the specification subject to amendment 1) In the 6th line of page 4 of the specification, ``above'' has been replaced with ``. (3) On page 4, line 8, correct "crystallinity is significant" to "crystallinity throughout the entire layer."
Claims (1)
極化成処理して多孔質化シリコン層を形成し、該多孔質
シリコン層の表面に単結晶シリコン層をエピタキシアル
成長させ、該単結晶シリコン層の一部を二酸化シリコン
とするとともに該多孔質シリコン層を酸化することによ
って、単結晶シリコンの島の周囲及び底面に二酸化シリ
コン領域を形成する誘電体分離基板の製造方法において
。 該多孔質シリコン層の表面付近の孔径を小さくし、内部
の孔径を大きくするように陽極化成処理し、該孔径の小
さな多孔質シリコン層の表面に単結晶7リコン層をエピ
タキシアル成長させることを特徴とする誘電体分離基板
の製造方法。[Claims] °One surface of a single-crystal silicon substrate is anodized in a 7-hydrogen fluoride solution to form a porous silicon layer, and a single-crystal silicon layer is epitaxy on the surface of the porous silicon layer. A dielectric isolation substrate which forms a silicon dioxide region around and on the bottom surface of the single crystal silicon island by growing a part of the single crystal silicon layer into silicon dioxide and oxidizing the porous silicon layer. In the manufacturing method. Anodization treatment is performed to reduce the pore size near the surface of the porous silicon layer and increase the internal pore size, and a single crystal 7 licon layer is epitaxially grown on the surface of the porous silicon layer with the small pore size. A method for manufacturing a dielectric isolation substrate featuring features.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5327884A JPS60196955A (en) | 1984-03-19 | 1984-03-19 | Manufacture of dielectric isolation plate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5327884A JPS60196955A (en) | 1984-03-19 | 1984-03-19 | Manufacture of dielectric isolation plate |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60196955A true JPS60196955A (en) | 1985-10-05 |
Family
ID=12938268
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5327884A Pending JPS60196955A (en) | 1984-03-19 | 1984-03-19 | Manufacture of dielectric isolation plate |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60196955A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0797258A2 (en) | 1996-03-18 | 1997-09-24 | Sony Corporation | Method for making thin film semiconductor, solar cell, and light emitting diode |
US6107213A (en) * | 1996-02-01 | 2000-08-22 | Sony Corporation | Method for making thin film semiconductor |
US6326280B1 (en) | 1995-02-02 | 2001-12-04 | Sony Corporation | Thin film semiconductor and method for making thin film semiconductor |
US7060339B2 (en) | 2002-10-15 | 2006-06-13 | Nitto Denko Corporation | Dicing/die-bonding film, method of fixing chipped work and semiconductor device |
US7148119B1 (en) | 1994-03-10 | 2006-12-12 | Canon Kabushiki Kaisha | Process for production of semiconductor substrate |
-
1984
- 1984-03-19 JP JP5327884A patent/JPS60196955A/en active Pending
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7148119B1 (en) | 1994-03-10 | 2006-12-12 | Canon Kabushiki Kaisha | Process for production of semiconductor substrate |
US6326280B1 (en) | 1995-02-02 | 2001-12-04 | Sony Corporation | Thin film semiconductor and method for making thin film semiconductor |
US6107213A (en) * | 1996-02-01 | 2000-08-22 | Sony Corporation | Method for making thin film semiconductor |
US6194239B1 (en) | 1996-02-01 | 2001-02-27 | Sony Corporation | Method for making thin film semiconductor |
EP0797258A2 (en) | 1996-03-18 | 1997-09-24 | Sony Corporation | Method for making thin film semiconductor, solar cell, and light emitting diode |
EP0797258A3 (en) * | 1996-03-18 | 1999-04-14 | Sony Corporation | Method for making thin film semiconductor, solar cell, and light emitting diode |
US6194245B1 (en) | 1996-03-18 | 2001-02-27 | Sony Corporation | Method for making thin film semiconductor |
US7060339B2 (en) | 2002-10-15 | 2006-06-13 | Nitto Denko Corporation | Dicing/die-bonding film, method of fixing chipped work and semiconductor device |
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