JPS6019324A - Pseudo normal test system for frequency fault detecting circuit - Google Patents

Abstract

PURPOSE:To allow a frequency fault detecting circuit to confirm the normality of an oscillating circuit easily by adding an oscillating frequency fluctuation circuit possible for external control to the oscillating circuit. CONSTITUTION:The oscillating circuit 20 has the oscillating frequency fluctuation circuit 20A in addition to an oscillating circuit element and when a switch SWO is interrupted, an output of the same frequency fo as an input signal frequency fi is generated and transmitted. When the switch SWO is connected by a switch control signal, the oscillating circuit 20 becomes a circuit including a capacitor C2 and generates a signal in frequency fi+DELTAf. The frequency fault detecting circuit 30 compares a difference DELTAf between the said frequency and the input frfequency fi with a standard value fs, and when DELTAf>fs, an alarm ALM is given to a pseudo normality test control cricuit 40 as a value out of the standard value. The capacitor C2 is selected so as to form the relation of DELTAf>fs when the capacitor is inserted to the oscillating circuit 20. Thus, when the switch SWO is turned on from the control circuit 40, if no alarm ALM is obtained, it is discriminated that the detecting circuit 30 is faulty.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention makes the oscillation frequency of an oscillation circuit, such as a phase-lock-loose circuit, into a pseudo abnormal state.

This invention relates to a frequency abnormality detection circuit quasi-normal test method for testing the normality of the frequency abnormality detection circuit for monitoring.

[Background of the invention]

FIG. 1 shows a connection configuration diagram of an example of a conventionally used oscillation circuit and frequency abnormality detection circuit. This is for a phase-locked loose circuit.

Here, the phase difference detection circuit 11 receives an input signal (frequency fi
) and output signals (frequency f, ), the phase error signal is processed by a loop filter to obtain a control signal, and the oscillation frequency and phase of the oscillation circuit 12 are controlled by this signal.

Further, in the single oscillation circuit 12, the oscillator O5C has a characteristic frequency ν
The desired output frequency can be obtained by adjusting the value of the variable capacitor Cr.

The frequency abnormality detection circuit 13 detects a difference Δf=11. between the frequency fi of the input signal and the frequency f of the output signal. The value of -fir is monitored at °C, and if this value is within the range of the standard value Δf, it is not detected as a frequency difference abnormality, and if it exceeds the standard value Δft, it is detected as a frequency difference abnormality and a frequency abnormality alarm is issued.
Send LM.

For example, in a digital exchange, such a frequency abnormality detection circuit 13 plays an important role. That is, when a failure occurs such as a signal disconnection of the input signal or a deviation of the frequency fi from the standard value, the frequency abnormality detection circuit 1 is immediately activated.
3 is activated, not only does it notify the maintenance personnel of this failure, but it also closes off the relevant part and performs a switching operation to a normal device, thereby making it possible to provide stable service.

In the prior art, there was no means to confirm the normality of the one-frequency abnormality detection circuit j813, although it is such an important function. In particular, even if an abnormality occurs in the frequency ft of the input signal,
It is only after discovering that the detection circuit is not operating that it is possible to start troubleshooting. In this case, it takes a considerable amount of time until it is determined that the frequency abnormality detection circuit 13 is the faulty part, and there is a risk that the service will be seriously disrupted during that time.

[Purpose of the invention]

The purpose of the present invention is to solve this problem by testing whether a frequency abnormality detection circuit can detect an oscillation frequency abnormality in an oscillation circuit by making the oscillation frequency of the oscillation circuit into a pseudo abnormal state. An object of the present invention is to provide a pseudo-normal test method for frequency abnormality detection circuits that can be used.

[Summary of the invention]

The configuration of the frequency abnormality detection circuit pseudo-normal test method according to the present invention is such that an oscillation frequency variation circuit that can be controlled from the outside is added to the oscillation circuit that is monitored by the frequency abnormality detection circuit, and this is controlled. Then, a -IN signal having a frequency outside the specified range is generated from the oscillation circuit in a pseudo manner, and a pseudo-normal test is performed to determine whether or not the frequency abnormality detection circuit can detect it.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 2 is a connection configuration diagram of an actual example of an oscillation circuit and a frequency abnormality detection circuit to which the frequency abnormality detection circuit pseudo-normal test method according to the present invention is applied, and FIG. 6 is a flowchart of the pseudo-normal test. .

Here, 10 is 1, for example, a phase difference detection circuit (equivalent to the one in Figure 1) of a phase-locked loop circuit (hereinafter referred to as a PLL circuit), and 2o is an oscillation circuit, which is a normal oscillation circuit. In addition to the elements of 1, for example, capacitors, switches SW.

30 is a frequency V abnormality detection circuit to which an oscillation frequency variation circuit 2OA (FDV) is added.

40' is a pseudo-normal test control circuit.

Oscillation circuit 2 mainly composed of oscillation-7osc
0 is 70PL when switch sro is 0FF (off)
The L function allows the frequency f to be the same as the frequency fi of the input signal.
oc=fi) is sent out as a generation command, and is also input to the phase difference detection circuit 1°.

When the switch SFO is operated and turned ON (closed) by the switch control signal from the pseudo-normal test control circuit 4o, the oscillation circuit 20 becomes a circuit including the capacitor 02, and has a frequency different from the frequency fi (or f, , ). Generates and sends out the number j number ΔftvM@.

The frequency abnormality detection circuit 30 compares whether the difference Δj between the frequency fi + Δf and the input frequency fi is larger than the standard value Δf, and if Δf - Δf, the frequency difference is not detected as being out of the standard value, If Δf>Δf3, it is detected as a deviation from the standard value, and a frequency abnormality alarm ALM is transmitted to the pseudo-normal test control circuit 40.

Here, when the values of the capacitors are inserted into the oscillation circuit 20, the difference Δf between the frequency fi+Δj and the frequency fi of the input signal is set to be larger than the standard value Δj.

Therefore, from the pseudo-normal test control circuit 40 to the switch SW
If O is turned ON and the frequency abnormality detection circuit 30 is normal, a frequency abnormality alarm ALM should be obtained. If the alarm ALM is not obtained, it can be determined that the one frequency abnormality detection circuit 30 is at fault.

FIG. 3 shows the flow of confirming the normality of the frequency abnormality detection circuit 30 described above. Pseudo-normal test control circuit 4
0, if you configure such a pseudo-normal test flow, just add it to a simple PLL circuit (oscillation circuit),
The normality of the frequency abnormality detection circuit 30 can be confirmed.

Note that the pseudo-normal test control circuit 40 can easily perform desired functions under control from a digital exchange controller (CC) or the like.

Next, how much the oscillation frequency of the oscillation circuit 20 changes when capacitors are inserted into the oscillation circuit 20 will be quantitatively explained. .

An equivalent circuit diagram of one embodiment of the oscillation circuit 20 is shown in FIG.

The impedance of this two-terminal network is expressed by the Lagrass relationship Z(s
), it becomes . Here ω. Ha, ω. = 1/Q/';'jlT... is the value determined by (2) and is the natural angular frequency of one oscillator O8C.

If the oscillation angular frequency ω is calculated from the above equation (2) using the resonance condition Z(, tl=0, then t and g are obtained as shown in the following equation.

From this equation (3), it can be seen that if the capacitor C2 to be added is set to an appropriate value, the value of the oscillation frequency of the oscillation circuit 20 will change more than the standard value depending on the presence or absence of the capacitor C2. Therefore, under such conditions, a pseudo-normal test for confirming that the frequency abnormality detection circuit 30 is normal can be easily and reliably performed.

〔Effect of the invention〕

As explained above in detail, according to the present invention -PLL
By simply providing an oscillation frequency varying circuit consisting of, for example, a capacitor or a switch in an oscillation circuit such as a circuit, it becomes possible to easily confirm the normality of the one frequency abnormality detection circuit.

Furthermore, it is possible to perform such a pseudo-normal test in a short period of time to guarantee the operation of the one-frequency abnormality detection circuit.

Therefore, it is possible to maintain stable service, especially in systems that require a pLL oscillation circuit, such as a digital device.

[Brief explanation of drawings]

FIG. 1 is a connection configuration diagram of an example of a conventionally used oscillation circuit and abnormal frequency detection circuit. 2 is a connection configuration diagram of an embodiment of an oscillation circuit and a frequency abnormality detection circuit to which the frequency abnormality detection circuit pseudo-normal test method according to the present invention is applied; FIG. 3 is a flowchart of the pseudo-normal test; The figure is an equivalent circuit diagram of the developed imaging circuit. 10... Phase difference detection circuit 2o... Oscillation circuit 20A
...Oscillation frequency fluctuation circuit 30...Frequency abnormality detection circuit 40...Pseudo-normal test control circuit Patent attorney Akira Takahashi

Claims (1)

[Claims] t. An oscillation frequency variation circuit that can be controlled externally is added to the oscillation circuit that is monitored by the frequency abnormality detection circuit, and this is controlled to pseudo-receive frequencies outside the specified range from the oscillation circuit. A frequency abnormality detection circuit pseudo-normal test method that generates a signal and performs a pseudo-normal test to determine whether the frequency abnormality detection circuit can detect the signal.