JPS60190026A - Frequency synthesizer - Google Patents

Abstract

PURPOSE:To attain stable operation over a wide band even at a high frequency region and also to decrease power consumption by adopting the PLL circuit constitution where outputs of an analog frequency divider and of a loop filter are connected to a control terminal of a frequency divider. CONSTITUTION:A feedback circuit of the analog frequency divider 20 includes a capacitor 35 and a varactor diode 32 and the capacitance is controlled by an output of a loop filter 12. Since the frequency divider 20 takes charges of a high speed operation, a prescaler 21 saves a frequency divider operated at a high speed and having a large power consumption and then the power consumption is decreased. The capacitance value of the diode 32 is changed in response to an output voltage of the loop filter 12 applied to a control circuit 34 in the frequency divider circuit 20 and the capacitance of the feedback circuit is changed. Then the frequency divider band is widened by changing the capacitance of the feedback circuit to be small when the input frequency is high and large when the frequency is low. Thus, broad band and low power consumption are realized by applying an output voltage of the filter 12 to the feedback circuit constituted in this way.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a frequency synthesizer using a phase-locked loop circuit (PLL circuit).

2. Description of the Related Art Conventional Structures and Problems Frequency synthesizers using PLL circuits are widely used as local oscillators for various types of radio equipment, such as car telephones, in order to achieve digital frequency control and high stability.

A conventional frequency synthesizer will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a conventional frequency synthesizer. The output of the voltage controlled oscillator (VCO) 10 is
The signal is divided into two by the distributor 11 into an output terminal 18 and a prescaler 13. A programmable divider 1 divides the VCO output input to the prescaler 13 according to a frequency division control signal applied to the grease scaler 13 and a terminal 17.
The frequency is divided by 6. The output of the programmable divider 15 is input to the phase comparator (PC) 14 together with the output from a reference oscillator 16 such as a temperature compensated crystal oscillator.
A voltage proportional to the phase difference between these two input signals is obtained at the output of PCl4. By the loop filter 12, A
C component is removed and only its DC component is taken out, v
It is added to COlo to control the oscillation frequency. This operation is repeated until the phase difference between the two signals input to the PC disappears, and the oscillation frequency of the VCO is locked to a constant frequency based on the frequency division control signal applied to the terminal 17. In this circuit, as the oscillation frequency increases,
Since the prescaler is required to operate at high speed, it has disadvantages of increasing current consumption and deteriorating operating margin. Therefore, mobile radio etc. low power consumption, high. This may or may not be convenient for equipment that requires stabilization.

Purpose of the Invention The present invention has been made in order to eliminate the conventional firepower as described above, and even in the high frequency region of the GHz band,
An object of the present invention is to provide a frequency synthesizer that operates stably over a wide range, has a simple configuration, and consumes little power.

Structure of the Invention The frequency synthesizer of the present invention includes an analog frequency divider in which a diode or transistor is provided with a feedback circuit consisting of an inductor, a capacitor, and a variable capacity diode, and a control terminal for changing the capacitance value of the variable capacity diode. ,
The above object is achieved by adopting a PLL circuit configuration in which the output of the loop filter is connected to the control terminal of the analog frequency divider.

Description of examples Embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 is a block diagram showing an embodiment of the frequency synthesizer of the present invention. The output of vColo is distributed by distributor 1
1, the signal is divided into two between the output terminal 18 and the analog frequency divider 2o. The analog frequency divider 2° makes it possible to vary the capacitance of the capacitor constituting the feedback circuit in the frequency dividing circuit shown in Japanese Patent Application No. 58-159404 to 159406 filed by the present applicant, and the capacitance can be controlled by the output of the loop filter 12. It has been made possible. In other words, this frequency divider is
It utilizes the parametric operation due to the nonlinearity of the diode capacitance and the jagged operation that sustains it.
It operates with low power consumption even in the high frequency range of the Hz band. Since the analog frequency divider 20 is in charge of high-speed operation, the grease scaler 21 can eliminate the frequency divider that operates at high speed and consumes a large amount of power, so that it is possible to significantly reduce power consumption. Grease output is from terminal 17.
The output from the reference oscillator 16, such as a temperature compensated crystal oscillator, and the output from the reference oscillator 16, such as a temperature compensated crystal oscillator, are
The phase is compared. A loop filter 12 removes an AC component from the PC output, which is proportional to the phase difference between these two signals, and is applied to VCOlo and an analog frequency divider 20. The output voltage of this loop filter is the terminal 17
determined by the divider control signal applied to the VCO
oscillation frequency changes. In addition, the analog frequency divider 2° is
The frequency division band can be widened by changing the capacitance value of the capacitor of the feedback circuit depending on the frequency, such that it is small when the input frequency is high and large when the input frequency is low. Therefore, by adding a variable capacitance element such as a varactor whose capacitance value changes depending on the applied voltage to the feedback circuit and applying the output voltage of the loop filter, a frequency synthesizer with a wide band and low power consumption can be realized.

FIG. 3 shows a first embodiment of an analog frequency divider constituting the frequency synthesizer of the present invention. 31)
32 is a frequency division output terminal, 33 is a power supply terminal, and 34 is a control terminal. The signal input terminal 31 is connected to the output of the distributor 11 shown in FIG. 2, the frequency division output terminal 32 is connected to the grease scaler 21 shown in FIG. 2, and the control terminal 34 is connected to the output of the loop filter 12 shown in FIG. be done. A feedback circuit consisting of an inductor L31, a capacitor C35, and a diode D32 is added between the anode and cathode of the diode D31 to form the core of the frequency divider.

C31 and C32 are capacitors for the DC block, C33 and C34 are high frequency bypass capacitors, and R31 to R33 are resistors for bias voltage supply. R34r is a resistor that supplies the output voltage of the loop filter to the diode D32.

The capacitance value of the diode D32 changes depending on the loop filter output voltage applied to the control terminal 34, and the fixed capacitance C3
The capacitance of the feedback circuit, which is the combined capacitance with 5, changes. Diode D32 is used when a wide frequency division band is required.
When a diode with a large capacitance change ratio such as a varactor does not require a wide band, a Schottky junction or PN junction diode may be used. In this way, by adding a variable capacitance element such as a varactor to the feedback circuit of the frequency divider and controlling it with the output voltage of the loop filter, it is possible to realize a frequency synthesizer with low power consumption that operates stably over a wide band.

FIG. 4 shows a second embodiment of an analog frequency divider constituting the frequency synthesizer of the present invention. 41 is a signal input terminal, 42 is a frequency division output terminal, 43 is a power supply terminal,
44 is a control terminal. How to connect each terminal is as follows.
This is the same as in the case of FIG. Diode D41 has a feedback l111 path consisting of inductor L41, capacitors C45 and C46, and diode D42, and a bias voltage is applied through R43. C41 and C42 are capacitors for the DC block, C43 and C44 are capacitors for high frequency bypass, and R44 is a resistor for supplying the output voltage of the loop filter to the diode D42.

L42 is a choke coil for the frequency divided output.

In this embodiment, the bias circuit is simplified. In this embodiment, the capacitance of the feedback circuit is constructed using junction capacitances of C46, C46, and D42. In order to adjust the capacitance value change of the feedback I11 path with respect to the output voltage of the loop filter, it is possible to use either a series capacitor as in the embodiment shown in FIG. 3 or a differential capacitor as in this embodiment. You can.

FIG. 5 shows a third embodiment of an analog frequency divider constituting the frequency synthesizer of the present invention. This embodiment is an example in which a frequency dividing circuit is inserted in parallel to the signal line. 61 is a signal input terminal, 52 is a frequency division output terminal, 5
3 is a power supply terminal, and 54 is a control terminal. The method of connecting each terminal is the same as in the case of FIG. The diode D51 has a circuit consisting of an inductor L51, a capacitor C65, and a diode D52 in parallel, its cathode is grounded, and its anode is connected through a bias resistor R53.
A bias voltage is supplied.

C51 and C52 are capacitors for the DC block, C53 and C64 are capacitors for high frequency bypass, and R54 is a resistor for supplying the output voltage of the loop filter to the diode D52. In this embodiment, since the diode is inserted in parallel to the signal line, there is no directionality of input/output, and input/output can be interchanged.

As described above, in the analog frequency divider constituting the frequency synthesizer of the present invention, it is possible to perform frequency division over a wide band both when diodes are installed in series with the signal line and when they are installed in parallel.

FIG. 6 shows a fourth embodiment of an analog frequency divider constituting the frequency synthesizer "9-izer" of the present invention. This embodiment is an example of an analog frequency divider using transistors. 61 is a high frequency input terminal, 62 is a frequency divided output terminal,
63 is a power supply terminal, and 64 is a control φ1j terminal. An inductor L61 is connected between the base and collector of the transistor TRe1.
, a capacitor C66, and a diode D61 are provided to form a frequency dividing circuit. C61 and C62 are capacitors for the DC block, 063 to Cets are capacitors for high frequency bypass, R61 to R64 are bias resistors for biasing the transistors, and R66 is a resistor for supplying the output voltage of the loop filter to the diode D61. This example uses a diode between the base and collector of a transistor, and has the same frequency division characteristics as when using a diode. 4) It will be done.

FIG. 7 shows a fifth embodiment of an analog frequency divider constituting the frequency synthesizer of the present invention. 71 is a signal input terminal, 72 is a frequency division output terminal, and 73 is a power supply terminal. The method of connecting each terminal is the same as in the case of FIG. A feedback circuit consisting of an inductor L71, a capacitor C76, and a diode D71 is provided between the base and emitter of the transistor TR71.0C71 and C72 forming a frequency dividing circuit are for the DC block, and C73 to C76 are for the DC block.
is a high frequency bypass capacitor, R71 to R74 are bias resistors that bias the transistor, R75id,
This is a resistor that supplies the output type filter of the loop filter to the diode D71. This example uses a diode between the base and emitter of a transistor.
A frequency division characteristic similar to that of a station using a diode can be obtained.Although an example of an NPN transistor is shown in this embodiment, a PNP transistor may also be used.

In this way, similar characteristics can be obtained whether the analog frequency divider uses diodes or transistors.

Note that the analog frequency divider embodiments shown so far are examples of % frequency dividers, but it is not obvious that this can be connected in an N-stage cascade and used as a (%)N frequency divider. .

Effects of the Invention As described in Section 2, in the present invention, inductors, capacitors, variable capacitors, ff, ) are added to diodes or transistors.
A PLL circuit configuration is adopted in which a feedback circuit consisting of a diode, an analog frequency divider provided with a control terminal for changing the capacitance ak value of the variable capacitance diode, and an output of a loop filter are connected to the control terminal of the analog frequency divider. By this, G
Even in the high frequency region of the Hz band, it is possible to realize a frequency synthesizer that has a simple configuration, consumes little power, and operates stably over a wide band/ζ, and its industrial cost is very high.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a conventional frequency synthesizer, FIG. 2 is a block diagram showing an embodiment of the frequency synthesizer of the present invention, and FIG. 3 is a block diagram of an analog frequency divider constituting the frequency synthesizer of the present invention. A circuit diagram showing the first embodiment, and FIGS. 4 to 7 are circuit diagrams showing other embodiments of the analog frequency divider constituting the frequency synthesizer of the present invention. 10... Voltage controlled oscillator, 11... Divider, 12... Loop filter, 13.21.
... Grease scaler, 14 ... Phase comparator, 15 ... Programmable divider, 16 ...
...Reference oscillator, 17... Frequency division control signal terminal, 18... - Output terminal, 2o... Analog frequency divider, 31.41.51.61 .71...
...Signal input terminal, 32, 42, 52, 62,
72... Frequency division output terminal, 33, 43, s3
．． 63.73...Power terminal, 34.44.54
．． 64.74...Control terminal, TR51, TR7
1...Transistor, D31-D32, D41
~D42, D51~D52, D61, D71・old...diode, L31°L41, Ltsl, L61. L7
1...Mountain inductor, L42...Chickoku coil, C31-C35, C41-C46, C6-1-C
65, C61-C66, C71-C76...Capacitor, R31-R34, R43-R44, R63-R
54, R61~Rcss, R71~R76...
resistance. Name of agent: Patent attorney Toshio Nakao Nika No. 1
1 Figure 3 @ 4 Figure 7

Claims (4)

[Claims] (1) A voltage controlled oscillator that oscillates at a frequency corresponding to the input voltage, an analog frequency divider with a control terminal that divides the output of this oscillator, and a frequency divider that further divides the output of this analog frequency divider. , a phase comparator that compares this output with the output from a highly stable reference oscillator and generates an output proportional to the phase difference, and a loop filter that removes AC components from the phase comparator output. , a frequency synthesizer characterized in that all outputs of the loop filter are connected to control terminals of the voltage controlled oscillator and the analog frequency divider. (2) As an analog frequency divider with a control terminal, a feedback circuit consisting of a diode, an inductor, a capacitor, and a variable capacitance diode added in parallel with the diode, and an output from the loop filter to be applied to the variable capacitance diode. 2. The frequency synthesizer according to claim 1, further comprising a frequency divider having a control terminal for biasing the diode and a bias circuit for biasing the diode. (3) An analog frequency divider with a control terminal includes a feedback circuit consisting of a transistor, an inductor, a capacitor, and a variable capacitance diode added between the base and collector of the transistor, and an output from the loop filter to the variable capacitance diode. 2. The frequency synthesizer according to claim 1, further comprising a frequency divider having a control terminal for applying voltage and a bias circuit for biasing said transistor. (4) An analog frequency divider with a control terminal includes a feedback circuit consisting of a transistor, an inductor, a capacitor, and a variable capacitance diode added between the base and emitter of the transistor, and an output from a loop filter to the variable capacitance diode. 2. The frequency synthesizer according to claim 1, further comprising a frequency divider having a control terminal for applying voltage and a bias circuit for biasing said transistor.