JPH0479176B2 - - Google Patents

Description

[Detailed Description of the Invention] Industrial Application Field The present invention relates to a phase-locked loop circuit (hereinafter referred to as PLL).
This invention relates to a frequency synthesizer using a frequency synthesizer (abbreviated as "circuit").

Conventional configurations and their problems Frequency synthesizers using PLL circuits are widely used as local sources for various radio devices such as car phones and tuners to achieve digital frequency control and high stability. .

A conventional frequency synthesizer will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a conventional frequency synthesizer. Voltage controlled oscillator (hereinafter referred to as
The output of the VCO (abbreviated as VCO) 10 is divided into two by a distributor 11 into an output terminal 18 and a prescaler 13. VCO10 input to prescaler 13
The output of is divided by a prescaler 13 and a programmable divider 15 which divides the frequency according to a frequency division control signal applied to a terminal 17. The output of the programmable divider 15 is input to a phase comparator (hereinafter abbreviated as PC) 14 together with the output from a reference oscillator 16 such as a temperature-compensated crystal oscillator, and the output of the PC 14 contains the phase comparator (PC) 14. A voltage proportional to the phase difference can be obtained. The loop filter 12 removes the alternating current (AC) component and extracts only the DC component.
is added to control the oscillation frequency. This operation is repeated until the phase difference between the two signals input to the PC 14 disappears, and the oscillation frequency of the VCO 10 is locked to a constant frequency based on the frequency division control signal applied to the terminal 17.

However, with the above configuration, as the oscillation frequency increases, the prescaler 13 is required to operate at high speed, which has the drawback of increasing current consumption and deteriorating operating margin. Therefore, it is inconvenient for use in equipment that requires low power consumption.

Purpose of the Invention The present invention has been made to eliminate the above-mentioned conventional drawbacks, and provides a frequency synthesizer with a simple configuration and low power consumption that operates over a wide band even in the high frequency region of the GHz band. The purpose is to provide

Structure of the Invention The frequency synthesizer of the present invention includes an analog frequency divider in which a feedback circuit consisting of a capacitor, an inductor, etc. is added to a diode or a transistor, and the output of the analog frequency divider is inputted, and The above objective is achieved by adopting a PLL circuit configuration that includes a wave device that removes leakage of the oscillation frequency, which is a wave component, and a means for varying the frequency response of this wave device using the output of a loop filter. be.

Description of examples Embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 shows the first frequency synthesizer of the present invention.
FIG. 2 is a block configuration diagram showing an embodiment of the present invention.

The output of the VCO 10 is divided by a divider 11 into an output terminal 18 and an analog frequency divider 20 .
Note that the configuration of this analog frequency divider 20 will be explained in detail later. This analog frequency divider 20 is
It utilizes parametric operation due to the nonlinearity of the capacitance between the terminals of a diode or transistor, and mixer operation to sustain this operation.
It operates with low power consumption even in the high frequency band. In this embodiment, 1/2 frequency division operation is performed. The wave generator 21 receives the input frequency, that is, the VCO
Loop filter 1 is used to remove 10 oscillation frequencies.
The frequency response changes with the second output. The prescaler 22 can eliminate a frequency divider that operates at high speed and consumes a large amount of power, making it possible to significantly reduce power consumption. Prescaler 22
The output is further frequency-divided by a programmable divider 15 that divides the frequency according to a frequency division control signal applied to a terminal 17, and the phase is compared with an output from a reference oscillator 16 such as a temperature-compensated crystal oscillator in a PC 14. Ru. is proportional to the phase difference between these two signals.
From the output of PC14, by loop filter 12
Removes AC components, VCO 10 and wave generator 21
added to. The output voltage of the loop filter 12 is determined by a frequency division control signal applied to the terminal 17, thereby changing the oscillation frequency of the VCO 10. Although the analog frequency divider 20 operates with low power consumption, the input frequency, that is, the oscillation frequency of the VCO 10 leaks. The oscillation band of VCO10 is
For narrow bands, it is sufficient to add a fixed waveform (for example, a low-pass waveform or a bandpass waveform) after the analog frequency divider 20, but for variations over an octave, a fixed waveform , it becomes difficult to remove the input frequency. Therefore, a wave filter whose frequency response changes depending on the output voltage of the loop filter 12 is provided. By attenuating the input frequency in this way,
A frequency synthesizer that is stable over a wide band and consumes little power can be realized.

FIG. 3 shows a first embodiment of an analog frequency divider 20 constituting the frequency synthesizer of the present invention. 31 is a signal input terminal, 32 is a frequency division output terminal, and 33 is a power supply terminal. Signal input terminal 3
1 is connected to the output of the divider 11 shown in FIG. 2, and a frequency division output terminal 32 is connected to the wave generator 21 shown in FIG. 2, respectively. A feedback circuit consisting of an inductor L31 and a capacitor C34 is added between the anode and cathode of the diode D31, forming the heart of the frequency divider. C31 and C32 are for DC block, C33
are capacitors for high frequency bypass, R31 to R3
3 is a resistor for supplying bias voltage.

FIG. 4 shows a second embodiment of an analog frequency divider 20 constituting the frequency synthesizer of the present invention. 41 is a signal input terminal, 42 is a frequency division output terminal, and 43 is a power supply terminal. The method of connecting each terminal is the same as in the case of FIG. Diode D41 has a feedback circuit consisting of inductor L41 and capacitor C44, and a bias voltage is applied through R43. C41, C42 are
C43 is a capacitor for high frequency bypass, and L42 is a choke coil for the divided output. In this embodiment, the bias circuit is simplified. Thus, the frequency division operation is not affected by the bias circuit.

FIG. 5 shows a third embodiment of an analog frequency divider 20 constituting the frequency synthesizer of the present invention. This embodiment is an example in which a frequency dividing circuit is inserted in parallel to the signal line. 51 is a signal input terminal, 52 is a frequency division output terminal, and 53 is a power supply terminal. The method of connecting each terminal is the same as in the case of FIG. The diode D51 has a feedback circuit consisting of an inductor L51 and a capacitor C54, has a cathode grounded, and has a bias voltage supplied to the anode side through a bias resistor R53. C51 and C52 are for DC block, C
53 is a capacitor for high frequency bypass. In this embodiment, since the diode is inserted in parallel to the signal line, there is no directionality of input/output, and input/output may be interchanged. In this way, with the analog frequency divider, frequency division is possible whether the diodes are installed in series with the signal line or in parallel.

FIG. 6 shows a fourth embodiment of an analog frequency divider 20 constituting the frequency synthesizer of the present invention. This embodiment is an example of an analog frequency divider using transistors. 61 is a signal input terminal, 62 is a frequency division output terminal, and 63 is a power supply terminal. The method of connecting each terminal is the same as in the case of FIG. Base of transistor TR61,
Inductor L61 and capacitor C6 between the collectors
A feedback circuit consisting of 5 is provided to form a frequency dividing circuit. C61, C62 are for DC block, C63,
C64 is a capacitor for high frequency bypass, R61
~R64 is a resistor for supplying bias voltage. This embodiment uses a diode between the base and collector of a transistor, and can obtain frequency division characteristics similar to those obtained when a diode is used.

FIG. 7 shows a fifth embodiment of an analog frequency divider 20 constituting the frequency synthesizer of the present invention. 71 is a signal input terminal, 72 is a frequency division output terminal, and 73 is a power supply terminal. The method of connecting each terminal is the same as in the case of FIG. A feedback circuit consisting of an inductor L71 and a capacitor C75 is provided between the base and emitter of the transistor TR71 to form a frequency dividing circuit. C71, C7
2 is a resistor for the DC block, and C73 and C74 are resistors for bias voltage supply. This embodiment uses a diode between the base and emitter of a transistor, and can obtain frequency division characteristics similar to those obtained when a diode is used. In addition, in the example using a transistor, an example was shown in which an NPN transistor was used and a base bleeder type bias was used.
It goes without saying that a PNP type transistor or another bias method may be used.

In this way, similar characteristics can be obtained whether the analog frequency divider 20 uses diodes or transistors.

FIG. 8 shows an embodiment of the wave generator 21 constituting the frequency synthesizer of the present invention. 8
1 and 82 are input/output terminals, and 83 is a control terminal.
The input terminal 81 is connected to the output of the analog frequency divider 20 in FIG. 2, and the output terminal 82 is connected to the prescaler 22.
The control terminal 83 is connected to the output of the loop filter 12,
are connected to each other. The input/output terminals 81 and 82 are
It is coupled to resonators 84 and 85 by tap coupling.
The interstage coupling is also determined by the size of the aperture coupling portion 90, which is controlled by the ground portions 86,87. Resonators 84 and 85 are capacitors C81 and C
82 and a variable capacitance element 87 such as a varactor,
88 forms a resonant circuit. This resonant frequency is controlled by the output voltage of the loop filter 12 applied from the control terminal 83 through the resistors R81 and R82. C83 and C84 are high frequency bypass capacitors. Analog divider 20
operates with low power consumption, but the input frequency leaks to the output side. Therefore, when the frequency division band is a wide band extending over an octave, the highest frequency division frequency of the next stage prescaler is equal to or higher than the lower limit frequency of the frequency division band. Therefore, when frequency-dividing near the lower limit frequency, unless the input frequency component is removed and input to the prescaler, two divisible frequencies will be input, which is inconvenient. In order to avoid this situation, the output voltage of the loop filter 12 is
By constantly adjusting the frequency response of 1 to the divided frequency, the input frequency can be attenuated to a level below the input sensitivity of the prescaler 22.
Therefore, a frequency synthesizer that operates stably over a wide band can be realized. In this embodiment, an example has been described in which the number of stages is two, input/output coupling is tap coupling, and interstage coupling is aperture coupling.
Needless to say, the configuration is not limited to this.

Up to now, we have described an example in which the frequency division number of the analog frequency divider is 1/2, but if this is connected in an N-stage cascade and the frequency is divided by (1/2) ^N , It is only necessary to configure the wave converter 21 to prevent the input frequency from leaking to the analog frequency divider 20 or prescaler 22 at the next stage, and it goes without saying that the present invention is applicable to this case as well.

Effects of the Invention As described above, the present invention provides an analog frequency divider in which a feedback circuit consisting of a capacitor, an inductor, etc. is added to a diode or a transistor, and a frequency divider that removes input frequency leakage from the frequency-divided output. By adopting a PLL circuit configuration that includes a means to vary the frequency response of this waveform generator using the output of a loop filter, the configuration is simple, consumes little power, and is stable over a wide band even in the high frequency region of the GHz band. A frequency synthesizer that operates in this manner can be realized, and its industrial utility value is extremely large.

[Brief explanation of the drawing]

Fig. 1 is a block wiring diagram of a conventional frequency synthesizer, Fig. 2 is a block wiring diagram of a frequency synthesizer according to an embodiment of the present invention, and Fig. 3 is a first implementation of an analog frequency divider constituting the frequency synthesizer. A circuit diagram showing an example, FIGS. 4 to 7 are circuit diagrams showing other embodiments of an analog frequency divider constituting the same frequency synthesizer, and FIG. 8 is an example of a wave divider constituting the same frequency synthesizer. FIG. 10...Voltage controlled oscillator, 11...Distributor, 1
2... Loop filter, 13, 22... Prescaler, 14... Phase comparator, 15... Programmable divider, 16... Reference oscillator, 17... Frequency division number control signal terminal, 18... Output terminal, 20... …
Analog frequency divider, 21... wave generator, 31, 41,
51, 61, 71...Signal input terminal, 32, 4
2, 52, 62, 72... Frequency division output terminal, 33,
43, 53, 63, 73...Power terminal, 81, 8
2...Input/output terminal, 83...Loop filter output application control terminal, 84-85...Resonator, 86-8
7...Earth part, 88-89...Variable capacitance element, 90...Open coupling part, D31, D41, D5
1...Diode, TR61, TR71...Transistor, L31, L41, L51, L61, L
71...Inductor, L42...Chiyoke coil, C31~C34, C41~C44, C51~
C54, C61-C65, C71-C75, C8
1~C84...Capacitor, R31~R33,R
43~R53, R61~R64, R71~R7
4, R81-R82...Resistance.

Claims (1)

[Claims] 1. A voltage controlled oscillator that oscillates a frequency corresponding to an input voltage, an analog frequency divider that divides the output of the voltage controlled oscillator, and an output of the analog frequency divider that is input, A wave generator that removes leakage of the oscillation frequency that is the fundamental wave component of the controlled oscillator, a frequency divider that further divides the output of the wave generator, and an output of the frequency divider and an output from a highly stable reference oscillator. a phase comparator that generates an output proportional to the phase difference; a loop filter that removes an AC component from the output of the phase comparator and outputs it as an input voltage of the voltage controlled oscillator; A frequency synthesizer comprising variable means for varying the frequency response of the wave generator according to an output. 2. The analog frequency divider is characterized in that it comprises a feedback circuit consisting of a diode, a capacitor and an inductor added in parallel to the diode, and a bias circuit that biases the diode. frequency synthesizer. 3. Claims characterized in that the analog frequency divider comprises a transistor, a feedback circuit consisting of a capacitor and an inductor added between the base and collector of the transistor, and a bias circuit that biases the transistor. The frequency synthesizer according to item 1. 4. Claims characterized in that the analog frequency divider includes a feedback circuit consisting of a transistor, a capacitor and an inductor added between the base and emitter of the transistor, and a bias circuit that biases the transistor. The frequency synthesizer according to item 1. 5. The frequency synthesizer according to claim 1, wherein the variable means uses a varactor diode.