JPS60184855A - Thermal head - Google Patents

Abstract

PURPOSE:To improve the reliability by mounting a control circuit involved in a driving circuit for the generation of a recording pulse on a thermal head to be integrated with the driving circuit. CONSTITUTION:Upon the end of transferring image signals (b) for one line, an image signal effective section signal (a) is turned OFF and image signals for one line accumulated in a shift register 25 are fetched into a latch 26 to be memorized. Then, a trigger pulse (e) is outputted from a timing generation circuit 41 to set the output data of an ROM30 on a timer 40. With the falling of the trigger pulse (e), a recording pulse (f) is outputted from the timer 40. While the pulse (f) is being outputted, image signals memorized in the latch 26 are applied to the base of a transistor 28 through an AND gate 27 and a heat generating body 21 is energized corresponding to the black pixel. Thus, as the recording pulse (f) is generated in a thermal head, danger of causing breakage of the thermal head or the like is minimized due to poor contact of a connector 24 or the like.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a thermal head used for thermosensitive recording.

Structure of a conventional example and its problems FIG. 1 is a schematic perspective view of a conventional thermal head. In this figure, 1 is a base material, and 2 is a large number of heating elements arranged in a row on the base material 1. Reference numeral 3 denotes a drive circuit for driving the heating element 2, which is usually composed of a plurality of integrated circuits. The drive circuit 3 and the heating element 2 are wired on the surface of the base material 1. Reference numeral 4 denotes a substrate on the same plane as the base material 1, and the signal line between the drive circuit 3 and the connector 50 is formed on the substrate 4.

FIG. 2 is a schematic circuit diagram showing an example of the circuit configuration of a conventional thermal head having the structure described above. In this figure, 7 to 10 are terminals provided on the connector 5, into which the recording pulse HEBL, latch pulse STB, image signal DATA, and transfer lock CLK are input, respectively. 11 is a shift register, 12 is a latch, 13 is an AND
The gate 14 is a transistor, and the drive circuit 3 is constituted by these.

Explain the operation. The image signal DATA is serially input in synchronization with the transfer lock CLK, and the image signals DA and TA
are sequentially accumulated in the shift register 11. When the image signal for one line is accumulated in the shift register 11, a latch pulse STB is input, and the image signal accumulated in the shift register 11 is taken into the latch 12 and held. After that, the recording pulse HEBL is input to the transistor 14 corresponding to the black pixel of the image signal held in the latch 12.
turns on, and current flows through the heating element 2 connected to that transistor.

Note that one end of the heating element 2 (the upper end in the figure) is connected to an external recording power source, and the other end of the heating element 2 is connected to the corresponding transistor 1.
Connected to 4 collectors. The emitter of transistor 14 is connected to ground.

As described above, the conventional thermal head has the following problems because recording pulses and the like are directly inputted to the drive circuit from the outside.

(1) In order to reduce the recording power supply capacity, when driving heating elements by dividing them into multiple groups, or in order to transfer image signals at high speed, the shift register inside the drive circuit is divided and each shift register is There are cases where image signals are input in parallel. In that case, the number of signal lines for recording pulses, launch pulses, image signals, etc. increases. However, since these signal lines must be drawn out through connectors, an increase in the number of signal lines is naturally limited in terms of connector cost, etc., and as a result, the number of divisions is limited. In addition, the split configuration may differ for each model, and the number of lead lines may not be constant.
A separate interface circuit must be provided.

(2) Recording pulses, etc. that are directly related to driving the heating element are directly input into the drive circuit from the outside via the connector, so there is a possibility that the thermal head may be damaged due to poor connector contact or poor wiring. Highly sexual.

(3) Because the heating element resistance value varies widely between lots, when replacing the head, adjust the recording power supply voltage value or recording pulse width (current application time) externally to the head to keep the recording density constant. I have to aim for it.

OBJECTS OF THE INVENTION An object of the present invention is to provide a thermal head that solves the above-mentioned conventional problems.

Structure of the Invention The present invention aims to achieve the above-mentioned object by mounting a control circuit related to a drive circuit, such as generation of recording pulses, on a thermal head.

Description of examples Embodiments of the present invention will be described below with reference to the drawings.

FIG. 3 is a schematic circuit diagram of a thermal head according to an embodiment of the present invention. In this figure, 21 is a large number of heating elements arranged in one row. 22 is a drive circuit that drives the heating element 21; 23 is a control circuit related to the control circuit 22;

24 is a connector for connection with the outside.

The drive circuit 22 includes a shift register 25 capable of storing image signals for one line, a shift register 26 having the same capacity, and a latch 2.
It consists of an AND gate 27 provided for each bit of 6, and a transistor 28 inserted in series between each heating element 21 and ground. The control circuit 23 includes a switch 29, a ROM 30, a timer 40, and a timing generation circuit 41.

The connector 24 has a terminal 42 to which a recording interval signal a indicating an effective interval of an image signal is input, and a terminal 4 to which an image signal is input.
3, and a terminal 44 to which a transfer port yiC is input. The terminal 42 is the timing generation circuit 41 of the control circuit 23.
The terminal 43 and the terminal 44 are connected to the shift register 25 of the drive circuit 22. The control circuit 23 sends out a launch pulse d to the latch 26 and a recording pulse f to the AND gate 27.

Next, the operation will be explained. FIG. 4 is a timing diagram showing the operation.

The image signal valid period signal a turns on, the transfer of the image signal starts, and the input of the transfer lock C starts. The image signals are transferred to the shift register 25, sequentially taken in by the lock C, and shifted to the right.

When the transfer of the image signal for one line is completed, the image signal valid period signal a is turned off. Then, the latch pulse d is output from the timing generation circuit 41, and the image signal for one line accumulated in the shift register 25 is taken into the latch 26 and stored.

Next, a trigger pulse e is output from the timing generation circuit 41, and the output data of the ROM 30 is set in the timer 40. At the falling edge of this trigger pulse e, the timer 40
A recording pulse f is output from. While this recording pulse f is being output, the image signal stored in the latch 26 is applied to the base of the transistor 28 via the AND gate 27.
The heating element 21 corresponding to the black pixel of the image signal is energized.

The average resistance value of the heating element 21 varies relatively widely depending on the manufacturing lot, so when an image is recorded by applying electricity for a certain period of time, the recording density will vary. Therefore, energizing time data corresponding to a plurality of different average resistance values is stored in the ROM 30, and when a specific average resistance value is specified by the switch 29, the energizing time data most suitable for that average resistance value is stored in the ROM 30. It is now output.

The timer 40 outputs a recording pulse f having a pulse width equal to the energization time indicated by the energization time data output from the ROM 30. Specifically, at the rising edge of the trigger pulse e, the energization time data is entered into an internal counter, and from the falling edge of the trigger pulse e, the recording pulse f is turned on. Start counting down. Then, when the specified energization time has elapsed and the internal counter counts down to zero, the recording pulse f is turned off.

In this way, since the recording pulses are generated inside the thermal head, the risk of damage to the thermal head due to poor connector contact, etc., as with conventional thermal heads where recording pulses are input directly from the outside, is greatly reduced. . In addition, during the manufacturing stage of the thermal head or when installing the head, an appropriate energization time can be set using the switch 29, so unlike conventional thermal heads, when replacing the head, the recording device side does not have to adjust the recording pulse width. The need is gone.

FIG. 6 is a schematic circuit diagram of a thermal head according to another embodiment of the present invention. In this embodiment, the connector 24 has a terminal 46.
Add a part of the input signal of ROM29 to this terminal 4.
The data is configured to be input to the ROM 30 from the outside via 6. Therefore, the recording density can be changed by externally changing the energization time set by the switch 29. Other than this, the embodiment is the same as the embodiment shown in FIG.

FIG. 6 is a schematic circuit diagram of a thermal head according to another embodiment of the present invention. In this embodiment, the control circuit 23 includes a temperature sensor 47 that detects the temperature of the thermal head;
An analog/digital converter 48 is provided to convert the output signal of the temperature sensor 47 into a digital signal, and the output signal is input to the ROM 30. The ROM 30 stores energization time data at various temperatures on the average resistance value side of the heating element, and the energization time corresponding to the resistance value specified by the switch 29 and the temperature detected by the temperature sensor 47. Data is output from ROM30. Therefore, according to this embodiment, it is possible to correct an increase in density due to a rise in temperature of the thermal head. The configuration other than this is the same as the embodiment shown in FIG.

FIG. 7 is a schematic circuit diagram of a thermal head according to another embodiment of the present invention. In this embodiment, an analog/digital converter 49 for converting the power supply voltage applied to the heating element 21 into a digital signal is provided in the control circuit 23, and the output signal of this analog/digital converter 49 is converted into a digital signal.
It is input to M30. The ROM 30 stores energizing time data for each heating element resistance value at different power supply voltage values, and the energizing time data corresponding to the resistance value and power supply voltage value designated by the switch 29 is stored in the ROM 30
is output from. Therefore, according to this embodiment, density unevenness due to fluctuations in power supply voltage is corrected. The configuration other than this is the same as the embodiment shown in FIG.

FIG. 8 is a schematic circuit diagram of a thermal head according to another embodiment of the present invention. In this embodiment, in order to increase the image signal transfer speed, the shutter register 7 inside the drive circuit 22 is divided into 25a and 25b. In addition, in order to reduce the capacity of the recording power source, the heating element 21 is divided into two groups, and in order to drive one group at a time, the AND group (27a) corresponding to the first group and the AND group (27a) corresponding to the second group are used. Ge) 27b, each separate recording pulse i.

j is applied. In accordance with such a configuration change of the drive circuit 22, a drive pulse distribution circuit 51 and an image signal distribution circuit 52 are added to the control circuit 23. Other than this, the embodiment is the same as the embodiment shown in FIG.

Next, the operation will be explained. FIG. 9 is a timing diagram of this embodiment. The image signal d inputted from the outside is inputted to the image signal distribution circuit 52 together with the transfer lock C, and the parallel image signal d
, e, and transferred to the two shift registers 25a and 25b together with a transfer lock f. On the other hand, the image signal valid interval signal a is input to a timing generation circuit 41, and various timing signals are generated by this timing generation circuit.

When the transfer of the image signal is completed, a latch pulse q is output from the timing generation circuit, and the shift registers 2esa and 2
The image signal accumulated in 6b is stored in latch 26.

Next, the trigger pulse h is sent out twice from the timing generation circuit 41 at regular time intervals. The timer 40 outputs a recording pulse having a pulse width indicated by the energization time data input from the ROM 30 every time the trigger pulse h is input. Therefore, two recording pulses are output in sequence, but
The first pulse is outputted from the recording pulse distribution circuit 61 as a recording pulse j, and the second pulse is outputted as a recording pulse i.

During the generation period of recording pulse j, the first group of heating elements 21
AND() 27 to the transistor 28 corresponding to
The image signal stored in the latch 26 is applied through the latch a, and the first group of heating elements 21 is driven. Subsequently, transistors 2 corresponding to the heating elements 21 of the second group
8, an image signal is applied through the AND gate 27b,
The second group of heating elements 21 is driven.

As described above, in this embodiment, the heating elements 21 are divided into two groups and driven, and the shift register in the drive circuit 22 is still divided into two, but since the control circuit 23 is provided,
The lead line of the thermal head is the same as in each of the above embodiments. In other words, it is no longer necessary to prepare different interface circuits outside the thermal head depending on the number of divisions of the heating element and the number of divisions of the shift register, as in the conventional case.

Furthermore, although the heating elements 21 are divided into two groups in this embodiment, they may be divided into three or more groups.

Further, it is easy to modify so that image signal transfer and recording are performed in parallel.

In each of the above embodiments, FROM is used as the ROM 30, and the energization time data is written in accordance with the heating element resistance value of each thermal head during the head manufacturing process, thereby reducing the ROM capacity.
can be omitted. Further, a configuration may be provided in which each of the above embodiments is combined.

FIG. 10 is a schematic perspective view showing an example of the physical structure of a thermal head according to the present invention. In this figure, 61 is a base material, on which a large number of heating elements 21 are arranged in one row. The drive port 822 is wired to the heating element 21 using a signal pattern formed on the base material 61. 6
Reference numeral 4 denotes a substrate that is on the same plane as the heating element 21, and a control circuit 23 (generally configured as a plurality of integrated circuits) is provided on this substrate. Mutual wiring between the connector 24 for external connection, the drive circuit 22, and the control circuit 23 is performed by a signal pattern formed on the substrate 64.

Note that it is also possible to integrate the substrate 64 and the base material 61.

Effects of the Invention According to the present invention, since a control circuit for generating recording pulses etc. is provided on the thermal head, damage to the thermal head due to poor contact of an external connection connector is less likely to occur, and the thermal head is Reliability can be improved, and
As shown in each of the above embodiments, the energization time can be optimized for each individual thermal head by its control circuit, making it unnecessary to adjust the concentration when replacing the head. First, it is possible to standardize the individual external lead-out lines and external signals, and there are no restrictions on the number of divisions of the heating element due to external connection connectors, etc., and many other effects can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a schematic perspective view of a conventional thermal head, FIG. 2 is a schematic circuit diagram showing an example of the circuit configuration of a conventional thermal head, and FIGS. 3 and 4 are a thermal head according to an embodiment of the present invention. Schematic circuit diagram and timing diagram of
FIG. 6 is a schematic circuit diagram of a thermal head according to another embodiment of the present invention, FIG. 6 is a schematic circuit diagram of a thermal head according to another embodiment of the present invention, and FIG. 7 is a schematic circuit diagram of a thermal head according to another embodiment of the present invention. 8 and 9 are a schematic circuit diagram and a timing diagram of a thermal head according to another embodiment of the present invention, respectively, and FIG. 10 shows an example of the physical structure of a thermal head according to the present invention. FIG. 21... Heating element, 22... Drive circuit,
23...Control circuit, 24...Connector, 25.25a. 25b...Shift register, 26...
Lunch, @7, 27 &, 27 b---
AND gate, 28...transistor, 29.
...Switch, 30...ROM, 40...
...Timer, 41...Timing generation circuit,
47...Temperature sensor, 48.49...
Analog/digital converter, 61... recording pulse distribution circuit, 62... image signal distribution circuit. Name of agent: Patent attorney Toshio Nakao and one other person Figure 1 Figure 2 Figure 4 1000-111 "-111 c3 C
1

Claims (1)

[Claims] A plurality of heating elements, a driving circuit that accumulates image signals and drives the heating elements according to the image signals, and a control circuit related to the driving circuit that generates recording pulses for the driving circuit, etc. are integrated. thermal head.