JPS60183766A - Photoelectric conversion device - Google Patents

Abstract

PURPOSE:To realize a photoelectric conversion device, by which a non-destructive reading can be performed, and at the same time, a random access is possible, and moreover, a high resolution can be attained and a high sensitivity can be obtained, by a method wherein the control electrode of the semiconductor transistor is commonly used as a semiconductor layer, which constitutes one end of the photoelectric conversion diode. CONSTITUTION:A p-n photo diode 6 is constituted of an n<+> type polycrystalline silicon layer 3 and a p<+> type polycrystalline silicon layer 5 and a p-channel MOS transistor 7 is constituted of an n<-> type Si substrate 1, an oxide film 2, p<+> type diffusion layers 4 and a gate 3. The gate 3 is commonly used as the n<+> type polycrystalline silicon layer 3. As the n<+> type polycrystalline silicon layer 3 has been formed in a floating state, the electrode charge, which generates by a light 8, is stored in the polycrystalline silicon layer 3. That is, the charge is stored in the gate 3 of the MOS transistor 7. Accordingly, if the voltage Vg of the gate 3 has been set being prescribed properly according to voltage Vb, which is impressed on an electrode B, a source-drain current, which corresponds to the charge being stored in the gate 3 by the light 8, can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a ``1'' conductor photoelectric conversion device,
The present invention relates to an optical conversion device designed for destructive readout and random access.

[Prior Art] In recent years, research on photoelectric conversion devices and conductor imaging devices has been actively conducted, and some of them have begun to be put into practical use. This 1' conductor imaging device is much smaller and lighter than an imaging device using an image pickup tube, is resistant to vibration, and has the advantages of low power consumption. A breakthrough is expected.

Such semiconductor imaging devices are broadly classified into two types: MOS type and CCD type.

The MO3 type imaging device uses the charge generated in each photodiode by incident light to the MO3 connected to each photodiode.
It has a configuration in which charges are accumulated in the main electrode capacitance 11 of the MO3+ transistors, and the accumulated charges are read out each time the MO3+ transistors are sequentially turned on.

On the other hand, a CCD type imaging device forms a potential sliding door in the main MOS capacitor'jt pole, accumulates the charge generated by the input light in this well, and moves the well in i+lri order to store the accumulated charge. 1;) L is out.

However, these conventional conductor imaging devices are far inferior to image pickup tubes in terms of resolution and sensitivity.

First, although the problem of resolution should be solved by increasing the number of pixels, there are certain limitations in imaging devices. In other words, in an attempt to increase the number of pixels per pixel, the planting degree is
'rl, the pixel area becomes smaller, leading to the problem of reduced sensitivity. Therefore, the number of pixels is
The size must be large enough to detect the required minimum light j11, and there is a limit to the degree of integration.

Attempts are being made to solve these problems of securing the required pixel area and achieving high integration using multilayer wiring technology, etc.
I can't complain that it's still not enough.

・Power, sensitivity, i.e. the minimum light jIU detected by the imaging device
is the humanness and If of the signal produced by the input light,
It is determined by the magnitude ratio (S/N ratio) of i'+'.

In the MOS type, there is noise due to mismatching of gate-to-saune capacitance and gate-drain distance:, '
In the case of the type, the main noises are noise due to the output capacity, heating wire 1°f, and noise due to υ transfer loss.

Sensitivity is determined by such miscellaneous 1゛t and the magnitude of the voltage generated by the light, but rviOs type imaging devices with a simple surface structure are more efficient in capturing the required light, and the dynamic range is higher. It has the advantage of being able to take a wide range of

However, as mentioned above, in the MOS type, a wiring capacitor is connected to each photodiode during readout, resulting in an extremely large voltage drop, which requires a highly sensitive sense amplifier. .

However, the MOS type image pickup device has a problem in that low-light photography becomes difficult due to the high density.

The hCCD type image pickup device has a lower separation i'1 than the MOS type, and is capable of low-light photography, but it has the problem of not being able to take pictures due to high integration. There is.

In this way, the conventional ``1'' conductor imaging device has a resolution of 1f (
It was difficult to solve both the problems of sensitivity and sensitivity.

Furthermore, conventional semiconductor imaging devices have the disadvantage that once the stored charges are extracted, the contents are destroyed. That is, since the readout is destructive, a separate charge storage stage must be provided, which complicates the structure and manufacturing process.

Furthermore, while MOS type imaging devices are capable of random access, with CCD type imaging devices, random access is almost impossible, making it impossible to read out a specific part of a pixel, which limits the range of applications. It has the disadvantages of being right.

As described above, the conventional semiconductor imaging device has a further 1υ, and no one has yet been proposed that can meet all the above-mentioned points.

[Eleventh Object of the Invention] The present invention has been made in view of the problems and shortcomings of the prior art, and its purpose is to enable only J1 destructive reading and to enable random access.

Another object of the present invention is to provide a photoelectric conversion device that can achieve higher resolution and higher sensitivity.

[Structure of the Invention] -1. In order to achieve the above objects, the nine-layer conversion device according to the present invention has the following features:
+ sign.

Here, the ``I'' conductor 1/disk may be of any type as long as the flow of current is controlled by the charge of the control electrode, and for example, a transistor with an M or IS structure may be used. In that case, the control electrode No. 11 will be gated.

The photoelectric conversion diode has an electron-11 hole 7 depending on the required light.
, 1 is a V-conductor diode, even if i
, 4',' p n 11 diode. In that case, the structure is such that one of the p-layers (one of the 4n layers) also serves as a layer.

[Embodiments of the Invention] Hereinafter, embodiments of the unreleased 1!11 will be described in detail using the IA side.

FIG. 1 is a cross-sectional view of one embodiment of a photoelectric conversion device according to the present invention, and one pixel is shown.

First, the manufacturing process of this example will be described. In the figure, on an n-5i substrate 1 with an impurity concentration of 1i to 10 cm-',
Melting 1112 with a thickness of lO~1100n by thermal oxidation method etc.
2 is formed. Subsequently, by low pressure CVD method etc., l+
/Size 100~l 000 layer m, sea)・Resistance 10~10
After depositing an n+ polysilicon layer of 0 Ω/gate, a gate 3 with a gate length l~10 pm is formed by photolithography or the like.
form.

Then, using gate 3 as a seed mask, P-type impurity (
Boron':'i) is spread over the entire surface using ions 11: manual method or thermal diffusivity. By this self-line method, the source or F' train can be set to a depth of 100~looOn
m p+ diffusion layers 4 are formed, and the layer 1-1 of the gate 3, which was an n+ polysilicon layer, is converted into a p+ polysilicon layer 5. In this way, a pnJn junction is formed, and the n'' polysilicon layer 3 also serves as the gate 3.

In order to form such a structure, when the n+ polysilicon layer is formed into the oxide film 2-1- by j(f There is a spirit that makes the Xr peak i+ft of the P-type impurity larger than the impurity e degree of the n+ polysilicon layer.

And finally, source electrode 4s, train electrode D, electrode B
This example is completed by vapor-depositing each of them.

FIG. 2 is an equivalent circuit diagram of the embodiment shown in FIG. 1. A pn photodiode 6 is constituted by the n+ polysilicon layer 3 and the p+ polysilicon layer 5, and the n-3i no 1 (
Board 1, Melting III! 2, the p+ diffusion layer 4, and the gate 3 constitute a p-channel MOS transistor 7. The layer 3 also serves as the n+ polysilicon layer 3.

The p′ polysilicon layer 3 is floating, so the charge generated by X8 is n+ polysilicon)
;? It is accumulated in 3. In other words, it is accumulated in the gate 3 of Mos+/Lancy Stuff. Therefore, due to the 11 pressure vb applied to the upper pole B, the heavy pressure V g t of the gate 3
6-If you set it to the appropriate xl/I, the light 8 will make the game i.
The source-to-train current corresponding to the 1L load accumulated in 3 can be calculated as follows.

Based on this idea, the operation of this embodiment will be explained below with reference to FIG. , the drain voltage Vd is Vd<Vs, and if the gate pressure Vg at which the source-drain current begins to flow is the threshold voltage Vt, then Vt
<Vs. Also, Mo3) U7jista7 is vgkuv
Turns ON when t, turns OFF when Vg≧Vt.

FIG. 3(a) is an energy band diagram of the pn photodiode 6 in the illumination operation 11'P. In this case, electrode B
By appropriately determining the voltage vb of the gate 'it! : Set the voltage Vg to slightly L than the threshold voltage Vt and leave it at 1- (hereinafter, this voltage vb of 111r is referred to as the operating voltage), that is, the operating state immediately before the MOS+ transistor 7 turns on. By setting it to , you can set the desired power.

In this state, even if a voltage is applied between the source and the drain only for the read operation 1, no source/1ζ drain current flows.

FIG. 3(b) is an energy band diagram during light irradiation operation.

When the light 8 is irradiated onto the photodiode 6, the electric current f-11:
A hole pair is generated, but the electric current r- is transferred to the n+ polysilicon layer 3.
The holes gradually flow into the p+ polysilicon layer 5. As a result, a photovoltaic force Δ■ corresponding to the light illuminance is generated between both layers, and n+
The potential of the polysilicon layer 3 is lowered by Δ■ compared to J1 Terukawa direction. Therefore, the gate voltage Vg of Mo5t Runsy Stough is lowered by ΔV, and V g
< V t and -) and Mo3+/Ranojinuta 7 is ON
Status! , U';

Therefore, when a voltage is applied between the source and the train during a read operation, a current corresponding to the gate voltage Vg, that is, corresponding to the illuminance of the incident light flows.

FIG. 3(C) is an energy band diagram of beam Arensch 1 blue. The charge accumulated in the n+ polysilicon layer 3 is
To achieve this, the potential of p+ polysilicon layer 5 should be made higher than that of n+ polysilicon layer 3. for example,
n-3i7. By applying a voltage sufficiently higher than the position (reference potential) of plate 1 to electrode B, the radial load on J can be eliminated.
Ru.

Alternatively, a new end r* may be provided in the n+ polysilicon layer 3, and the +IE voltage may be applied to this end r-. in this case,
Providing a new terminal slightly increases the pixel area, but
The voltage required for refresh can be lowered.

As described above, in this embodiment, the charge generated by light is accumulated in the gate 3 of the Mo51 Randistaff, and in order to conduct the MO3+, U〉, and Disterf by changing the gate potential due to the accumulated charge, the accumulated charge itself is Non-destructive readout that can repeatedly perform 5) without being consumed is 1
1 Chono yells.

Furthermore, since the photodiode 6 can be formed extremely small (1 to 10 gm), the pixel area can be significantly reduced compared to the conventional method. Furthermore, since the gate length of the MO5+-rangestaff is short (1 to 107 pm), the contactance of the transistor is also high.

FIG. 4 is a circuit diagram showing an example of an imaging device using the present embodiment described in . However, for convenience of explanation, the number of pixels is set to 2.
Although the number of pixels is assumed to be X2-4, the circuit of the imaging device having the desired number of pixels can be easily fabricated from the circuit diagram of FIG. 4 (71). Note that the pixel E (m, n) in FIG. 4 is similar to the equivalent circuit shown in FIG. 2.

In FIG. 4, pixels E (1, 1) and E (1, 2
) and each B electrode and pixel F, (2, 1) and E (2,
Each B'I'I2 pole of 2) is connected to a bit line 9 and a focus line 10, respectively. One ends of the lines 9 and 10 are connected to the V H terminal via switching transistors 11 and 12, respectively, and the other ends are connected to the S H terminal via switching transistors 13 and 14, respectively. There is. The gate electrodes of switching transistors 11 and 120 are both connected to the CH terminal r-, and the gate electrodes of switching transistors 13 and 14 are connected respectively to the Hl and )I2 terminals of a vertical address decoder (not shown).

Each drain terminal of pixels E (1, l) and E (2,, l) is connected to word line 15, and each drain terminal of pixels E (1, 2) and E (2, 2) is connected to word line 16. It is connected. One end of each of word line 15 and word line 16 is connected to switching transistors F and 1, respectively.
8, and each other end is connected to the input terminal f of the sense amplifier SA via switching transistors 19 and 20.
It is connected to the.

The gate electrodes of the switching I transistors 17 and 18 are both connected to the cv terminal f-, and the gate electrodes of the switching transistors 19 and 2o are connected to the Vl terminal r and the v2 terminal r- of the water 1i address decoder, respectively. has been done.

Note that the VH terminal has a sufficiently high IIE ';' [! : voltage is applied, and an operating voltage is applied to the SH terminal to make the MO5I transistor of each pixel operate.

Next, the operation of the imaging device having such a configuration will be briefly described.

(1) Refresh operation The refresh operation for discharging the charge stored in the n+ polysilicon layer 3 of each pixel is performed by outputting low level and high level to the H1, H2 and CH terminals, respectively, and switching the switching transistors 11 and 12 should be turned on and the switching transistors 13 and 14 should be turned off. Then, the sufficiently high ilE voltage applied to the VH terminal is applied to the B electrode of each pixel, and the accumulated JJIi charge is eliminated for the reason already mentioned.

Furthermore, during the refresh operation, the switching transistors 19 and 20 are OFF, and the switching transistors 17 and 18 are ON, so that the drain terminals of each screen are grounded.

(11) As an example of storage and readout operations, it is assumed that the 1i7j element E (1, 1) is -II and the pre-illuminated pixel E (1, 2) is for light. therefore,
-1;,, charges are accumulated at (1, 2).

Switching transistors 11 and 12, 17 and 18 are OFF, respectively. Therefore, each stroke J,
The drain terminal of switching tracker/disk 19 or 2
It is connected to the input terminal r- of the sense amplifier SA through the terminal 0.

First, a high level is output from the [11 terminal of the direct address decoder, and the switching transistor 13 is turned on.
Then, the operation of the S terminal - ``Ichikawa is the pixel E (1, l)
and E (1, 2) are applied to each B electrode.

During this time, the Vl end r- of the water
1, then the v2 terminal r becomes high level one after another.

When a high level is output to the Vt terminal r, a switch occurs.

The switching transistor 19 becomes Orq, and the pixel E(1,
1) is connected to the sense amplifier SA. (7, 1 stroke, (, TE (1, 1) is not irradiated, so no charge is stored. Therefore, its M O
Although the operating performance of S1/Ranjisk is 4, it is not an ON-state T island, and only +12 k flows into the input terminal r of the sense amplifier SA located on the upper right side of the 19i constant.

h゛, and when \\ere, le is output to the v2 terminal r-, the switching 1/raster 20 turns on, and the drain terminal of the pixel E (L, 2) is connected to the input terminal of the sense amplifier SA. be done. Pixel E (1°2) has accumulated too much charge due to light irradiation, and its MOS transistor is in the ON state. Therefore, at the input terminal of sense amplifier SA,
light! ! 4 (corresponding to degree I- current flows.

Next, the H f level is output from the H2 terminal r- of the vertical address decoder, and the same operation as described above is performed at the pixel E (2, 1
), E (2,2).

In this way, mn-order likelihood information is read out for all pixels E (m, n) and detected by the sense amplifier SA.

Incidentally, although the case of serial access has been described in the operation theory IJJ described in section 1-1, since this embodiment uses a vertical address decoder, random access is possible.

In the case of serial access, the same operation can be performed even if a shift I register is used instead of the address decoder.

Further, as already mentioned, since the charges once implanted by light irradiation are not destroyed unless a refresh operation is performed, there is no need to provide a special storage section.

1. The unissued IJJ is not limited to the one embodiment described above, and includes many modifications.

First, the MIS type I transistor is the p-channel enhancement type MO3 of each pixel used in the I-described embodiment.
4.) Not only with run discs, but also with depletion type. ! , S can be made.

Furthermore, MIS No. 1111: MIS as a run sister
S J (!1 Electrostatic induction transformer (MIS type 5rT)
It is also possible to use transistors that do not exhibit bipolar characteristics such as UF.

MIS (SRR) is expected to widen the range from the unsatisfactory Jll i'l of the radio wave type J+:'I to the wide range.

Also, n-5i), 1. : By using an n-well instead of the board 1, the '5G radiation effect and 1 (li4 radiation effect) of a single circuit can be reduced, making coexistence with other circuits more convenient.

Furthermore, it is also possible to have a structure in which a back gate bias voltage is applied to the plate l or T1-well.By applying the back gate bias voltage, the MIS
+/Threshold I/JL of the transistor serves as the control IR and can be used to change the sensitivity of each pixel, stop the source 1/1/in current, etc.

The photoelectric conversion diode is not limited to the pn photodiode 6 used in this embodiment, but may be a pn diode-IS.

In addition, in this embodiment, the n layer f of pn pot die 6
Are you using it as a gate for MOS l.Landistav?
An inverted one or two layer may be used as a gate. However, in this case, MO3+-Randistav is turned OFF with respect to light irradiation.

j, ta As shown in this example, pn photoda 2-1 and 6 are n-3iJ, (because they do not need to be formed in the plate 1, the selection of I and e1 odors is FI II+ In this example, polysilicon was used, but since polysilicon has a large human cap Z compared to single-crystal silicon, the sensitivity peak of the wavelength of the incident light is shifted to the shorter wavelength side. For this reason, the conventional drawback)υ
There is no decrease in sensitivity on the wavelength side. In this way, pn
By selecting the material of the photodiode, it is possible to set the desired spectral sensitivity.

If the pn photodiode is made of crystalline silicon, the lifetime of the charge accumulated in the gate will be shortened and the sensitivity will be improved. Crystal silicon is SOI technology,
For example, grain growth using various heating methods, SIMOX
It can be formed by etc.

On the other hand, if it is desired to widen the dynamic range at the expense of IW sensitivity, a material with a relatively small ratio of photovoltaic force to 11 and a large contact potential difference may be used.

Further, as shown in this embodiment, since the pn photodiode 6 is provided at the 11th part, the efficiency of taking in light is 1.
'++l<, and the sensitivity is -1-Sl.

Also, when the signal is read at 7 o'clock, the output capacity j11. Because there is no rise in the readout voltage caused by this, a conventional sense amplifier with particularly high sensitivity is not a planet. Therefore, noise caused by the high stiffness sense amplifier is eliminated.

Since the gate 13 of the Mo5t/Langistav can be made as short as the processing technology allows, the funductance of the Mo3t/Langistav can be increased.

[Effects of the Invention] As described above in detail M1 and i4p+L, the light conversion device according to the present invention converts the burden generated by the light into the transistor 'bll'.
(By accumulating in 2TJ electrode, non-destructive readout is 11
This eliminates the need for a separate charge storage section, and the pixel area is determined by the area of the pole. Therefore, it is possible to cope with the 1-1 direction of the number of pixels, that is, high integration.

In addition, since the control electrode can be formed finely, the transistor has high contactance and a wide dynamic range.

Furthermore, control 'ltj: Since the potential of the pole can be determined appropriately, the sense of conduction of the transistor is 1! ! L can be set freely and the sensitivity of the imaging device can be adjusted.

Also, this is a J1 destructive read. Firstly, since the random access ability is numerous, it can be effectively applied to, for example, an autofocus mechanism of a camera, a center-weighted metering mechanism, and an automatic tracking device 4^1T.

[Brief explanation of the drawing]

Figure 1 shows 1 unreleased! Light '1 due to II [cross-sectional view of one pixel of the embodiment of the conversion device, Fig. 2 is an equivalent circuit diagram of one pixel J9 in Fig. 1, Fig. 3 (a) to c)
4 is an energy band diagram of pn photo-dye stain F, and FIG. 4 is a circuit diagram of an example of an imaging device constructed using this embodiment. 1.--n-Si substrate, 2.-melted film, 3. fist-n+
Polysilicon layer (gate), 5--p+ polysilicon layer 1st Figure 3 Figure 4 A

Claims (2)

[Claims] (1) ``f, an optical conversion device characterized in that the control electrode of the conductive transistor is a semiconductor layer at one end of a photoelectric conversion diode. (2) -1: The photoelectric conversion device according to the first sn, characterized in that the soil conductor transistor is a transistor with an MIS structure.