JPS60181980A - トランジスタ回路 - Google Patents

トランジスタ回路

Info

Publication number
JPS60181980A
JPS60181980A JP3801084A JP3801084A JPS60181980A JP S60181980 A JPS60181980 A JP S60181980A JP 3801084 A JP3801084 A JP 3801084A JP 3801084 A JP3801084 A JP 3801084A JP S60181980 A JPS60181980 A JP S60181980A
Authority
JP
Japan
Prior art keywords
signal
circuit
transistors
output
circuit block
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3801084A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0330907B2 (enrdf_load_stackoverflow
Inventor
Kazunori Nishijima
西島 一則
Mitsutoshi Sugawara
光俊 菅原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP3801084A priority Critical patent/JPS60181980A/ja
Priority to US06/706,597 priority patent/US4694204A/en
Publication of JPS60181980A publication Critical patent/JPS60181980A/ja
Publication of JPH0330907B2 publication Critical patent/JPH0330907B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06GANALOGUE COMPUTERS
    • G06G7/00Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/12Arrangements for performing computing operations, e.g. operational amplifiers
    • G06G7/16Arrangements for performing computing operations, e.g. operational amplifiers for multiplication or division
    • G06G7/163Arrangements for performing computing operations, e.g. operational amplifiers for multiplication or division using a variable impedance controlled by one of the input signals, variable amplification or transfer function
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/18Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22Demodulator circuits; Receiver circuits
    • H04L27/227Demodulator circuits; Receiver circuits using coherent demodulation
    • H04L27/2271Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals
    • H04L27/2273Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals associated with quadrature demodulation, e.g. Costas loop
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/0014Carrier regulation
    • H04L2027/0044Control loops for carrier regulation
    • H04L2027/0046Open loops
    • H04L2027/0048Frequency multiplication
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/0014Carrier regulation
    • H04L2027/0044Control loops for carrier regulation
    • H04L2027/0063Elements of loops
    • H04L2027/0067Phase error detectors

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
JP3801084A 1984-02-29 1984-02-29 トランジスタ回路 Granted JPS60181980A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP3801084A JPS60181980A (ja) 1984-02-29 1984-02-29 トランジスタ回路
US06/706,597 US4694204A (en) 1984-02-29 1985-02-28 Transistor circuit for signal multiplier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3801084A JPS60181980A (ja) 1984-02-29 1984-02-29 トランジスタ回路

Publications (2)

Publication Number Publication Date
JPS60181980A true JPS60181980A (ja) 1985-09-17
JPH0330907B2 JPH0330907B2 (enrdf_load_stackoverflow) 1991-05-01

Family

ID=12513603

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3801084A Granted JPS60181980A (ja) 1984-02-29 1984-02-29 トランジスタ回路

Country Status (1)

Country Link
JP (1) JPS60181980A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04181487A (ja) * 1990-11-16 1992-06-29 Inter Nitsukusu Kk 3乗回路
JPH07129697A (ja) * 1993-10-29 1995-05-19 Nec Corp トリプラおよびクァドルプラ

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04181487A (ja) * 1990-11-16 1992-06-29 Inter Nitsukusu Kk 3乗回路
JPH07129697A (ja) * 1993-10-29 1995-05-19 Nec Corp トリプラおよびクァドルプラ

Also Published As

Publication number Publication date
JPH0330907B2 (enrdf_load_stackoverflow) 1991-05-01

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