JPS60181934A - Task priority degree controlling system - Google Patents
Task priority degree controlling systemInfo
- Publication number
- JPS60181934A JPS60181934A JP59037894A JP3789484A JPS60181934A JP S60181934 A JPS60181934 A JP S60181934A JP 59037894 A JP59037894 A JP 59037894A JP 3789484 A JP3789484 A JP 3789484A JP S60181934 A JPS60181934 A JP S60181934A
- Authority
- JP
- Japan
- Prior art keywords
- task
- execution
- priority degree
- priority
- queue
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
- G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
Abstract
Description
【発明の詳細な説明】
(1) 発明の技術分野
本発明は情報処理装置のオペレーティングシステムに関
するもので、タスクの実行上の優先度の制御に係るもの
である。DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to an operating system for an information processing device, and relates to control of execution priorities of tasks.
(2) 従来技術と問題点
情報処理装置のオペレーティングシステムにおけるジョ
ブの実行等に際しては、その都度必要なタスクが選択さ
れて待ち行列に繋がれ、処理の順番が来たとき実行可能
な条件が整っているタスクが選ばれて実行優先度の高い
ものから順次処理される方式が採られている。そして、
タスクの実行優先度は奔基φ祷入出力系ジョブに係るタ
スクとCPU系ジョブとで異なるものとすると共に該当
するタスクがタイムスライス値(CPUが割g当てられ
る1回の時間)を使い切っているかどうかにより決定し
ている。(2) Prior art and problems When executing a job in the operating system of an information processing device, the necessary tasks are selected each time and placed in a queue, so that when it is their turn to process, the conditions for execution are met. A system is adopted in which the tasks with the highest execution priority are selected and processed in order. and,
The execution priority of tasks is different between tasks related to input/output jobs and CPU jobs, and when the relevant task uses up the time slice value (one time the CPU is allocated). It depends on whether there are any.
この様な従来の制御方式においては実行可能な条件の整
っているタスクと事象待ちで未だ実行することが不可能
なタスクとが同一の待ち行列に連結されているから、処
理(ディスパッチ)′jるためのタスクを選び出すとき
の制御が複雑で処理が遅いと言う欠点があつた。また、
通常入出力系ジョブのタスクの方をCPU系ジョブのタ
スクよシ高い実行優先度を与えているので、入出力系ジ
ョブが多数存在するときは、CPU系ジョブのタスクが
実行される機会を与えられる頻度が少なくなって処理結
果を得る迄に長時間を要すると言う欠点があった。史に
入出力系のジョブは入出力装置の種別に関係なく同一の
実行優先度が与えられているので、高速の入出力装置に
係る処理が滞る状態が発生するから、転送装置の使用効
率が良くないと言う欠点があった。In such a conventional control system, tasks that are ready to be executed and tasks that are waiting for an event and cannot be executed yet are connected to the same queue, so the processing (dispatch) The drawback was that the control for selecting tasks to perform was complicated and the processing was slow. Also,
Normally, tasks for input/output jobs are given a higher execution priority than tasks for CPU jobs, so when there are many input/output jobs, the tasks for CPU jobs are given a chance to be executed. The disadvantage is that it takes a long time to obtain processing results because the frequency of processing is reduced. Historically, input/output jobs are given the same execution priority regardless of the type of input/output device, so the processing of high-speed input/output devices is delayed, which reduces the efficiency of transfer device usage. There was a drawback that it was not good.
(3) 発明の目的
本発明は上記従来の欠点に鑑み、制御が簡潔で高速な処
理が期待出来ると共に、実行可能なタスクに極力均等に
CPU’i割シ当てて効率的な処理ケ行なうことの出来
る制御方式を提供することを目的としている。(3) Purpose of the Invention In view of the above-mentioned drawbacks of the conventional technology, the present invention aims to provide simple control and high-speed processing, and to perform efficient processing by allocating CPU'i to executable tasks as evenly as possible. The purpose is to provide a control method that allows for
(4) 発明の構成
そしてこの目的は本発明によれば特許請求の範囲に記載
のとおυ情報処理装置のオペレーティグシステムにおい
て、タスクの実行優先度の初期値と変更後の実行優先度
の値とを制御テーブルに記録する手段と、タスクの実行
待ち時間を管理する手段とを設け、実行可能なタスクを
その実行優先度ごとに連結して待ち行列を形成せしめる
と共に、最も高い実行優先度を有するタスクの待ち行列
以外の待ち行列に連結されていて該待ち行列に連結され
た時点から予め定めた時間を越えているタスクが存在す
るとき該タスクの実行優先度を高位のものに変更する如
く制御することを特徴とするタスク優先度制御方式によ
シ達成される。(4) Structure and object of the invention According to the present invention, in an operating system of an information processing device as described in the claims, the initial value of the execution priority of a task and the value of the execution priority after the change. and a means for managing the execution waiting time of the tasks, and form a queue by linking executable tasks according to their execution priorities, and having the highest execution priority. When there is a task that is connected to a queue other than the task queue and has exceeded a predetermined time since being connected to the queue, the execution priority of the task is changed to a higher one. This is achieved by a task priority control method characterized by:
(5)発明の実施例
第1図は本発明によるタスクの実行待ち状態の1例を示
す図で、T1〜T7はタスクを表わしておシ、(a)図
は初期値を(b)図はタスクT1が実行中である状態を
示している。(5) Embodiment of the Invention FIG. 1 is a diagram showing an example of the execution waiting state of a task according to the present invention, where T1 to T7 represent tasks, and (a) the initial value and (b) the initial value. indicates that task T1 is being executed.
第1図において、タスクの実行優先度は5つ存在し、そ
れぞれの待ち行列では実行可能なタスクだけが連結され
ている。また、初期の実行優先度(以下静的な実行優先
度と呼ぶ〕は高速な入出力装置を使用するタスクに対し
てより高い実行優先度を与えておく。タスクで1が選ば
れて実行中のとき例えば第1図(b)の状態に変遷する
。すなわち、この例では、タスクT1が実行中のときに
、タスクT2およびタスクT5が、ある一定時間実行待
ち状態におかれていたために、それぞれのタスクの実行
優先度(動的な実行優先度)が1つ上った状態を示して
いる。In FIG. 1, there are five task execution priorities, and only executable tasks are linked in each queue. In addition, the initial execution priority (hereinafter referred to as static execution priority) is given a higher execution priority to tasks that use high-speed input/output devices. For example, the state changes to the state shown in FIG. 1(b).In other words, in this example, while task T1 is being executed, task T2 and task T5 have been in the execution waiting state for a certain period of time. This shows a state in which the execution priority (dynamic execution priority) of each task has increased by one.
第2図は、静的な実行優先度が5であるタスクについて
、その動的な実行優先度の推移の例を表わした図で、Q
印はタスクが実行待ちである状態を、○卵内に斜線を記
入したものは、タスクが実行(ディスパッチ)された状
態ケ示しておシ、1だ、このタスクの実行優先度の上限
値が2である場合を示している。Figure 2 is a diagram showing an example of the dynamic execution priority transition for a task whose static execution priority is 5.
The mark indicates that the task is waiting to be executed, and the diagonal line inside the egg indicates that the task has been executed (dispatched). 1 indicates that the upper limit of the execution priority of this task is 2 is shown.
第3図は本発明の1実施例のブロック図であって、1は
タイマ機構初期化部、2はタイマ割シ込み発生部、3は
タイマ割シ込み処理部、4は実行待ち管理部、5はディ
スパッチ制御部、6は優先度制御用タスク、7は一般タ
スクを示している。FIG. 3 is a block diagram of one embodiment of the present invention, in which 1 is a timer mechanism initialization section, 2 is a timer interrupt generation section, 3 is a timer interrupt processing section, 4 is an execution wait management section, 5 is a dispatch control unit, 6 is a priority control task, and 7 is a general task.
第3図において、タイマ機構初期化部1はタスク優先度
制御用のタイマに初期値を設定する(例えば250 ミ
IJ秒毎にタイマ割シ込みが発生するように設定する)
。タイマ割シ込み発生部2は予め設定された時間(この
例では250ミリ秒〕経過したとき割り込みを発生する
。タイマ割り込み処理部3は優先度制御用タスクを起動
し、またタイマに初期値を設定する。実行待ち行列管理
部4は現在実行中(割り込み発生削ってあったタスクを
静的なタスク実行優先度に基づいて、実行待ち行列にタ
スクを連結する。ディスパッチ制御部5はタスク実行優
先度の一番高い実行待ち行列から順にタスクケ選択して
CPU使用権を与える。同時に、動的なタスク実行優先
度を初期値(静的なタスク実行優先度〕に戻す。In FIG. 3, the timer mechanism initialization unit 1 sets an initial value to a timer for task priority control (for example, it sets a timer interrupt to occur every 250 milliJ seconds).
. The timer interrupt generation unit 2 generates an interrupt when a preset time (250 milliseconds in this example) has elapsed.The timer interrupt processing unit 3 activates a priority control task and also sets an initial value to the timer. The execution queue management unit 4 connects tasks currently being executed (interrupts occurred) to the execution queue based on the static task execution priority.The dispatch control unit 5 connects tasks to the execution queue based on the static task execution priority. Tasks are selected in order from the execution queue with the highest priority and given CPU usage rights.At the same time, the dynamic task execution priority is returned to its initial value (static task execution priority).
優先度制御用タスク6は一査高いタスク優先度の実行待
ち行列以外の実行待ちタスクについて、実行待ちになっ
たときの時刻を調べて、予め定められた時間(例えば2
50 ミIJ秒)経過していれば、該タスクの動的なタ
スク実行優先度を1つ高くして、該当する実行優先度の
実行待ち行列へ連結し直す。一般タスク7は一般的な処
理(ジョブ)を行なうが、タスクの実行中に高い優先度
のタスクが実行待ちになった場合およびタイムスライス
値を使い果した場合にはタスクの切り換えが行なわれる
。The priority control task 6 checks the time when the execution waiting tasks other than those in the execution queue with a higher task priority are placed in the execution queue, and waits for a predetermined time (for example, 2
50 milliJ seconds), the dynamic task execution priority of the task is increased by one, and the task is reconnected to the execution queue of the corresponding execution priority. The general task 7 performs general processing (job), but if a task with a higher priority becomes waiting for execution while the task is being executed, or if the time slice value is used up, the task is switched.
タスクの優先度制御はタスク制御ブロック内に設けた静
的なタスク実行優先度と動的なタスク優先度およびタス
クの実行待ちになった時刻を記録する領域(制御テーブ
ルンを用いて行なわれる。該制御テーブルの変更と参照
の契機を第1表に示す。Task priority control is performed using an area (control table) provided in the task control block for recording static task execution priorities, dynamic task priorities, and the time at which tasks are placed on standby for execution. Table 1 shows the triggers for changing and referencing the control table.
(6) 発明の効果
以上詳細に説明したように本発明の方式によれば、実行
可能なタスクだけを連結して待ち行列音形成するので次
に実行するタスクの選択が迅速に行なえるから処理時間
を短縮出来る利点を有すると共に、高い実行優先度を肩
する実行待ちのタスクが多く存在する場合であっても、
一定時間以上実行を待っていた低い実行優先度を有する
タスクがあるとき、その実行優先度を高いものに変噸す
ることにより該タスクが実行される機会を多くしている
ので、処理の均一化が計れる利点を有し、CPU系のジ
ョブの処理に長時間を要したり、高速入出力装f#、を
接続した転送装置の使用効率が悪化するなどの事象を防
止出来るから効果は大である。(6) Effects of the Invention As explained in detail above, according to the method of the present invention, only executable tasks are connected to form a queue sound, so that the next task to be executed can be quickly selected. It has the advantage of reducing time and even when there are many tasks waiting to be executed that have high execution priority.
When there is a task with a low execution priority that has been waiting for execution for a certain period of time, the execution priority is changed to a higher one, increasing the chances that the task will be executed, thereby making the processing more uniform. It has the advantage of being able to measure performance, and is highly effective because it can prevent phenomena such as the long time it takes to process CPU-based jobs and the deterioration in the usage efficiency of the transfer device connected to the high-speed input/output device f#. be.
第1図は本発明によるタスクの実行待ち状態の1例ケ示
す図、第2図は静的な実行優先度が5であるタスクにつ
いて、その動的な実行優先度の推移の例を表わした図、
第3図は本発明の1実施例のブロック図である。
1・・・タイマ機構初期化部、2・・・タイマ割り込み
発生部、3・・・タイマ割り込み処理部、4・・・実行
待ち管理部、5・・・ディスバッチ制御部、6・・・優
先度制御用タスク、7・・・一般タスク代理人弁理士
松 岡 宏四部
第1図
(a)
(b)
第2図FIG. 1 is a diagram showing an example of a task waiting for execution according to the present invention, and FIG. 2 is an example of a dynamic execution priority transition for a task whose static execution priority is 5. figure,
FIG. 3 is a block diagram of one embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Timer mechanism initialization unit, 2... Timer interrupt generation unit, 3... Timer interrupt processing unit, 4... Execution wait management unit, 5... Disbatch control unit, 6... Priority control tasks, 7... Patent attorney representing general tasks
Hiroshi Matsuoka Part 1 Figure 1 (a) (b) Figure 2
Claims (1)
クの実行優先度の初期値と変更後の実行優先度の値とを
制御テーブルに記録する手段と、タスクの実行待ち時間
を管理する手段とを設け、実行可能なタスクをその実行
優先度ごとに連結して待ち行列を形成せしめると共に、
最も高い実行優先度を有するタスクの待ち行列以外の待
ち行列に連結されていて該待ち行列に連結された時点か
ら予め定めた時間を越えているタスクが存在するとき該
タスクの実行優先度を高位のものに変更する如く制御す
ることを特徴とするタスク優先度制御方式。In the operating system of an information processing device, a means for recording the initial value of the execution priority of a task and a value of the execution priority after the change is provided in a control table, and a means for managing the execution waiting time of the task is provided. In addition to connecting tasks according to their execution priorities to form a queue,
When there is a task that is connected to a queue other than the queue of the task with the highest execution priority and has exceeded a predetermined time since being connected to the queue, the execution priority of the task is set to a high level. A task priority control method characterized in that the task priority is controlled so as to change the task priority.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59037894A JPS60181934A (en) | 1984-02-29 | 1984-02-29 | Task priority degree controlling system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59037894A JPS60181934A (en) | 1984-02-29 | 1984-02-29 | Task priority degree controlling system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60181934A true JPS60181934A (en) | 1985-09-17 |
Family
ID=12510244
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59037894A Pending JPS60181934A (en) | 1984-02-29 | 1984-02-29 | Task priority degree controlling system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60181934A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63193233A (en) * | 1987-02-06 | 1988-08-10 | Canon Inc | Instrument control equipment |
JPS6421636A (en) * | 1987-07-17 | 1989-01-25 | Nec Corp | Task management unit |
JPH0199132A (en) * | 1987-10-12 | 1989-04-18 | Matsushita Electric Ind Co Ltd | Multi-task executing device |
JPH01154237A (en) * | 1987-12-10 | 1989-06-16 | Matsushita Electric Ind Co Ltd | Executing device for time-division task |
-
1984
- 1984-02-29 JP JP59037894A patent/JPS60181934A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63193233A (en) * | 1987-02-06 | 1988-08-10 | Canon Inc | Instrument control equipment |
JPS6421636A (en) * | 1987-07-17 | 1989-01-25 | Nec Corp | Task management unit |
JPH0199132A (en) * | 1987-10-12 | 1989-04-18 | Matsushita Electric Ind Co Ltd | Multi-task executing device |
JPH01154237A (en) * | 1987-12-10 | 1989-06-16 | Matsushita Electric Ind Co Ltd | Executing device for time-division task |
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