JPS60180065U - Display panel control device - Google Patents
Display panel control deviceInfo
- Publication number
- JPS60180065U JPS60180065U JP1984067454U JP6745484U JPS60180065U JP S60180065 U JPS60180065 U JP S60180065U JP 1984067454 U JP1984067454 U JP 1984067454U JP 6745484 U JP6745484 U JP 6745484U JP S60180065 U JPS60180065 U JP S60180065U
- Authority
- JP
- Japan
- Prior art keywords
- display panel
- door
- control device
- state
- panel control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Digital Computer Display Output (AREA)
- Power Sources (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は、この発明の実施例であるATMにおいてタイ
マ割り込みによって実行される表示パネル制御動作を示
すフローチャートである。第2図は表示パネルの背黒式
キーが押下された時に実行される動作手順を示すフロー
チャートである。第3図A、 Bは取引が開始された時
液晶表示データを更新する時の動作を示すフローチャー
ト、液晶表示データの更新内容を示す図である。第4図
は、ATM装置の状態が変化した時に実行される概略動
作を示すフローチャートである。第5図は、上記ATM
の外観斜視図、同6図は同ATMの背部を示す図、第7
図は表示パネルの正面図、第8図は同ATMの制御部の
概略ブロック図、第9図はRAMの要部構成図である。
3.4・・・扉、5・・・表示パネル、6・・・扉スィ
ッチ。FIG. 1 is a flowchart showing a display panel control operation executed by a timer interrupt in an ATM according to an embodiment of the present invention. FIG. 2 is a flowchart showing the operational procedure executed when the black key on the display panel is pressed. FIGS. 3A and 3B are a flowchart showing the operation when updating the liquid crystal display data when a transaction is started, and a diagram showing the contents of updating the liquid crystal display data. FIG. 4 is a flowchart showing the general operations executed when the state of the ATM device changes. Figure 5 shows the above ATM
Figure 6 is a diagram showing the back of the ATM.
The figure is a front view of the display panel, FIG. 8 is a schematic block diagram of the control section of the ATM, and FIG. 9 is a configuration diagram of the main parts of the RAM. 3.4...door, 5...display panel, 6...door switch.
Claims (1)
て、扉の開閉状態に応じてオン、オフする扉スィッチと
、一定時間毎に前記扉スィッチのオン、オフ状態を検出
して扉開閉状態を検出する扉開閉状態検出手段と、前記
扉開閉状態検出手段で扉の開状態を検出したときには表
示パネル電源をオンし、閉状態を検出したときは表示パ
ネル電源をオフする表示パネル電源オン、オフ手段と、
を備えてなる表示パネル制御装置。A control device for a display panel attached to the inside of a door includes a door switch that turns on and off depending on the open/closed state of the door, and detects the on/off state of the door switch at regular intervals to detect the open/closed state of the door. a door opening/closing state detection means; and a display panel power on/off means for turning on a display panel power supply when the door opening/closing state detection means detects an open state of the door, and turning off the display panel power supply when a closed state is detected. ,
A display panel control device comprising:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1984067454U JPS60180065U (en) | 1984-05-07 | 1984-05-07 | Display panel control device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1984067454U JPS60180065U (en) | 1984-05-07 | 1984-05-07 | Display panel control device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60180065U true JPS60180065U (en) | 1985-11-29 |
JPH0353325Y2 JPH0353325Y2 (en) | 1991-11-21 |
Family
ID=30601294
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1984067454U Granted JPS60180065U (en) | 1984-05-07 | 1984-05-07 | Display panel control device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60180065U (en) |
-
1984
- 1984-05-07 JP JP1984067454U patent/JPS60180065U/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPH0353325Y2 (en) | 1991-11-21 |
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