JPS60179963A - Digital audio disk player - Google Patents

Digital audio disk player

Info

Publication number
JPS60179963A
JPS60179963A JP3462084A JP3462084A JPS60179963A JP S60179963 A JPS60179963 A JP S60179963A JP 3462084 A JP3462084 A JP 3462084A JP 3462084 A JP3462084 A JP 3462084A JP S60179963 A JPS60179963 A JP S60179963A
Authority
JP
Japan
Prior art keywords
circuit
frequency
signal
increased
signal processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3462084A
Other languages
Japanese (ja)
Inventor
Kenichi Koyama
健一 小山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP3462084A priority Critical patent/JPS60179963A/en
Publication of JPS60179963A publication Critical patent/JPS60179963A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/00007Time or data compression or expansion

Abstract

PURPOSE:To vary steps of sound signals to be reproduced by using a common oscillation circuit containing a signal processing circuit, a spindle control circuit and a D/A converting circuit as a frequency variable oscillation circuit. CONSTITUTION:When the frequency of a frequency variable oscillation circuit 8 is increased, a reference clock 5B of a spindle control circuit 7 is also increased. As a result, a spindle motor 2 is accelerated to increase the number of revolutions of a disk 1. In this case, a digital signal 5D which is sent to a D/A converting circuit 6 from a signal processing circuit 5 is increased for its information quantity per unit time by a degree equivalent to the rise of the frequency of the clock 5B. At the same time, the frequency of a deglitcher signal 5C is also increased. Therefore an audio signal is compressed in the same ratio toward a time axis. When the frequency of the circuit 8 is reduced, a signal 6A is expanded in the same ratio toward the time axis. In other words, the time axis can be compressed and expanded in proportion to the changing degree of frequency. Thus the step of the audio signal can be varied.

Description

【発明の詳細な説明】 産業上の利用分野 本発明はディジタルオーディオディスク(以下ディスク
という)を回転させる回転数を可変可能にしてアナログ
信号の時間軸圧伸を一可能にしたディジタルオーディオ
ディスクプレーヤ(以下DADプレーヤという)に関す
る。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a digital audio disc player (hereinafter referred to as a disc) which makes it possible to vary the number of rotations of a digital audio disc (hereinafter referred to as a disc) to perform time axis companding of an analog signal. (hereinafter referred to as a DAD player).

従来例の構成とその問題点 DADプレーヤは、ソフトであるディスクの普及と共に
民生用だけでなく業務用としても大きな飛躍が期待され
ている。この様な状況の中で、従来の8トラツクあるい
はコンパクトカセットテープを用いたカラオケプレーヤ
に対応する商品としてDADプレーヤを用いたカラオケ
プレーヤの開発が進められている。
Conventional configurations and their problems With the spread of software disks, DAD players are expected to make a big leap not only for consumer use but also for business use. Under these circumstances, karaoke players using DAD players are being developed as products compatible with karaoke players using conventional 8-track or compact cassette tapes.

次に従来のDADプレーヤについて説明する。Next, a conventional DAD player will be explained.

第1図は従来のDADプレーヤの構成である。FIG. 1 shows the configuration of a conventional DAD player.

ディスク1から光学ピックアップ3によって読み取られ
たRF信号3Aは光学サーボ回路とディジタル信号処理
の前処理回路4を通って、ディスクに記録された情報を
含むディジタル信号4人とこれを読み取るためのクロッ
ク4Bとに分けられてディジタル信号処理回路6に入力
される。ディジタル信号処理回路(以下信号処理回路と
いう)では、ディスクの傷などによって誤まったデータ
を訂正したり、正しい時間軸状態にデータを並べ変えて
からDA変換回路6にデータを送る。DA変換は第2図
に示すように信号処理回路6から例えば16Bitパラ
レルのデータ6DがDAコ/パータに入力され、その出
力6Cの安定した部分をデグリッチ信号6Gによって取
シ出し:6Bの実線で示したような信号を得、その後フ
ィルタリングそして増幅をしてオーディオ信号6Aとし
て出力される。一方、ディスクを回転させるスピンドル
モータ制御回路7は、信号処理回路によってディジタル
信号4Aから検出された同期信号6人と基準クロック6
Bとを位相比較してその誤差電圧によってスピンドルモ
〜り2を駆動している。また、DA変換回路6のデグリ
ッチ信号5Gとスピンドルモータ制御回路7の基準クロ
ック5Bは信号処理回路6の駆動クロックを分周して作
っている。
The RF signal 3A read from the disc 1 by the optical pickup 3 passes through an optical servo circuit and a preprocessing circuit 4 for digital signal processing, and is transmitted to four digital signals containing information recorded on the disc and a clock 4B for reading this. The signal is divided into two parts and input to the digital signal processing circuit 6. A digital signal processing circuit (hereinafter referred to as a signal processing circuit) corrects data that is erroneous due to scratches on the disk, rearranges the data to the correct time axis state, and sends the data to the DA conversion circuit 6. In the DA conversion, as shown in Fig. 2, for example, 16-bit parallel data 6D is input from the signal processing circuit 6 to the DA converter, and the stable part of the output 6C is extracted by the deglitch signal 6G: as shown by the solid line 6B. A signal as shown is obtained, then filtered and amplified and output as an audio signal 6A. On the other hand, the spindle motor control circuit 7 that rotates the disk uses six synchronizing signals detected from the digital signal 4A by the signal processing circuit and a reference clock 6.
B is compared in phase and the spindle motor 2 is driven by the error voltage. Further, the deglitch signal 5G of the DA conversion circuit 6 and the reference clock 5B of the spindle motor control circuit 7 are generated by frequency-dividing the drive clock of the signal processing circuit 6.

このような従来の構成では、信号処理回路6の駆動クロ
ックを水晶発振回路力どを用いて固定周波数としていた
だめ、基準クロック6Bとデグリッチ信号6Cの周波数
を変えることができず、したがって再生されるオーディ
オ信号もその再生スピードを変えて音程を変えるという
ことができなかった。
In such a conventional configuration, the drive clock of the signal processing circuit 6 is set to a fixed frequency using a crystal oscillator circuit, etc., and the frequencies of the reference clock 6B and deglitch signal 6C cannot be changed, and therefore, the frequency of the deglitch signal 6C cannot be changed. It was also not possible to change the pitch of an audio signal by changing its playback speed.

発明の目的 本発明の目的は、ディスクの再生スピードを変えて再生
されるオーディオ信号の音程を変えることができるDA
Dプレーヤを提供することを目的とする。
OBJECT OF THE INVENTION An object of the present invention is to provide a DA that can change the pitch of the audio signal being played back by changing the playback speed of the disc.
The purpose is to provide a D player.

発明の構成 ディスクを回転きせる駆動回路と、このディスクから得
られた信号を処理するディジタル信号処理回路と、処理
されたティメタル信号をアナログ信号に変換するDA変
換回路を有し、これら3回路のそれぞれの動作基準クロ
ックを発生する共通した原発振回路を崩し、この原発振
回路の発振周波数を変化させることによシディスクの再
生スピードを変えて再生されるオーディオ信号の時間軸
圧伸ができるものである。
Constituent Structure of the Invention The invention has a drive circuit that rotates a disk, a digital signal processing circuit that processes signals obtained from this disk, and a DA conversion circuit that converts the processed time signal into an analog signal, and each of these three circuits By breaking the common source oscillation circuit that generates the operating reference clock of the system and changing the oscillation frequency of this source oscillation circuit, it is possible to change the playback speed of the disk and time-base companding of the audio signal being played back. be.

実施例の説明 第3図は本発明の実施例の構成を示す。8は従来の原発
振回路にかわる周波数可変可能な発振回路でたとえば電
圧制御発振器である。また、1はディスク、2はスピン
ドルモータ、3は光学ピンクアンプ、4は光学サーボ回
路と前処理回路、6はDA変換回路、7はスピンドル制
御回路でこれらは従来例の構成と同じものである。なお
、6はディジタル信号処理回路で、原発振回路が固定周
波数回路から周波数可変発振回路8(以下VFOという
)に変わった以外は従来例の構成と同じである。
DESCRIPTION OF THE EMBODIMENT FIG. 3 shows the configuration of an embodiment of the present invention. Reference numeral 8 denotes a variable frequency oscillation circuit which replaces the conventional original oscillation circuit, and is, for example, a voltage controlled oscillator. Also, 1 is a disk, 2 is a spindle motor, 3 is an optical pink amplifier, 4 is an optical servo circuit and a preprocessing circuit, 6 is a DA conversion circuit, and 7 is a spindle control circuit, which are the same configuration as the conventional example. . Note that 6 is a digital signal processing circuit, which has the same configuration as the conventional example except that the original oscillation circuit is changed from a fixed frequency circuit to a variable frequency oscillation circuit 8 (hereinafter referred to as VFO).

以上のように構成された本実施例のDADプレーヤにつ
いてその動作を説明する。1ず、VFO8の尚波数を従
来の固定周波数発振器と同じにする。この絢波数をf。
The operation of the DAD player of this embodiment configured as described above will be explained. First, the wave number of the VFO 8 is made the same as that of a conventional fixed frequency oscillator. This wave number is f.

とする。この場合、従来のDADプレーヤと何ら変わる
所はない。次に、たとえばVFOaの周波数を6%高く
したとする。
shall be. In this case, there is no difference from a conventional DAD player. Next, suppose that the frequency of VFOa is increased by 6%, for example.

するとスピンドル制御回路7の基準クロック5Bはこの
VFOのクロックを分周して作られているから同時に6
チ高くなシ、第4図のようになる。
Then, since the reference clock 5B of the spindle control circuit 7 is created by dividing the frequency of this VFO clock, the reference clock 5B of the spindle control circuit 7
If the height is high, it will look like Figure 4.

この瞬間ディスクの回転数は元のままであるからディス
クから読み取られた同期信号5Aの繰り返えし周期は変
わらない。このため位相比較による誤差電圧によシスピ
ンドルモータ2は加速される。
At this moment, the rotational speed of the disk remains the same, so the repetition period of the synchronization signal 5A read from the disk does not change. Therefore, the system spindle motor 2 is accelerated by the error voltage resulting from the phase comparison.

ディスク1の回転数が速くなるにしたがってディスクか
ら読み取られる同期信号の周期も次第に短くなり結果的
にはディスクの回転数が5%高くなった/9rで落ちつ
くことになる。この時、信号処理回路6からDA変換回
路6へ送られるディジタル信号6Dも信号処理回路6の
駆動クロックの周波数が5%高くなった分だけ単位時間
当たりの情報量も多くなる。捷た、デグリッチ信号6C
も周波数が6%高くなる。この結果、DA変換回路全体
としては第2図における1サンプルに相当する時間ts
 が5%短くなシデグリノチ回路の出力6Bも時間軸方
向に6%圧縮された形になる。したがって、オーディオ
信号6人も時間軸方向に5%圧縮された形になる。逆に
、VFO8の周波数を5チ下げればオーディオ信号6A
は時間軸方向に5チ伸張された形になる。すなわち、v
yosの周波数を可変することによシその変化量に比較
した時間軸圧伸操作ができる。
As the rotational speed of the disk 1 increases, the period of the synchronization signal read from the disk gradually becomes shorter, and as a result, the rotational speed of the disk settles at 5% higher, i.e., /9r. At this time, the digital signal 6D sent from the signal processing circuit 6 to the DA conversion circuit 6 also has a larger amount of information per unit time as the frequency of the driving clock of the signal processing circuit 6 is increased by 5%. Deglitched signal 6C
The frequency will also increase by 6%. As a result, the DA conversion circuit as a whole takes a time ts corresponding to one sample in FIG.
The output 6B of the side-grid circuit, which is 5% shorter, is also compressed by 6% in the time axis direction. Therefore, the six audio signals are also compressed by 5% in the time axis direction. Conversely, if you lower the frequency of VFO8 by 5 inches, the audio signal will be 6A.
is expanded by 5 inches in the time axis direction. That is, v
By varying the frequency of yos, a time axis companding operation can be performed in comparison with the amount of change thereof.

以上のように本実施例によれば、信号処理回路およびス
ピンドル制御回路およびDム変換回路の共通原発振回路
をvyoにすることによシ再生されるオーディオ信号の
時間軸圧伸が可能となり音程を変えることができる。
As described above, according to this embodiment, by setting the common source oscillation circuit of the signal processing circuit, spindle control circuit, and DMU conversion circuit to VYO, it is possible to perform time axis companding of the audio signal to be reproduced. can be changed.

発明の効果 本発明は信号処理回路とスピンドル制御回路とDA変換
回路の基準クロックを発生する共通しだ固定筒波数発振
回路を周波数可変発振回路にすることによシディスクの
回転速度を変え、信号処理速度を変え、Dム変換処理速
度を変えることによりオーディオ信号の時間軸圧伸をし
て音程を変えることができるDADプレーヤが実現でき
るものである。
Effects of the Invention The present invention changes the rotational speed of the disk by changing the common fixed tube wave number oscillation circuit that generates the reference clock for the signal processing circuit, spindle control circuit, and DA conversion circuit to a variable frequency oscillation circuit. By changing the processing speed and the D/M conversion processing speed, it is possible to realize a DAD player that can compand the audio signal on the time axis and change the pitch.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のDADプレーヤのブロック図、第2図a
、bはそのDA変換回路のブロック図及びその動作を説
明するだめの図、第3図は本発明の一実施例のブロック
図、第4図はその位相比較の説明をするだめの図である
。 1・・・・・・ディスク、3・・・・・・光学ピックア
ップ、4・・・・・・前処理回路、6・・・・・・ディ
ジタル信号処理回路、6・・・・・・Dム変換回路、8
・・・・・・周波数可変発振回路。 代理人の氏名 弁理士 中 尾 敏 g3 ほか1名区
 区 綜 法 ζQ 。 法 法
Figure 1 is a block diagram of a conventional DAD player, Figure 2a
, b is a block diagram of the DA conversion circuit and a diagram for explaining its operation, FIG. 3 is a block diagram of an embodiment of the present invention, and FIG. 4 is a diagram for explaining the phase comparison. . DESCRIPTION OF SYMBOLS 1... Disk, 3... Optical pickup, 4... Pre-processing circuit, 6... Digital signal processing circuit, 6... D system conversion circuit, 8
・・・・・・Variable frequency oscillation circuit. Name of agent: Patent attorney Satoshi Nakao, G3, and 1 other person: Ku Soho ζQ. law law

Claims (1)

【特許請求の範囲】[Claims] ディジタルオーディオディスクを回転させる駆動回路と
、このディジタルオーディオディスクから得られた信号
を処理するディジタル信号処理回路と、処理されたディ
ジタル信号をアナログ信号に変換するDA変換回路と、
これら3回路のそれぞれの動作基準クロックを発生する
共通した原発振回路とを備え、この原発振回路を周波数
可変発振回路で構成することにより上記DA変換回路の
アナログ信号出力の時間軸圧伸をすることを特徴とする
ディジタルオーディオディスクプレーヤ。
A drive circuit that rotates a digital audio disc, a digital signal processing circuit that processes signals obtained from the digital audio disc, and a DA conversion circuit that converts the processed digital signal into an analog signal.
A common source oscillation circuit that generates an operating reference clock for each of these three circuits is provided, and by configuring this source oscillation circuit with a variable frequency oscillation circuit, time-base companding of the analog signal output of the DA conversion circuit is performed. A digital audio disc player characterized by:
JP3462084A 1984-02-24 1984-02-24 Digital audio disk player Pending JPS60179963A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3462084A JPS60179963A (en) 1984-02-24 1984-02-24 Digital audio disk player

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3462084A JPS60179963A (en) 1984-02-24 1984-02-24 Digital audio disk player

Publications (1)

Publication Number Publication Date
JPS60179963A true JPS60179963A (en) 1985-09-13

Family

ID=12419422

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3462084A Pending JPS60179963A (en) 1984-02-24 1984-02-24 Digital audio disk player

Country Status (1)

Country Link
JP (1) JPS60179963A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58189871A (en) * 1982-04-30 1983-11-05 Sony Corp Digital signal reproducer

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58189871A (en) * 1982-04-30 1983-11-05 Sony Corp Digital signal reproducer

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