JPS60176175A - Digital signal processor - Google Patents

Abstract

PURPOSE:To enable easy addition of a new function to a multifunctional signal processing capacity by constituting a titled processor in such a way that plural sets of circuit constitution including a digital signal input terminal, a pulse generating part and a digital signal processing arithmetic part can be added. CONSTITUTION:An analog signal input part 2 is constituted of an amplifier of variable gains, an A/D converter, etc. An analog signal output part 7 is constituted of a D/A converter for D/A-converting digital data obtained by processing, etc. Circuits A and B have digital signal processing arithmetic parts 51 and 52, pulse generating parts 61 and 62 and selectors 41 and 42. When a processing function is transferred as a command from an external controller through a terminal 10, a control part 12 reads out programs for all functions to be executed in the digital signal processing arithmetic parts 51 and 52 and outputs them to a terminal 17. Thus multifunctional operation can be executed in parallel, and when a new operating function is added, a signal processing program ROM of the control part 12 may be added.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital signal processing device suitable for use in audio signal processing, image signal processing, communication fields, etc., and is capable of processing not only basic processing such as signal analysis, synthesis, and filtering. Regarding digital signal processing devices with multi-functional signal processing capabilities, conventional devices of this type include waveform analyzers with names such as digital spectrum analyzers and FFT analyzers, digital signal generators, and random-sound generators. A large number of signal generators with names are known. However, the waveform analyzer has a structure that only processes the signal input from the signal input terminal and displays the processing result, and the signal generator has a structure that only outputs the signal generated by the signal generation circuit from the signal output terminal. Therefore, it was impossible to perform all the basic signal processing techniques such as signal analysis, synthesis (generation), and filtering simultaneously with one device. Furthermore, value (σ) is only achieved when a large number of functions are integrated, such as analysis, and even if a request to add new functions arises, it is difficult to install expensive external storage devices (disks, cassette tapes, etc.). The drawback was that it was not possible to easily add functions unless the device was equipped with a standard device.

The present invention aims to eliminate these drawbacks of the conventional techniques, and it not only enables basic signal processing such as signal analysis, synthesis, and filtering, but also enables conversion into other physical quantities and feature quantities. It also has multifunctional signal processing capabilities that can generate test signals by combining signals.
First, a small and inexpensive digital signal processing device to which new functions can be easily added is provided.

An embodiment of the present invention shown in the drawings will be explained in detail below.

First, an embodiment of a digital signal processing apparatus according to the present invention will be schematically described with reference to FIG.

In this embodiment, the parts that perform digital signal processing calculations are A and B.
However, if more functions are required by having two or more, please add the part surrounded by the dotted line (・Ke&Redoσ) to 5. It is also possible to implement a multifunctional one. In Fig. 1, ■ is an analog signal input terminal, 2 is an analog signal input terminal, and 31 and 32 are circuit A11.
3, each digital signal input terminal, F%-
The digital signal A/D converted by the analog signal input section 2 is input from the input terminal 31. signal output terminal,
91 and 92 are digital signal output terminals for the circuit 7 and 13σ), 10 is a command input terminal, 11 is an interface section, and 12 is a control section.

The σ) analog signal input unit 2 is comprised of a variable gain σ) amplifier, an antialiasing filter with a variable cutoff frequency, and an A/D converter with a variable quantization bit length.

The clock pulses generated by the pulse generator 61 and 620 are:
It functions as a sampling pulse for the A/D converter and a timing pulse for signal processing. The analog signal output section 7 is composed of a JJ/A converter that converts the digital data obtained as a result of processing into a D/A converter, a low-pass filter with a variable cutoff frequency, and an amplifier with a variable gain. Ru.

In this embodiment of the digital signal processing apparatus configured as described above, processing functions and processing conditions are transferred from an external control device (not shown) to the control unit 12 via the terminal 10. The program shown in FIG. 2 is read out, and a signal processing program l using a dedicated memory is also stored in 0M13, and the processing functions and processing conditions transferred via the interface section]1 are input manually from the terminal 14 to the control circuit 15. Here, the program corresponding to the processing function is decoded and the signal processing program l (O
A processing program is read from M13 and output to terminal 17. On the other hand, the processing conditions are as follows: from the control circuit 15 to the analog signal input unit 2 in FIG. Band-pass filter cut-off frequency, variable amplifier gain, etc.
The pulse generators 61 and 62 have the period of the clock pulse,
The selectors 41 and 42 each receive a signal selection command from terminal 1.
Transfer via 8.

An embodiment of the digital signal processing calculation units 51 and 52 will be described in detail with reference to FIG.

The signal processing program transferred from the control unit 12 is connected to terminal 1.
7 should also be stored in the signal processing program ltAM+9, which is a read/write memory. The capacity of this l(, A +Vi only needs to be equal to the capacity of the program that realizes one signal processing function).
, OM1, 3. The arithmetic circuit 20 operates according to the contents of a signal processing program, and executes a product/sum operation, which is a basic operation of digital signal processing.

This arithmetic circuit 20 may be a hard-wired circuit using multipliers and adders, or may be implemented using a microprocessor, digital signal processing sensor, or the like.

To the calculation side 1Il11 circuit 2J, a clock pulse that operates as a start pulse for calculation is applied from the pulse generator 61-62 in Figure i1 from the terminal 22, and this is used as a trigger to read out the riffrogram from the signal processing program 1 (AM19). The digital human input signals selected by the selectors 41 and 42 in FIG.
or output as a digital output signal from terminals 9] and 92. However, depending on the functions executed by the digital signal processing calculation units 5J and 52, the signal flow in which digital human input signals are taken in, such as waveform analysis, and the results are stored in separate data memories, may be without taking in
There are several possible signal flows in which signals generated in the arithmetic circuit 20 are taken out as digital output signals from the terminals 91 and 92.

As described above, according to this embodiment, it is possible to perform multiple processing functions simultaneously and in parallel with one digital signal processing device. This can be realized by simply adding 12 signal processing programs ILOM.

Next, an example in which three digital signal processing calculation units are provided will be described using a JLd diagram.

One digital signal processing calculation unit 5113 generates random noise, and another digital signal processing calculation unit 5113 uses a digital filter function to band limit the output signal, and converts this output signal into an analog output signal. When the response signal from the system under test M is converted and subjected to waveform analysis in another digital signal processing calculation unit 5]A, it is possible to obtain the test signal under the optimum test conditions. The characteristics of the system under test M can be easily measured. As shown in this example, the device of the present invention is multifunctional and flexible, so it is possible to easily create an environment that suits the purpose of work.

As described above, according to the present invention, not only basic signal processing but also various digital signal processing functions can be achieved with a single device, and even more diverse signal processing functions can be achieved by simply adding a predetermined circuit configuration. Formula 1- can be easily achieved.

[Brief explanation of the drawing]

FIG. 2 is a block circuit diagram showing one embodiment of the present invention.
3 and 3 show the inside of a block circuit showing details of the control section and the digital signal processing operation section in the embodiment shown in FIG. 1, and FIG.
FIG. 2 is a block circuit diagram showing a modified embodiment of the present invention, which includes: FIG. ]...Analog signal human input terminal, 2...Analog signal input section, ;31.32...Digital signal input terminal,
41.42...Selector, 51.52...Digital signal processing calculation section, 61.62...Pulse generation section, 7
...Analog signal output section, 8...Analog signal output terminal, 9L92...Digital signal output terminal, 10.
...Command input terminal, 11...Interface section,
12...Control unit, 13...Signal processing program l also OM, 14...Command terminal, 15...Control circuit,
16...Address pointer, 17...Signal processing program terminal, 18...Command instruction terminal, 19...
Signal processing program ILAM, 20... Arithmetic circuit, 2
1...Arithmetic control circuit, n...Clock pulse terminal, R...Digital data terminal, U...Data memory applicant Japan Radio Co., Ltd.

Claims (1)

[Claims] A digital signal processing device that converts an analog signal into a digital signal and performs digital signal processing such as frequency analysis processing, includes an amplifier with variable gain, an anti-aliasing filter with variable cutoff frequency, and an A/D with variable quantization bit length. An analog signal input section consisting of a converter and a digital signal input terminal for inputting digital signals,
A pulse generating section that generates a clock pulse with a variable period that functions as a sampling pulse for the A/D converter and a timing pulse for signal processing, and a processing procedure for realizing a digital signal processing function are stored in the form of a program, and the processing procedure for realizing the digital signal processing function is stored in the form of a program. A digital signal processing unit that can change the calculation method under program control; 1) A converter that converts the digital data obtained as a result of processing; a low-pass filter with a variable cutoff frequency; An analog signal output section consisting of a variable gain amplifier, a digital signal output terminal connected to the output of the digital signal processing section for outputting digital data, and a command for the digital signal processing function received from the outside '1- It stores all the programs to be executed by the digital signal processing processor and the analog signal input terminal and the pulse processing unit based on the processing functions and processing conditions received by the interface unit. generation part,
The digital signal processing is performed by setting variable parameters related to the digital signal processing calculation section and the analog signal output section, selecting and controlling connections between the respective sections, and selecting a program to be executed by the digital signal processing calculation section. a control unit for transmitting data to a calculation unit, and configured to be able to add a plurality of predetermined circuit configurations each including the digital signal input terminal, the pulse generation unit, and the digital signal processing calculation unit as a set. A digital signal processing device characterized by