JPS6016197A - Automatic frequency regulator of generator - Google Patents

Automatic frequency regulator of generator

Info

Publication number
JPS6016197A
JPS6016197A JP12426783A JP12426783A JPS6016197A JP S6016197 A JPS6016197 A JP S6016197A JP 12426783 A JP12426783 A JP 12426783A JP 12426783 A JP12426783 A JP 12426783A JP S6016197 A JPS6016197 A JP S6016197A
Authority
JP
Japan
Prior art keywords
frequency
generator
set value
counter
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12426783A
Other languages
Japanese (ja)
Inventor
Akinori Tazaki
昭憲 田崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP12426783A priority Critical patent/JPS6016197A/en
Publication of JPS6016197A publication Critical patent/JPS6016197A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02PCONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P11/00Arrangements for controlling dynamo-electric converters
    • H02P11/06Arrangements for controlling dynamo-electric converters for controlling dynamo-electric converters having an ac output

Abstract

PURPOSE:To enable to obtain a stable set value by applying the set value for the frequency of a generator by the output of a counter. CONSTITUTION:An arithmetic circuit 16 calculates the set value necessary at that time from the given data, and an output circuit 17 outputs a control signal 17b indicating the direction of the rising or falling frequency and a pulse 17a of a pulse train signal of the number corresponding to the rising or failling amount on the basis of the calculated result. A counter 19 up or down counts the pulse 17a from the output circuit 17, and inputs the counted result through a digital- to-analog converter 20 as a frequency set value to an operational amplifier 10. The amplifier 10 controls the frequency of the generator 1 so that the deviation between the value of the frequency signal and the set value of the generator 1 becomes minimum.

Description

【発明の詳細な説明】 この発明は、発電機周波数を所望の設定値に自動的に保
つ制御を行なう自動周波数調整装置に関するものである
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an automatic frequency adjustment device that performs control to automatically maintain a generator frequency at a desired set value.

従来、この種の装置として第1図に示すものがあった。Conventionally, there has been a device of this type as shown in FIG.

図において、1は発電機で、2は電動機、2atj:電
動機2の速度な制御する可変速装置及び3け発電機から
なる。4は発電機1の出力端に直列接続さf′した辿断
器、5は降圧用の変圧器、6は周波数検出回路、7.7
a、8.8aは抵抗、9はコンデンサ、10は演算増幅
器で、抵抗7,8゜8a及びコンデンサ9と共に偏差増
幅回路を構成する。11は演算増幅器10の出力信号を
入力している位相制御回路、12は位相制御回路11の
出力信号を人力としている点弧回路、13は点弧回路1
2の出力にエリ点弧制御さnるサイリスタで、可変速装
置2a即ち電動機1の回転数を制御する。14は変圧器
5〜サイリスタ13からなる自動周波数調整回路、15
は周波数設定器、PI3は直流電圧を示す。
In the figure, 1 is a generator, 2 is an electric motor, 2atj is a variable speed device that controls the speed of the electric motor 2, and a three-digit generator. 4 is a breaker f' connected in series to the output end of the generator 1; 5 is a step-down transformer; 6 is a frequency detection circuit; 7.7
a, 8.8a are resistors, 9 is a capacitor, and 10 is an operational amplifier, which together with the resistors 7, 8.8a and the capacitor 9 constitute a deviation amplification circuit. 11 is a phase control circuit into which the output signal of the operational amplifier 10 is input; 12 is an ignition circuit which uses the output signal of the phase control circuit 11 manually; 13 is an ignition circuit 1
The rotational speed of the variable speed device 2a, that is, the motor 1, is controlled by the thyristor whose output is selectively ignited. 14 is an automatic frequency adjustment circuit consisting of transformer 5 to thyristor 13; 15
indicates a frequency setter, and PI3 indicates a DC voltage.

仄に動作について説明する。周波数設定器15からの設
定値入力は抵抗7aを介して演算増幅器に入力される。
The operation will be briefly explained. The set value input from the frequency setter 15 is input to the operational amplifier via the resistor 7a.

また、発電機1の出力は、変圧器5を介して周波数検出
回路6に入力され、その周波数が検出される。この周波
数を示す信号は、抵抗Tを通して、設定値入力とは逆電
位で演算増幅器10に入力さnる。したがって演算増幅
器10の出力は、発電機10周波数と設定値入力との偏
差に比例した値をもち、これが最小値となるように位相
制御回路11および点弧回路12を介してサイリスタ1
3の点弧位相が制御さnる。すなわち、発電alllの
周波数が設定器15の設足値工りも高いときは、サイリ
スタ130点弧位相な遅らせて可変速装置2aへの電流
を減らすことにエリ発電機1の周波数を下げる。逆に発
電機10周波数が設足値エリ低い場合には、サイリスタ
13の点弧位相な進めて電動機1の可変速装置への電流
を増して発電機1の周波数な上げる。
Further, the output of the generator 1 is inputted to a frequency detection circuit 6 via a transformer 5, and its frequency is detected. A signal indicating this frequency is input to the operational amplifier 10 through the resistor T at a potential opposite to that of the set value input. Therefore, the output of the operational amplifier 10 has a value proportional to the deviation between the generator 10 frequency and the set value input, and is passed through the phase control circuit 11 and the ignition circuit 12 to the thyristor 1 so that this becomes the minimum value.
3 firing phases are controlled. That is, when the frequency of all power generators is high, the setting value of the setting device 15 is also high, the frequency of the electric generator 1 is lowered by delaying the firing phase of the thyristor 130 and reducing the current to the variable speed device 2a. Conversely, when the frequency of the generator 10 is lower than the set value, the firing phase of the thyristor 13 is advanced to increase the current to the variable speed device of the motor 1, thereby raising the frequency of the generator 1.

従来の自動周波数IN整装置は、以上の様に構成されて
いるので、外付きの周波数設定器が短絡筐たは断線な起
すと、その出力信号の値が異常となり、従って発電機の
周波数が変動し、停電やシステムダウンなどの重大故障
に発展する危険がある。
Conventional automatic frequency IN adjustment devices are configured as described above, so if the external frequency setting device is short-circuited or disconnected, its output signal value will become abnormal, and the generator frequency will therefore change. There is a danger that this may lead to serious failures such as power outages or system failures.

172:設定器の設定値は電圧レベルで調整装置に入力
されるので、外部ノイズの影響を受けやすいなどの欠点
があった。
172: Since the setting value of the setting device is inputted to the adjustment device at a voltage level, there is a drawback that it is easily influenced by external noise.

この発明は、上記の様な従来のものの欠点を除去する穴
めKなされたもので、設定値をパルス信号で出力する設
定器と、このパルス信号のパルス数をカウントして周波
数上げおよび下げの量を判別する設定値入力回路とを設
け、設定器が短絡したとき又は断線したときでも設定値
入力回路の出力により、その直前の周波数を維持する工
うにした自動周波数調整装置を提供することな目的とし
ている。
This invention eliminates the drawbacks of the conventional devices as described above, and includes a setting device that outputs the set value as a pulse signal, and a setting device that counts the number of pulses of this pulse signal to raise and lower the frequency. To provide an automatic frequency adjustment device which is provided with a set value input circuit for determining the amount, and is configured to maintain the previous frequency by the output of the set value input circuit even when the setter is short-circuited or disconnected. The purpose is

以下この発明の一実施例を図について説明する。An embodiment of the present invention will be described below with reference to the drawings.

第2図において、第1図と同一部分には同一符号な伺け
てあり、繰返しとなる説明は省略する。16は、演算回
路で、自動同期投入中や有効電力分担時など使用目的に
エリ、自由に図示していない外部装置との信号のやりと
りな行なうと共に、データ信号を発生する演算回、路で
、例えばマイクロプロセッサからなる。17は演算回路
16から供給されるデータ信号に従ってアップ又はダウ
ン舎カウントされるべきパルス17m及びアップ又はダ
ウン・カウントを指定する制御信号17b4出力する出
力回路、演算回路16及び出力回路ITは周波数設定器
18を構成する。19は計数器で出力回路17からのパ
ルス17a及び制御信号17bに従ってカウントをする
アップ轡ダウン・カウンタからなる。20は計数器19
のカウント内容をアナログ電圧に変換するディジタル・
アナログ変換器である。アナログ・ディジタル変換器2
0の出力信号は抵抗7aを介して演算増幅器10の反転
入力に入力さnる。
In FIG. 2, the same parts as in FIG. 1 are designated by the same reference numerals, and repeated explanations will be omitted. Reference numeral 16 denotes an arithmetic circuit which freely exchanges signals with an external device (not shown) for purposes such as during automatic synchronization or active power sharing, and also generates data signals. For example, it consists of a microprocessor. 17 is an output circuit that outputs a pulse 17m to be counted up or down according to the data signal supplied from the arithmetic circuit 16 and a control signal 17b4 that specifies the up or down count; the arithmetic circuit 16 and the output circuit IT are a frequency setter; 18. 19 is a counter consisting of an up/down counter that counts according to the pulse 17a from the output circuit 17 and the control signal 17b. 20 is counter 19
A digital converter that converts the count contents into an analog voltage.
It is an analog converter. Analog to digital converter 2
The output signal of 0 is input to the inverting input of the operational amplifier 10 via the resistor 7a.

つぎ忙動作について説明する。演算回路16は、与えら
れたデータからその時に必要とする設定値を演算し、そ
の演算結果にもとづいて出力回路11から、周波数上げ
又は周波数下げの方向を示す制器19は出力回路17か
ら送らf′1.たパルス17aを、周波数上げの場合、
即ち制御信号17bが1のときはアップ・カウントし、
また周波数下げの場合、即ち制御信号17bがOのとき
はダウン・カウントする。このカウント結果は、ディジ
タル・アナログ変換器20にエリアナログ電圧Kf換さ
れたのち、抵抗7を通して演算増幅器10に入力される
。演算増幅器10は、変圧器5お工び周波数検出回路6
な経由して入力さf′L7?:発電機1の周波数信号の
値と、ディジタル・アナログ変換器20から入力された
設定値との比較をし、両者間の偏差を検出する。以下、
前述のようにこの偏差が最小となるように発t[の周波
数を制御する。
Next, the busy action will be explained. The arithmetic circuit 16 calculates the set value required at that time from the given data, and based on the calculation result, the output circuit 11 sends a signal to the controller 19 indicating the direction of frequency increase or frequency decrease from the output circuit 17. f′1. When increasing the frequency of the pulse 17a,
That is, when the control signal 17b is 1, it counts up,
Further, in the case of lowering the frequency, that is, when the control signal 17b is O, a down count is performed. This count result is converted into an area-to-analog voltage Kf by a digital-to-analog converter 20, and then inputted to an operational amplifier 10 through a resistor 7. The operational amplifier 10 includes a transformer 5 and a frequency detection circuit 6.
Input via f'L7? : The value of the frequency signal of the generator 1 is compared with the set value inputted from the digital-to-analog converter 20, and the deviation between the two is detected. below,
As described above, the frequency of the output t[ is controlled so that this deviation is minimized.

以上のよう和、この発明に工れば、発電機の周波数に対
する設定値を計数器の出力で与える工うに構成したので
、安定しに設定値が得らn、従って装置の信頼性を向上
させ、かつ自動化装置とのインタフェースが容易になる
などの効果がある。
As described above, if this invention is implemented, the set value for the frequency of the generator is given by the output of the counter, so the set value can be stably obtained, and therefore the reliability of the device can be improved. , and facilitates the interface with automation equipment.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図に従来の自動周波数調整装置の回路図、第2図は
この発明の一実施例による自動周波数調整装置の回路図
である。 1.3・・・発′lII機、2・・・電動機、2a・・
・可変速装置、5・・・変圧器、6・・・周波数検出回
路、10・・・演算増幅器、11・・・位相制御回路、
12・・・点弧回路、13・・・サイリスク、14・・
・自動周波数調整回路、16・・・演算回路、11・・
・出力回路、18・−・周波数設足器、19・・・計数
器、20・・・ディジタル・アナログ変換器。 代理人 大岩増雄 (7)
FIG. 1 is a circuit diagram of a conventional automatic frequency adjustment device, and FIG. 2 is a circuit diagram of an automatic frequency adjustment device according to an embodiment of the present invention. 1.3...Star II machine, 2...Electric motor, 2a...
- Variable speed device, 5... Transformer, 6... Frequency detection circuit, 10... Operational amplifier, 11... Phase control circuit,
12...Ignition circuit, 13...Sirisk, 14...
・Automatic frequency adjustment circuit, 16... Arithmetic circuit, 11...
- Output circuit, 18... Frequency adder, 19... Counter, 20... Digital-to-analog converter. Agent Masuo Oiwa (7)

Claims (1)

【特許請求の範囲】 +11予め設定された周波数設定値と発電機の出力周波
数との間の偏差値を検出し、この偏差値に従って上記発
電機の出力周波数な制御する発電機の自動周波数vb整
装置において、上記周波数設定器に対応した数のパルス
を出力する設定器と、上記パルスなカウントする計数器
と、上記計数器の計数値をアナログ信号に変換して上記
周波数設定器を出力する変換器とを備えたことを特徴と
する発電機の自動周波数調整装置。 (21計数器はアップ・ダウン・カウンタから構成され
、設定器は周波数設定器を質更するときはその変¥竺に
対応したパルスを上記計数器のアップ又はダウンカウン
ト入力に供給することを特徴とする特許請求の範囲第1
項記載の発電機の自動周波数調整装置。
[Claims] +11 Detects the deviation value between a preset frequency setting value and the output frequency of the generator, and automatically adjusts the frequency VB of the generator to control the output frequency of the generator according to this deviation value. The device includes a setting device that outputs a number of pulses corresponding to the frequency setting device, a counter that counts the pulses, and a conversion that converts the counted value of the counter into an analog signal and outputs the frequency setting device. An automatic frequency adjustment device for a generator, characterized by comprising: (21 The counter consists of an up/down counter, and the setter is characterized in that when changing the frequency setter, it supplies a pulse corresponding to the change to the up or down count input of the counter. Claim 1:
Automatic frequency adjustment device for the generator described in Section 2.
JP12426783A 1983-07-07 1983-07-07 Automatic frequency regulator of generator Pending JPS6016197A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12426783A JPS6016197A (en) 1983-07-07 1983-07-07 Automatic frequency regulator of generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12426783A JPS6016197A (en) 1983-07-07 1983-07-07 Automatic frequency regulator of generator

Publications (1)

Publication Number Publication Date
JPS6016197A true JPS6016197A (en) 1985-01-26

Family

ID=14881102

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12426783A Pending JPS6016197A (en) 1983-07-07 1983-07-07 Automatic frequency regulator of generator

Country Status (1)

Country Link
JP (1) JPS6016197A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5157359A (en) * 1974-11-13 1976-05-19 Nippon Denso Co DENJITSUGITESEIGYOSOCHI

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5157359A (en) * 1974-11-13 1976-05-19 Nippon Denso Co DENJITSUGITESEIGYOSOCHI

Similar Documents

Publication Publication Date Title
EP0524398B1 (en) Circuit for controlling output current balance between parallel driven PWM-type power inverting units
JPS5943919B2 (en) Power factor control device for AC induction motor
US3753063A (en) Stabilizing means for an a-c motor drive
JP2524566B2 (en) Induction motor control method
US4488096A (en) Speed control for a rotary machine
US4634951A (en) Reduced voltage starter with voltage ramp control
JPS6146186A (en) Speed controlling method
US4593348A (en) Device for the generation of regulated and/or adjustable direct voltages or direct currents
US4628460A (en) Microprocessor controlled phase shifter
US4446414A (en) Terminal voltage limit regulator for a load commutated inverter
JPS6016197A (en) Automatic frequency regulator of generator
US3845371A (en) Motor controller with power limiting
Schierling Fast and reliable commissioning of AC variable speed drives by self-commissioning
JPH0328915B2 (en)
EP0203145A1 (en) Microprocessor speed controller
JP2576144B2 (en) Automatic voltage regulator for synchronous generator
SU714610A1 (en) System for automatic regulating of frequency-controlled induction motor r
JPH0323832Y2 (en)
JPS5928130B2 (en) Control method for reactive power regulator
JPS6159802B2 (en)
SU995250A2 (en) Method of automatic regulating of synchronous generator excitation
SU1145445A1 (en) Electric drive with pulse-frequency control
SU964936A1 (en) Device for regulating electric motor speed
SU855911A1 (en) Device for synchronizing dc electric motor speed
JPH0116397Y2 (en)