JPS6015955B2 - Information display control method for segmented display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Background of the Invention The present invention relates to a method and apparatus for controlling display when information in a processor reading device is divided into a plurality of mutually different information groups (hereinafter referred to as divided segments) and displayed. In particular, the present invention relates to a system for controlling the operation of a periodically updated segmented display capable of displaying information in a plurality of different modes.

Display systems that use display devices without storage capabilities, such as cathode ray tubes (CRTs), require external storage.

In this case, the information is read from the storage device in some predetermined sequence and used to update the display on the display device. There is usually one line between the character storage position of the storage device and the character display position of the display device.
There is a one-to-one correspondence. If multiple display devices are to be updated by a single memory, a separate and isolated memory location is required for each character that appears on each display device. Although the above-described system is suitable for a variety of applications, it may be useful, for example, when a particular unit of information, such as a news report or a stock market ticker, is to be displayed on multiple display devices updated by a single memory. The system required dual information storage.

If the data is displayed in a common location on all display devices, the above problem is solved by using suitable gating circuits. However, if a display with split segments is used and the user is given the option of displaying specific types of information in various different areas or segments of the display, memory optimization may occur. The issue of utilization becomes quite complex. Furthermore, the characters to be displayed on a given display device are typically recorded sequentially or
or at least the relative location in memory (i.e.
Since the characters are stored in positions separated from each other by a uniform number of characters, it was impossible to extract them from memory without using a specific clock for each position. can be distributed.

However, it is possible to store a segment of stored information at different segment positions on multiple display devices.
Or in the case of a split-segment display that displays at the same position, the information to be displayed on other segments of the display will be extracted from different memory segments during the same update of the display, but the display device It is no longer possible to order the memory in a way that would allow for sequential logical logic. Further, where a given information item can be displayed in different segment positions and in different modes, and where different information formats and information items can be displayed in different modes, it is possible to If the user is given the option of displaying information, there is no way to efficiently store the information needed for the various modes in any predetermined order.

Therefore, for regular segmented displays, and especially for multi-mode segmented displays, new approaches are needed to obtain information from memory and update the display.

This approach ideally stores one item of information in memory that should be displayed on one or more displays.
It is necessary to provide a great deal of flexibility in the allocation of areas or segments of memory in order to only be stored once and to control the display of information on one or more segments of the associated display device. .
Display devices of the type described above typically include a keyboard or other data entry device that allows an operator to request data from a given display segment, transform the data displayed on that segment, and so on.
It allows various editing, mode selection, and other functions to be performed. Also, a visible entry marker on the display typically indicates the location on the display where a new character appears or where an editing function begins. The control system stores the instructions regarding the position of the entry marker and uses the functions invoked by the keyboard with the instructions in the corresponding memory segment. start from the position specified. When attempting to change the table mode in a system of the type described above, a decision must be made as to the position in which the entry marker should be placed in the new table mode.
If the entry marker is always placed at the first character position in the first segment of the display, this determination is a relatively simple operation. However, there are also various types of information that do not require operator control. These forms of information are commonly referred to as common displays and include items such as news reports, stock market tickers, and other information originating from common sources. When selecting a new mode, a decision must be made regarding the entry marker to be placed at the first character position of the segment that contains the common display as well as the first segment that does not contain the common display.
If all segments are common segments, entry markers for specific operating modes will not be displayed. Furthermore, the operator is given the possibility to indicate the particular display format on which he wishes to place the entry marker. This function requires the system to have the ability to determine the type of display that appears in each segment and to position the entry marker at the first character position of the first segment or next segment that contains the desired type of information. must have the ability to do so. Additionally, applications may require one or more segments of the display to display a particular type of information. When connecting two or more segments for this purpose, for example when an entry marker is stereotaxically stratified (homed) or when other similar functions are performed, a chain of addresses ( It is necessary to take such a method that the system knows how to return to the beginning of the chained segment. Another problem that arises with multi-mode displays is the periodic updating of the information displayed in a given segment for a given mode.

In the case of common displays such as news reports, this update will continue to occur when appropriate changes are made to the storage segment containing this information, but in order to maintain memory can also be used to store different formats of information for different display modes. For example, if one of the forms of information, such as a stock quote, is updated periodically, this information can be withheld and updates of this information continue during periods when the information is not displayed. It is desirable to do so. However, if a particular memory segment is being used to display a different type of information in the newly selected display mode, the memory segment must be cleared and the update function disabled. It is therefore necessary to provide means to perform these functions. Finally, it is necessary to provide the operator with the ability to change the format or arrangement of information displayed in each of the various modes.

Therefore, the system must have the ability to respond to mode change requests and to perform the necessary memory updates. While the above requirements are particularly necessary for display devices that are updated periodically, operations that display multi-mode segmented information require different requirements as well as for other processor display devices. It is said that

Therefore, in the following description, the term display should be applied generally to processor implementations. SUMMARY OF THE INVENTION A principal object of the present invention is to provide a new approach to controlling the display of information in segmented displays, and in particular to the control of multi-mode segmented displays.

It is another object of the present invention to allow each item of information to be displayed to be stored in memory only once, and to provide as much flexibility as possible in allocating memory segments for storing information to be displayed on a given display device in a given mode. I'm trying to find a solution that will help.

It is also an object of the present invention to obtain an approach of the above type that allows entry markers to be placed in segments containing information of a desired type and prevents the placement of entry markers in common segments. It is in.

Furthermore, another object of the present invention is to display common information;
The object is to create a system in which two or more segments can be chained together and such chaining can provide the various controls required. Still yet another object of the present invention is to enable the memory segments to be used to store information in various formats for various different operating modes of a given display device, as well as in any format suitable for storing. When displaying information in a mode that does not require the use of memory segments, it is desirable to have a system that allows the information to be saved or further updated as needed.

Still another object of the invention is to provide a system of the above type in which the operator can change the format and arrangement of the information to be displayed in each of the available modes.

Therefore, the present invention provides a system for displaying a plurality of different information segments on a periodically updated display device, such as a cathode ray tube (CRT).

In order to store a plurality of segments of information, the present invention provides addressable memory means and includes suitable means for storing the memory address of the currently displayed segment. The contents of the selected segment of memory are retrieved to update the segment of the display device. When the update by a given memory segment is completed, the address stored in the memory address storage means is used to determine the address of the selected memory segment to be used to update the next segment of the display device. The memory address storage means stores the address of the segment currently displayed on each of the plurality of display devices. Additionally, the invention includes means for storing, for each display device, the memory addresses of the segments to be displayed in each of the various modes. When a new mode is selected by the appropriate mode selection means, the memory address of the segment for the newly selected mode is placed in the position for the given display device within the means storing the memory address of the currently displayed segment. The car is sent away. The present invention also provides an entry marker display to indicate the display position where new information should be displayed or where an editing function should begin. When a new mode is selected, a determination is made using appropriate means about the first segment of the new mode that is not a common segment, and an indication of the memory address of this position is stored in the appropriate means. and means for determining, when there is a mode change, whether any memory segment used to store information in one or more modes contains information from a previous mode to be saved; Furthermore, means are provided for determining whether the segment containing the saved information should be used in the new mode. If the segment is to be used in a new mode, a means is provided to clear the segment. The method also includes means for indicating segments containing relevant information, said means including means for indicating beginning and ending segments of the chain segment containing relevant information.

Finally, means are provided for generating a form on the display to set the new mode, and further for generating various segment address instructions and information format instructions necessary for the new mode, and for storing these instructions in suitable storage means. have means to do so. DESCRIPTION OF THE PREFERRED EMBODIMENTS Display FIG. 1 shows a standard display that may appear on a cathode ray tube screen or cathode ray tube display employing the present invention.

The particular display shown is for a stock market information system. For purposes of illustration, the following description will be made primarily with reference to this type of system. FIG. 2 shows a format diagram of the first graphical display. As is clear from Figures 1 and 2, this display format uses three lines to display the New York Stock Exchange (NYSE) ticker.
Three lines are used for the American Stock Exchange (ASE) ticker display. After the 3-line intersegment space (ISS), there is 6 market information regarding specific stocks.
line, followed by another 3 lines ISS, followed by 6 lines of management information either generated on the display itself for internal system storage, or management information generated on any other terminal of the user system. continues.

The last six lines can also be press information from a newspaper reporting service. As can be seen in Figure 2, each line of the display is typically 40 characters wide and extends from the character 5 position to the character 44 position, but there is a maximum dwell time on the display for the varying ticker. ), we use a full set of 48 characters for each ticker. It is formed by selectively intensifying one of the seven index points that appear on each of the five strokes outside each character in the first illustrated display.

That is, it is formed by a 5x7 matrix of 35 index points outside each character. Each line is formed with the number of strokes required for a predetermined number of characters. Regarding the above-mentioned type of character generation circuit, please refer to March 1, 1971.
R.D. Belcher (Mr. R.D. lch.
er) et al., US Pat. The display comprises an entry marker 10. This mark is formed by intensifying all 35 index points for a given character position. The entry marker indicates a character position on the display at which a new character received by the system is stored and displayed, or at which a desired editing function is initiated. Entry markers are detailed below. As will become clear in the following description, the 24 lines of the display shown in FIGS. 1 and 2 are divided into eight 3-line segments.

For the display format shown in Figure 2, the first three-line segment displays the NYSE ticker and the second
The 3-line segment displays the ASE ticker and the 3rd line segment displays the ASE ticker.
The three-line segment is an ISS segment that includes a flank line followed by a line containing a dot display and a blank third line. The 4th and 5th segments are for market price display, the 6th segment is for ISS, and the 7th and 8th segments are for management information system (hada S).
Use each for information. The format shown in Figure 2 is only one of various formats or modes that utilize eight segments of the display.

In the format shown in Figure 3, the first three segments are used in the same way as in Figure 1, but the last five segments of the display are combined to form a 15-line area for displaying skin S information. It is connected. In the format shown in the fourth diagram, 8 of the display is used to display skin S information.
All of the segments are chained together, and in the format shown in Figure 5, instead of the 48-character ticker and display in the first two segments, there is a regular 40-character, 6-line (2-segment) area, such as market information or plate S. It can be used to display shape information. In addition to changing the segment groups or segment areas for different modes, the information displayed by each segment of the display can also be changed for different modes. That is, in a display such as that shown in FIG.
The segment group contains MIS information, but the second
In this mode, skin S information is placed in the first segment group.
It is also possible to display market price information in the first format in the second segment group and display news information in the third segment group. The display can thus be provided with almost unlimited possibilities of modification due to the available display modes. Hereinafter, methods for generating and controlling these various modes will be explained. GENERAL DESCRIPTION FIG. 6 shows a general system circuit diagram of an embodiment according to the invention.

The system is used to control the operation of a plurality of terminals 12 comprising a display device 14 and a keyboard 16. Each of the displays 14 is suitable for displaying information of the type shown in FIGS. 1-5. Information for controlling and updating the display on each display device 14 is contained within a random access memory 18, such as a magnetic core matrix array, which is divided into a number of regions. Some first address positions of said memory are located on the keyboard 16.
or any other external device. The second group of memory segments are control segments 18B, with one control segment 18B for each display device 141. Details of the control area for this type of device are shown in FIG. In FIG. 6A, the control segment area for each device includes an area 20 containing the segment address in memory 18 for the segment being used to update each of the eight segments of the display for a given device. . control area 1
The area 22 of 8B is usually only one word and contains the position indication of the entry marker 10 including the segment area of the marker. Area 24 includes a keyboard indirect jump address (KIJA) and various save words. The functions of the words in this area will be described later. The control segment area 26 includes various screen format words for displaying the type of information within each segment for various modes of operation of the display device. Field 28 contains segment addresses for all four modes of the display device. The segment address for one of these modes also appears in area 20. Segment 18C of memory 18 is a common segment containing items such as tickers, news reports, etc.

The information in these segments can only be displayed in one format on any display device and cannot be changed to another format. The remaining segment of memory, i.e. segment i
Reference numeral 80 denotes an operating segment, which is assigned to each individual display device and contains market information, MS information, or other information to be displayed on the device. Information in memory 18 is retrieved under the control of address signals received on lines 30 from memory address circuitry 32.

Address information is provided from OR gate circuit 36 to circuit 32 via line 38. The OR gate circuit 36 receives information from the control unit 40 via line 38 as well as
Information is received on line 42 from word counter 44 and segment number register 46. The four control units have various processing functions and provide various addresses and information outputs to the memory 18. The control unit 40 is typically a program controlled special purpose processing unit or a general purpose processing unit. control unit 40
A special purpose unit for accomplishing some of the required functions is shown in FIGS. 15A and 15B and will be discussed below. Each addressable position in memory 18 typically has a word address divided into two characters.

The system includes a display clock circuit 48 (see Figure 6B). This circuit synchronizes the speed at which the display device 14 moves the display character position;
A character clock counter 50 which is normally reset to 0 when the count 40 is reached, a line which is incremented by the line clock via line 53 when the character counter is reset to 0, and which resets itself when the count 24 is reached. It includes a clock counter 52 and a segment clock counter 54 which is incremented by a segment clock signal on line 55 each time the line clock counter is reset to zero. When the segment clock counter reaches a count of 8, it resets itself to 0. Additionally, N devices are being scanned for each character count. Therefore, a device clock line 56 is provided to increment a device clock counter 57. The counter 57 is set to IJ when it reaches count N (N being the number of terminals in the system) and generates a character clock on line 51 when the counter is reset. The device clock appears on the output line 601 from the counter 57, and the character clock appears on the output line 601 from the counter 57.
The line clock appears on output line 62 from counter 52, and the segment clock appears on output line 66 from counter 54. Instead of connecting the various clock lines to the points of use in the circuit, numbered and labeled lines appear at each of these points. Character clock line 51 is connected to a divide-by-two circuit 68 through which line 7 is generated as a word clock.

The word clock on line 70 is applied to word counter 44 and increments it. Word counter 44 counts each segment 18C or 18 being displayed at any given time to update display 14.
It has the function of indicating the word position in D. Register 46 contains the segment address in region 18C or 18D of memory 18 of the segment being read at any given time to update the display of the corresponding device 14. One segment register 46 is provided for each device. A suitable one of the device clocks 60 is supplied to each of the registers 46 to control the output on line 42. Thus, during device clock time 1, the initial contents of register 46 are on line 42.
The word displayed in register 44 of the address segment causes the memory 18 to be retrieved. When all of the words for the segment represented by the addresses in register 46 have been read, control unit 40 generates a control address on line 38, indicating the next segment address in control segment area 20 for each display device. is output via line 72 and supplied to the appropriate register 46.

The control unit also generates a signal on line 74 at this time to enable gating circuit 76 to pass these address signals. Thus, the address of the memory segment used to control the display on the segment of each display device 14 being updated at any given time is stored in the device's register 46. memory 18
The words read from segments 18C and 18D are provided to character generator 84 via line 80 and buffer and control circuit 82.

Buffer and control circuit 82 is responsible for presenting two characters during each cycle and providing the appropriate one of these characters to the character generator at any given time. The character generator 84 is, for example, a 7-bit A
This comprises any one of a variety of devices capable of receiving information in a transmitted, stored code, such as a SCII code, and converting the received characters into the necessary 35-bit video characters for display. be able to. The video output code derived from character generator 84 on line 86 is applied via OR gate circuit 88 to multiplex control circuit 90. The control circuit 90
Also includes an input device clock line. Circuit 90 serves to supply each character generated by generator 84 via transmission line 92 to display device 14 to control the display on the appropriate device. As information is read from memory 18 under the control of address inputs from control unit 40 on line 38, the information is stored in memory data register (MDR) 94 via line 93.

The information in the MDR 94 passes through the control unit 40 or
It is rerecorded into memory 18 via line 95 under the control of control unit 40 . Unit 40 also stores information in memory 18 by supplying information to MDR 94 via line 97 . As previously mentioned, the control segment 18B for each device includes an area 22 with an address where an entry marker is placed for the given device.

During the frame period of each display device update cycle, the contents of area 22 for each device are read via line 96 into the associated register of entry marker register 98. The contents of register 98 are compared within circuit 100 with the clock signal from circuit 48. Circuit 100G generates an output on line 102 when the clock indicates that the display for a given device is in a position containing the entry marker for that device. This world power triggers the special character generator 104 to
An entry marker symbol (a video code that energizes all 35 index points to reveal the first graphical mark) is generated on 6. The signal on line 106 is O
Multiplex control circuit 9 via R gate circuit 88
0 and distributed to appropriate display devices.
Keyboard FIG. 7 shows the keyboard layout for the keyboard 16 shown in FIG. Key group 114, fraction key group 116, four mode selection keys 118, MIS function key 120, market price function key 122, mode setting request key 124, mode setting transmission key 1
26, Attached keys for other special functions 128, Clear key 13
0, a home key 132, a transmit key 134, a print key 136, and a monitor key 138.

Pressing any one of these keys causes transmission line 140 (
68) and appropriate code to interface with the control unit 40 via the appropriate 1/0 interface unit 142. The use of these various coded inputs to control unit 40 will be discussed below. Detailed Description of Memory Contents FIGS. 8A and 8B are diagrams showing the contents of control portion 18B of memory 18 for a given display device.

As can be seen, the first four words of this area contain the two segment addresses in memory 18 for the segments containing the information being displayed at the indicated segment positions on the display device. The first control word therefore contains segment addresses of information to be displayed for the first and second segments of the display device. For the first illustrated display arrangement, segment 1 includes a segment address within common segment area 18C where NYSE ticker information is stored. The segment 2 address is an address within the common segment address area 18C of the segment containing ASE ticker information. The address in the first character position of the second control word is the address of a segment containing intersegment space (ISS) information. Since segment 6 of the display also contains ISS information, the memory segment address at the second character position of display control word 3 is similar to that of the first character of the second control word. The first 4 words shown in Figure 8'
This is a word in area 20 shown in FIG. 6A. Character numbers stored in registers 46 for the device are derived from these words. Display control word 5 contains the address of the display on which entry marker 10 is to be displayed.

This address includes the display segment address, display bit address, and display word address. The fifth display control word corresponds to area 22 shown in Figure 6A. It should also be noted that the display control word also includes five bits which are used to indicate the nature of the indicator galaxies to be displayed at a given position on the display. This character flashes to tell the operator that some change has occurred either in the on-screen display or in the display for one of the other modes.
The characters contained within these bits can be changed to change the character displayed at this predetermined position on the display. The next word, the sixth word in the control area, is the keyboard indirect jump address (KIJA).

The function of this word will be explained later. The next word in the display contains two characters that are segment save addresses. The functions of these characters will also be described later. The sixth and seventh words of the display correspond to area 24 shown in FIG. 6A. 8th control area
, the ninth, tenth and eleventh words are screen format words.

The first character of each of these words is used to indicate the type of information stored in each of the two segment areas of the display for each of the four possible modes of the device's display. Assume for the purposes of this invention that there are only three types of functionality:
i.e., common features such as tickers and news reports that are the same for all displays and cannot be changed by the operator; There are three types of display: a market information type display that does not allow for the possibility of change, and an MIS type information type that is completely under the control of the operator. Two bits are used to indicate the type of function displayed in each of the three two-segment groups for each of the four modes.

In addition, the second character of the first screen format word includes a screen format word for the currently visible mode of the display (hereinafter referred to as the current mode word), and the second character of the second screen format word Contains the screen format word for the mode (hereinafter referred to as the Prepierce mode word). The four screen format words form area 26 of memory shown in Figure 6B.

The last control region of the control portion of the memory for a given device, region 28, contains four display control words for use in each of the four possible modes of the display device.

As will become clear later, when a particular mode is selected for display, the words for that mode contained in area 28 of memory are transferred to four word positions in area 20. FIG. 9 shows the first two words of each operating segment in area 180 of memory 18.

These words are used for control purposes. The first of these words contains a display segment pointer (bits 1-3 of the first character) indicating the relative positions of the eight segments displayed for the selected mode. The second character of this word contains an entry marker position indication within the segment. Note that this information needs to be stored within the operating segment. After all, the operator may be ``working on different display segments,
This is because the user may be working in a different mode than the memory segment, and only the entry marker address in area 22 of memory contains information regarding the entity IJ-marker position for the segment currently being worked on. When the operator indicates that a display entry marker is within a predetermined segment, the stored entry marker address is used to obtain the address stored in area 22 of memory. The second word of the segment contains information for the first character position and bits 1-4 of the second character position.
information (irrelevant to the present invention).

Bits 7 and 8 of the second character are the first and last segment bits used to chain each segment together in a manner described below. Bit 6 is an A-disabled control bit, which is used to inhibit the update of the market information/MIS information type segment when the segment is used for the MIS function. Bit 5 is not used in connection with the present invention. GENERAL DESCRIPTION OF OPERATION FIGS. 10A and 10B are flowcharts illustrating the various functions performed when various keys on keyboard 16 are pressed.

10A and 10B, it is assumed that the operator first presses alphanumeric key 110, 112 or edit key 114, 130, 132, 136 or 138. In such a situation, the system branches from step 150 via step 152 (FIG. 10B) to step 154. Control unit 40 detects that the edit key or data entry key has been pressed.
Once determined, the unit determines the address of the current mode word for the device that issued the request, the address of the entry marker address portion 22 for that device, and the addresses of other control words as appropriate. Unit 40 then produces an address output on line 38;
These characters are extracted from the memory via line 93 to the MDR 94 and finally the required word is retrieved from the MDR 94 and stored in the appropriate register in the control unit. It should be noted in this regard that the character may be allowed to access memory 18 at the rate necessary to update display 14, typically at a rate of about 1 pep.
It is thus possible to access a large number of memories for various controls and other functions between each access to memory under the control of line 42 for the purpose of updating the display. The control unit then decodes the received input functions (step 156). In step 158, the control unit uses the retrieved function word (ie, the current mode word) to determine whether the requested function is a valid function for the segment type in which the entry marker is located. For example, if the current mode word indicates that all segments are common segments,
All data entry or editing functions are disabled. Similarly, any attempt to edit text within a quote segment will be recognized by the system as invalid input. If the control unit determines that the data entry function is disabled during step 158, the system ignores the input (step 160). During step 160, the control unit stores memory 18 for the display of the requesting device.
sends an error message to If the requested action is valid, the system proceeds to step 162.

During step 162, a determination is made about the segment containing the entry marker. This determination is made based on entry marker information retrieved from portion 22 of the memory control area. The control unit then proceeds to the appropriate microprogram to perform the requested function (step 164). The function may be performed in standard manner and the acts necessary to accomplish this step do not form part of the invention. For example, the function is key 130 (7th
Clear function required by (see figure) or key 1
Some such functions require microprogram execution functions to be performed within one or more segments of a chain of two or more segments for display purposes, such as the home entry marker function required by I.32. The following functions can be considered.

Thus, during step 166, the system performs a test to determine whether the function is of a type that includes one or more segments. If the function is of this type, when the active microprogram reaches the end of the segment, the control unit will register bit positions 7 and 8 of the second control word in each segment.
The chain bits in are used to determine whether all of the required segments in the chain have been seen (step 168). If all segments in the chain have not been seen, the system returns to step 164 where the control unit (CU) continues to perform the function of the next segment. Step 166 indicating that only one segment is included
If the control unit determines that the function is indeed complete, either as a result of an indication during step 168 or as a result of an indication during step 168 that all segments are visible and the function is complete, the system proceeds to step 170. .

During this step, the control unit determines the position of the new entry marker as a result of the performed function and stores this address in the control unit entry marker register and then stores the entry marker word in area 22 of memory 18. and the first word of the active segment or the segment included in the active. When more than 10 segments are included in the operation, step 170 includes:
This includes the operation of deleting the entry marker from the segment that initially indicated the presence of the entry marker and giving an entry marker instruction to the new segment to be placed. Upon completion of step 170, the control unit has completed the necessary operations by pressing the data entry or edit keys and is ready to accept new input. If it is determined as a result of the key press step 150 that the skin S key 120 or the market information key 122 on the keyboard N has been pressed, a YES output appears from the function key press step 174 (FIG. 10A).

When the MIS key 120 is pressed, it is desirable to move the entry marker to the home position of the IMIS segment following the segment where the entry marker is currently located. Similarly, when the market price key 122 is pressed, it is desirable to move the entry marker to the first segment containing market price format information following the segment in which the entry marker is currently located. In order to achieve the above function, the first step of operation is:
Step 176 includes section 26 (eighth section) of memory 18.
(see Figure A) into the registers of control unit 40.

As previously mentioned, this is a two step operation that includes reading the word into MDR 94 and transferring the word from MDR 94 to control unit 40. The next operational step, step 178, is to perform the function (i.e., skin S
or the market price).

Next, the control unit 4 starts from the segment following the segment where the entry marker is currently located.
Scan the current mode word in 0 to find the next display segment for the desired function (step 1
80). The details of this step will be discussed later, but basically it involves starting with the segment following the segment where the entry marker is currently located, looking at the 2-bit code in the current mode word for each segment, and entering the desired code. selecting a first segment having a first segment; If there is a desired segment, the home position address for this segment is determined by the control unit and the new entry marker address is stored in area 22 of the control area for the device (step 182).

As can be seen in FIG. 8A, area 22 is the fifth display control word, which is a word that identifies the position of the entry marker. Additionally, during step 182, the pointer in the first control word of the segment that originally contained the entry marker has the entry marker moved to its home position, and the entry marker of the segment to which the entry marker is moved The marker control word also points to the home position. When these operations are complete, the system is ready to accept new keyboard input. Now, here 4
It is assumed that one of the three mode keys 118 (see FIG. 7) is pressed.

Pressing one of these keys attempts to change the display mode for the device. The four modes are, for example, those shown in FIGS. 2, 3, 4, and 5.

Thus, if the display is initially in mode 1 with a display of the type shown in the second illustration and the mode 2 button is pressed, the mode of the display will switch to the mode shown in the third illustration. In FIG. 10A, when it is determined from step 15 that the mode key has been pressed, step 19
YES output appears from 0.

During step 192, the display word for mode M in area 28 of the control segment for a given device is transferred to area 20 of memory, the current display control word area. During step 194,
The current mode word in the first screen format word of area 26 in the control area for a given device is transferred to the previous mode word position in the same area, and the corresponding screen format word (e.g. mode 2 screen format word) is transferred to the current mode word position. Thus, steps 192 and 194 establish the memory control area for the new display mode. As previously mentioned, a given memory segment of operating memory 180 may be used for different display modes.
It is used to store market price information or skin S information.

If this area is used to store market information, the system stores the market information during periods when no market information is displayed so that the most recent information is displayed when the market display mode is selected again. Although it is desirable to continue updating the stored information in response to changes in the S-segment, this is only possible if the segment is not being used as a skin S-segment for a new display mode. Step 196
In between, the system indicates that the previous mode word contains a quote segment and stores the address of the segment in parentheses in area 29.
A test is performed to determine whether one of the two save addresses in the second word of . The system is then tested to determine whether a certain segment of the storage address is being used for current mode MS information storage, and whether the current mode word is used to make this determination. If the segment is being used for the current mode of MIS, the segment is cleared and the A2 bit (see FIG. 9) in the segment's second control word is marked to inhibit updates. Details of these operations will be described later. During step 198, a decision is made as to the number of segments to be chained in the new display mode, and the chaining bits, ie bits 7 and 8 of the second control word within each segment, are Correctly marked to indicate relationships.

The final step of mode change operation, i.e. step 20
0 includes determining the position for the entry marker in the new mode and storing the new entry marker position indication.

This essentially involves locating the first non-common segment of the display and storing the home position address of this segment in area 22 of the control area for memory. The pointer bits in the control words of the various segments are also set to point to the correct address. Upon completion of step 200, the system is ready to display the new mode information. Display Operation FIG. 11 is a flowchart showing the divided display control operation of the system of the present invention.

As can be seen in FIG. 11, at segment X clock time (box 210), the segment X address in display control word area 20 for each device is retrieved into the corresponding segment register 46 (step 212). Therefore, when X is 1, each control region 1
The segment 1 address in the 8B first control word is exposed in the associated segment register 46. The process then proceeds to step 214 while each of the displays 14 is updated with the segment 18C or 18D indicated in the segment register 46.

Therefore, if device 1 has a NYSE ticker displayed in its first segment as shown in FIG. One character is read and the video code for this character is distributed via multiplex control circuit 90 to display 14D. If the second display 14B is also displaying the NYSE ticker in its first segment, then during device 2 clock time the same ticker character is displayed and its video code is provided to the display 14B. As the first and second characters for each display 14 are presented and updated on the display, the counter of word counter 44 is incremented and the second word for each segment indicated by register 46 is sequentially decoded. It can be done. During this operating sequence, the display clock from clock circuit 56 is compared in comparator circuit 100' to the entry marker position indicated in register 98.

Comparator circuit 100 produces a positive output on line 102 when the clock count is the same as the count for a stored entry W marker position and is not for a segment displaying common information such as the NYSE ticker. This output is equivalent to the YES output from box 216 in the flowchart. This is a special character generator 1
04 results in the display of the entry marker (step 218). Resulting entry marker code (all 35 bits activated)
is applied to the designated device screen via an OR gate circuit 88 and a multiplex control circuit 90. The marker 10 shown in the first diagram is generated in this way. At the same time, the system tests to determine if the end of the segment has been reached (step 220).
).

clock circuit 56 is directed by its character;
and when the line clock counts that the end of the segment has been reached, control unit 0 produces an output on line 74 and provides an address signal via line 38 to memory address circuit 32 to determine the next segment for each of the devices. The address is stored in register 46. × is step 2
22 times N (where XN is the last segment, in this example segment 8), the segment address is simply incremented (
Step 224). Therefore, if x is initially 1 and then increases to 2 during step 224, the system returns to step 212 to update each display device with a new segment, eg, segment 2. Retracing each line on the display screen requires approximately 6 character times. Therefore, to transfer new segment information from memory 18 to register 46, a 6 character display time is required.
Or approximately 60 memory cycles are available. Therefore, this transfer can be performed without delaying the display in the middle. During step 222, ×
is determined to be equal to XN (e.g., the eighth segment of the display is updated), then X
26 to be equal to XO (ie, in this example, X is set to 1), and the system returns to step 212 to begin updating the new frame of the display.

It can thus be seen that means are provided for periodically updating the display of the split display with information derived from the various segments of the memory.

The segments used to update the display of a given device need not be contiguous and, in fact, may be independent of each other, since the segments are read randomly from memory at addresses pointed to in control registers. It's okay. Also, the same segment can be used to update one or more segments (ie, an ISS segment) of a given display, or the same or different segments on various display devices can be updated during a given frame. Thus, a highly efficient and flexible display system can be provided. Mode setting operation FIG. 12 is a flowchart showing the operations necessary for mode setting.

Mode setting occurs under one or two different conditions.
The operator first makes initial mode setting assignments to select information to be displayed on the display device in four different modes. After some time has elapsed, the operator decides to change the displayed information or format for one or more display modes. Under this second condition, the operator changes the mode settings.
Since the operations regarding initial mode setting assignment and mode setting change are almost the same except for the mask used, the operations under these two different conditions will be described together below. In FIG. 12, if mode setting is desired (step 221), the entry marker is moved to the MIS field (step 223).

If the entry marker is not located in the MIS field, this can easily be done by pressing the MIS key on the keyboard (see Figure 7). If the first field on the display is an MIS field, this is also possible by pressing the home key 132.
When the entry marker is within the skin S field,
By pressing the mode setting request key 124, a mode setting mask is requested from the control unit.

The mode setting initial assignment is 13th in case of 3 tab points.
The shape is as shown in Figure A, giving on each of the four lines one for each of the three possible segment areas of the memory. Each line represents a different mode of the display. The abbreviations to the right of the mask indicate the five different types of information displayed within the segment. The code TKR written on one of the tab points causes the segment area to display the NYSE ticker and the ASE ticker. This is the information displayed in the first segment of FIG. The code NEWS at the tab point causes the news to be displayed in the corresponding segment. 1 in the system
If more than one coverage is available, additional code is required to allow the operator to select the particular service desired. The skin S has the meaning as described above, and information in this format is displayed in the selected segment area. QTE means market information, and SWI means stock monitoring. In the case of stock monitoring, a ticker like a display is generated for a single stock indicating only the stock price related to a predetermined number of latest transactions or either the stock price and trading volume. For the system,
It is of course possible to provide the ability to select other formats of information to be displayed in each segment, and it is also clear that there will be different formats of information that can be used for uses other than the stock market. Figure 13B is the second
5 shows how a mask filled with modes 1 to 4 of the type shown in FIGS. When the system is making a mode setting change rather than a mode setting initial assignment, the reverted mask will be the 13th mark if each item is currently displayed in each of the indicated segments.
It will look like figure B. Even though there are eight segments on the display, the mask provides space to show the contents of only three segments. This is because in the embodiment of the present invention, segments 1 and 2, 4 and 5, and 7 and 8 are always connected. 2 of these segments
Except when two adjacent groups contain MS information,
Segments 3 and 6 are always ISS segments.
When adjacent segment groups include skin S information as shown in FIGS. 3 and 4, the ISS segments between these segment groups are replaced with MIS segments. Therefore, the three segment designations given to the mask are suitable for fully characterizing the display. Once the mode setting mask is displayed on the screen, the operator can fill in all blanks if making initial mode setting assignments, or fill in selected fields if making mode changes. The desired item is changed (step 227).

In the latter case, the user tabs each item to be changed, presses a plus sign in front of the field to identify it as a change, and then presses the new segment type identification mark. When filling the mask or changing the mask is completed, the operator visually confirms that the actual key presses have been performed as desired (step 228), and then presses the mode setting transmission key 126 (step 23).
0). This step transmits the mask to a large central processing unit that generates segment assignments, screen format words, etc. for the new mode, and then returns the mask to memory 18 for storage. However, in the illustrated embodiment, control unit 40 includes circuitry to perform these functions, so that upon pressing key 126, control unit 40 performs various checks to ensure that all display segment assignments are in accordance with protocol. (Step 232). If the control unit determines that the mode setting is incorrect, the control unit blanks out the erroneous data and recreates the display on the first device. Thus, the operator can re-enter the correct data. If the control unit confirms the mode setting, it generates the required screen format words and stores these words in memory area 26, and generates various mode display words and stores them in memory. A routine operation of storing the data in the area 28 is performed (step 236). In addition, the control unit also performs “mode selection acceptance”.
ionaccepted)" or an acceptance message appears on the screen of the mode setting generator. Upon completion of step 236, all information necessary for the new mode setting is stored within the system and the system resumes normal operation. .FUNCTION KEY OR MODE KEY INPUT OPERATIONS Figures 14A-14 are taken together to form a detailed flowchart of the operations that occur when a function key or mode key is pressed.

As can be seen in Figure 14A, when a determination is made that a mode or function key has been pressed,
First, a determination is made whether it is a mode key or a function key (step 240). It is assumed that one of the two function keys 120 or 122 on the keyboard is first pressed. Under these conditions, operation proceeds to step 242 during which the current mode word is retrieved from area 26 of memory 18 to the appropriate register of control unit 40. This is the same as step 176 in FIG. A determination is then made as to whether the pressed function key was the quote key 122 (step 24).
4). Here, if the function is market information, 1 bit is set in the control unit register (step 246). If, during step 244, the control unit determines that a MIS function rather than a market function is requested, step 246 is bypassed and the system proceeds directly to step 248. During step 248 a decision is made as to which segment to check first.

As will be seen shortly, two bits are stored in the last two bit positions of the control unit register storing the current mode word indicating the segment to be checked first during entry marker position determination. The next instruction segment to be checked is the first
Suppose it is a segment. Under this condition, the system proceeds to step 250A during which a determination is made as to whether the first segment is common. This is done by checking the code for the first segment in the control unit register storing the common mode word. If the first segment is common, such as when a ticker is displayed on the first segment as shown in the first illustration, the system branches to step 252A to determine whether all segments have been checked. do. If all segments have been checked, such as if the first segment checked was the second segment, step 252A generates an output that returns the system to its normal job control program. If an indication occurs during step 252A that all segments have not yet been checked, as is the case in this example, the system branches to step 250B to check whether the second segment is common. do. If the second segment is common, the system branches to step 252B to check again whether all segments have been checked. If all segments were checked, the system will retry its job control program. Returning to the program, if all segments have not yet been checked, the system proceeds to step 250C and determines whether the third segment is common. If the third segment is common, the system branches to step 252C to generate a signal that returns the system to the job control program, or returns the system to step 252C.
Branch to 0A. These steps 254 are illustrated only with respect to the first segment, since the steps 254 of determining the segments containing the desired functionality are similar except for rotating items, regardless of which segments are found to be non-common; Let me explain.

The description regarding the first segment can be similarly applied to the remaining segments. If the first segment is not common, the system branches to step 256A to
Determine whether the segment is a quote. This is again determined from the 2-bit code for the first segment portion of the stored current mode word. Step 2
Regardless of whether the answer to 56A is YES or NO, the next operational step is to determine whether a mode key has been pressed (step 258A or step 260A). The reason for this is that, as we will see, the functions required by flock 254A are performed not only at the end of the required operation when the mode key is pressed, but also when the function key is pressed. be. Assuming that the function of segment 1 is quotes and the mode key is not an input, the next operational step is to determine whether the desired function (i.e., the pressed function key) is quotes. (Step 2
62A). If the segment contains quotes and the desired feature is not quotes, the system returns to step 252A and either stops operating or continues to check the next segment. If the requested function is quote information, the system proceeds to step 264A and stores the quote information at the KIJA address in area 24 of the control portion of memory for the given device. If during step 256A it is determined that the function stored in the first segment is not a quote function, then the function should be a skin S function.

This is because the system has only three functions: common, market price information, and skin S, and it has been determined that the segment is neither common nor market information. Under these conditions, the system performs step 260A.
The process branches to step 266A, and it is determined whether the pressed function key was the MIS function key 120. If this key has not been pressed, the system returns to step 252A to either return to the normal system job control program or proceed to check the next segment. If the requested feature was skin S, the system proceeds to step 268A and
Store the MIS instruction in the JA address. The system proceeds from step 264A or step 268A to step 270A.

During this step, a pointer is stored that indicates the segment in which the entry marker is to be located. The system then proceeds to step 272A during which step the last two bit positions of the register storing the current mode word if there is a first segment to be checked the next time step 248 is performed. Segment 2 is designated. As previously discussed, except for the circle numbers 1 and 2 in steps 270A and 272A, the operation of box 2548 and box 254C is similar to the operation of box 254A.

In box 2548, the cycle numbers are each one greater, and in box 254C, the number for step 270C is three and the number for step 272C is one. System A steps 272A, 272
B or 272C leads to step 274, during which a determination is made regarding the memory address of the segment containing the entry marker.

During step 276, the entry marker is moved to the home position of this segment, and during a subsequent step 278, the entry marker is moved to the home position of this segment, and during the subsequent step 278, the entry marker is moved to the home position of this segment.
The determined new entry marker is stored in both the control word entry marker position and the control word entry marker position for the segment in which the entry marker is currently lit. Also, the entry marker is moved from the position it was previously located at. Upon completion of step 278, the system returns to its normal job control program. If, during step 240, a determination is made that one of the mode keys 118 has been pressed, the system branches from step 240 to step 280 (see FIG. 14B).

During step 280, the current mode word in area 26 of memory 18 for a given device is transferred to the previous mode location. As can be seen in Figure 8A, this moves the word down one word position. The next operational step (step 282) is to determine the new mode word address.

This is the address of the screen format word for the new mode selected. During step 284, the determined new mode word is retrieved from storage, stored in MDR 94, and transferred from MDR 94 to the current mode word location for the given device. The next operational step, step 286, involves determining and storing the address of the display stack segment address for the new mode.

These are the addresses of the display words in area 28 of the predetermined device memory for the selected new mode. From step 286, the system proceeds to step 288 during which the prepierce mode word in area 26 of memory is retrieved and stored in a register of the control unit.

As will become clear in due course, this word is used to determine whether any segments stored market information in a previous mode and to save the addresses of these segments. Since the operations performed in step 290 are similar for the three display segments, only the first segment will be described in detail below. Operation 29
The first step 292A of 0A is to determine from the prepierce mode word whether segment 1 is a quote segment. Step 292B (not shown) determines whether segment 2 is a market information segment, and step 292C (not shown) determines whether segment 3 is a market information segment. If segment 1 is not a market segment, the system branches to step 292B. If segment 1 is a quote segment, the system branches to step 294A during which the first quote segment address is retrieved for this quote information. During step 296A, the market information address save word in area 24 of memory for a given device is retrieved, and during step 298A, the system determines that the address retrieved during step 294A is saved during step 296A. A test is performed to determine whether one of the retrieved save address characters is stored. If the quote address retrieved during step 294A has already been saved in one of the save address positions in memory, there is no need to re-save it and the system branches to step 232A.
If the quote address determined during step 294A has not yet been saved, the system
A branch is taken and a clear save word is placed during step 300A. During step 302A, step 2
The address determined during step 94A is stored in the QIJ save address determined during step 300A.
The system then determines whether the second segment contains market information for which the address should be stored.
The process branches to step 292B. If a determination is made that there is no quote information to store, or if a determination is made that quote information is stored, the system returns box 29.
0C operation to determine whether market price information whose address should be stored is included in segment 3 of the previous mode. Upon completion of the required actions in box 290C, the system proceeds to step 304 (Figure 14C). During step 304, the address of the display stack segment address determined during step 286 is used to address area 20 of memory for a given device.
Controls the writing of display words at these addresses to display control word addresses within. From step 304, the system proceeds to step 306.

Step 306 is the first operational step of determining whether the segment address saved during the act in box 290 should be used in the current mode. As mentioned above, if a segment is to be used in the current mode, it must be cleared and updating of the segment must be inhibited. During step 306, the current mode word in area 26 of memory for a given device is retrieved and control unit 40
is stored in the register. During step 308, two quote save address words in area 24 of memory for a given device are retrieved and stored in the appropriate register of the control unit. The system then performs step 310
Step 1 and determine if there is an address stored in the first save address position.

If this position is clear, the system branches to step 312 to determine whether the second save address is clear. If the second save address is also clear, no operation is necessary to determine whether the save address should be cleared and the system branches to step 314 (Figure 14E), the first step of the next save routine. If the first save address is not clear, the system branches from step 310 to step 316.

During this step, the flag bit, which is the last bit in the control unit register storing the current mode word, is set to indicate that the first save word address has been seen. If during step 312 it is found that the second save address is not cleared,
The system branches to step 318 during which the flag bit is reset to indicate that both save addresses are visible. From step 316 or step 318, the system proceeds to step 320 during which a determination is made as to whether the segment at the address pointed to in the save address word is to be used in the new mode.

This step is performed by comparing the save address word to the segment address of the display control word in area 20 of memory 18 for the given device. If the save address is not used in the new mode, the system branches to step 322 during which a determination is made as to whether both save addresses are seen. If the flag bit is 1, indicating that both save addresses are not visible, the system branches from step 322 to step 312. If, on the other hand, the flag bit is O, indicating that both save addresses have been seen, the system branches from step 322 to step 314 and begins the next subroutine. If the save address segment is being used for the new mode, the system branches from step 320 to step 324.

During this step, the current mode word is used to make a determination as to whether the segment is being used for new mode quotes. If the segment is being used for new mode quotes, the address continues to be saved and updated and the system returns to step 322. If the segment is not being used for new mode quote information, the system branches from step 324 to step 326 during which the address stored in the save address position is cleared. During step 328, the A2 control bit (bit 6 in the second control word shown in FIG. 9) for the segment pointed to by the save address is set to inhibit updates to the segment. Also, step 3
30, the remaining segments are cleared. The system then returns to step 322 to determine whether both save addresses are seen. Above, you can save the address of the segment containing market information, update it if the segment is not used for the new mode's non-market function (i.e. plate S), and update the segment if it is not used for the new mode's non-market function (i.e. skin S). An operating sequence has been described that allows segments and save addresses to be cleared if they have been used for other purposes.

In FIG. 14E, for step 314, the system determines the segments of the selected mode to be chained and initiates the operations necessary to chain the relevant segments.

During step 314, a flag is set in the control 2-nit register storing the current mode word indicating that all segments are common. This is a test flag that is reset if the condition indicated by it is not correct. The system is step 3
14, the process proceeds to step 340.

During this step, the current mode word is checked to determine if the first segment is common. If the first segment is not common, the system branches from step 340 to step 342 (Figure 14F). During step 342, the current mode word is checked to determine if the first segment is a skin S segment. If the first segment is not an MIS segment, it should be a market information segment. This is because it was determined in step 340 that it is not a common segment. As mentioned above, since the market information segment consists of two display segments, the first two segments must be interconnected. To do this, the system branches from step 342 to step 344;
During step 344, the address of the first segment indicated by the display control word is retrieved and stored in the appropriate register of the control unit.

During step 346, 000 and 001 are set as the beginning and ending display entry marker pointer bits.
is set in the appropriate register of the control unit. These bits indicate that the first and second display segments are the beginning and ending segments of the chain. During step 348, step 352 (14th D
Program step 350 as the turn address for the pointer bit entry saff routine starting at
The address of (denoted 13) is set in the appropriate register of the control unit and the system then branches to step 352.

During step 352, the entry marker address (see FIG. 9) for the first segment of the chain is stored in the appropriate control unit register. The control unit then clears the display segment pointer portion of this word, ie, bits 1 and 3 of the first character of this word (step 354), and clears the new value set as the starting value during step 346. value.
In this case, 000 is stored in these bit positions (step 356). This latter operation can be accomplished by logically adding the new bit to the 000 already stored in that position.
During step 358, the system tests to determine whether pointer bits have been stored for all segments (i.e., the input pointer bit value is the last stored pointer bit value in the control unit register). (Compare with display entry marker pointer bit).

If the end segment of the chain is not reached, the segment address is incremented during step 360, the pointer value is incremented during step 362, and the system returns to step 354. Step 360 makes it appear that the chained segments are stored at consecutive segment addresses in memory 18. If the control unit cannot confirm that a chained segment is thus established during mode setting, the increment step 360 may be replaced by reading the next segment address from the display control word in area 20 of memory for the given device. You can use the search step. If only two segments are connected together and step 358 is reached twice, an indication is generated that the pointer bit has been stored in the last segment of the chain, and the system returns to step 36.
Branches into 4.

During step 364, the turn word stored during step 348 is used to control branching of the system to step 350 (see Figure 14F). Step 35
During step 366, the address of the first segment is again retrieved and stored in the appropriate register, and during step 366, the address of the second segment is retrieved and stored in the appropriate register. During step 368, step 37
The address (indicated by 16) to be returned to zero is set in the appropriate register of the control unit. The system then branches to step 372 (see Figure 14D), which is the first step in the subroutine for storing chained bits. During step 372, the address of the second control word in the first segment of the chain is stored.

During the next step 374, the chain bits in positions 7 and 8 of the second character of this word are set to indicate that the segment is the first segment of the chain. This sets bit 8 to 0 and bit 7
This can be done by setting . The segment address is then incremented during step 376 (which is considered a consecutive segment of the chain as in step 360).

During step 378, the system checks to determine whether the currently viewed segment is the last segment in the chain. If this segment is not the last segment of the chain, then . The system branches to step 3801, during which the chaining bit for this segment is set to indicate that it is neither the first nor the last segment in the chain. This is possible by setting both chaining bits to 1. The system runs from step 380 to step 3.
Returning to 76, the segment indication is incremented so that the next segment in the chain is visible.

As with the first time that step 378 branches from step 368, the system branches to step 382 when it determines that the final segment of the chain has been reached during step 378. During step 382, the chained bits of the segment currently being viewed are:
It is set to indicate the last segment of the chain. This is done by setting bit 8 to 1 and bit 7 to 0. Then the system goes to step 3
Find the current mode word between 84 and step 3
The all-segment common flag set during 14 is reset (step 386). During the next operational step, step 388, the system
68 and retrieve the turn address stored during step 37 in this case using this stored address.
Return the system to 0 (Figure 148). The system branches to step 370 from either step 340 (if the first segment is determined to be common) or step 388.

During step 370, the current mode word is tested to determine if the second segment is common. If it is determined that the second segment is not common, the system branches to step 390' and determines whether the second segment is a skin S segment. If the second segment is a skin S segment, the system branches to step 392 to determine whether the third segment is a skin S segment. The decisions between steps 390 and 392 are made using the current mode word. If during step 390 it is determined that the second segment is a market information segment rather than a skin S segment, or if during step 392 it is determined that the third segment is not an MIS segment, then the system Branch to 394. It should be noted that under any of the above conditions, the fourth and fifth segments will be chained, but the chain will not extend beyond the fifth segment. During step 394, the address of the fourth segment is retrieved using the display control word in area 20 of memory, and during the next step 396, 003 and 003 are searched as the beginning and ending entry marker pointer bits, respectively. 004 is set. Step 396 is equivalent to step 346 except that it is for the middle group of segments rather than the top group of segments. During step 398, the address of step 400 is set as the return address in the appropriate control unit register, and the system then branches to step 352 to set the address of step 400 as the return address in the appropriate control unit register, and then the system branches to step 352 to set the address of step 400 as the return address in the appropriate control unit register, and then the system branches to step 352 to set the address of step 400 as the return address in the appropriate control unit register, and then the system branches to step 352 to set the address of step 400 as the return address in the appropriate control unit register, and then the system branches to step 352 to set the address of step 400 as the return address in the appropriate control unit register. Record chain pointer bits within the segment. Once these pointer bits have been recorded, the system proceeds to step 364.
The program branches to step 400 during which the address of the fourth segment is retrieved and stored under control of the display control word in area 20. During step 402, the memory address of the segment used to update the fifth display segment is retrieved and stored. During step 404, the address of step 406 (indicated by 17) is set in the appropriate control unit register as the return address, and the system then branches to step 372 (Figure 14D),
A chained bit is recorded in the appropriate bit position of the segment whose address was retrieved during steps 400 and 402. When the system reaches step 388 again, the system branches to step 406. The system also branches to step 406 if during step 370 it is determined that the second segment is common.

During step 406, the force rent mode word is used to determine whether the third segment is common. If the third segment is common, the system performs step 40
Branch to 8 to determine if all segments are common. This is done by checking the flag bit set during step 314 to determine if it has been reset. If the flag bit was not reset, all segments are common and the system branches to step 410. During step 410, a predetermined device memory
The display entry marker in area 22 is cleared. This step is necessary because there is no entry marker if all segments are common. The system returns to its normal job control program from step 410. During step 408, at least one
If the segments of the group are found not to be common, the system branches from step 408 to step 412. During step 412, the last two bits of the register storing the current mode word are set to indicate the first segment as the first segment to be checked. The system then performs step 248
Branch into. As mentioned above, this step involves determining and storing the location of the entry marker in both the device control area region 22 and the entry marker control word (i.e., the first control word) of each segment used for the display. This is the first step of the subroutine used for Once the entry marker has been written, the operations required when the mode key was pressed are completed and the system returns to its job control program. Returning now to FIG. 14F, if during step 342 it is determined that the second segment is an MIS segment, the system branches to step 414.

During this step, a determination is made as to whether the second segment is a MIS segment. Second
If the segment is not a MIS segment, only segments 1 and 2 are interconnected and the step branches to step 344. If the second group (i.e., segments 4 and 5) are MIS segments, then at least the first five segments of the display are chained together and the system branches to step 416 to indicate that the third group of segments are also MIS segments. make a decision as to whether If the third group of segments is not a skin S segment, then the operations necessary to chain the first five segments together should be performed and the system branches to step 418. During step 418, the address of the first segment of the chain is retrieved. During step 420, 000 is set as the first display segment of the chain and 004
is set in the appropriate control unit register as the display segment at the end of the chain. The segment then proceeds to step 422, during which step 424 is set as the return address for the pointer bit generation subroutine. The system then branches to step 352 (Figure 140), beginning with step 5.
5 used to update one display segment
A pointer bit is recorded in each memory segment. Upon completion of this subroutine, the system returns to step 424 during which the first segment address is retrieved. During step 426, the fifth segment address, the address of the last segment in the chain, is retrieved, and during step 428, it is retrieved as the subroutine return address of step 406 (1).
7) is set. The system then branches to step 372 (Figure 14D) to record the chained bits for the five segments included in the chain. During step 416, the third group of segments is also MIS
If all eight segments of the display are chained, the fourth
A display in the format shown in the figure will occur. Under these conditions, the system proceeds from step 416 to step 4.
Three rivers diverge. During step 430, the address of the memory segment used to update the first display segment is retrieved, and during the next step 432, 000 and 007 are set as the start and end pointer bit numbers, respectively. . During step 434, the address of step 436 (denoted 2D) is set as the return address, and the system then branches to the pointer pit generation subroutine beginning at step 352. At the end of this subroutine, the system returns to step 436 to retrieve the first segment address. During the next step 438, the address of the memory segment used to update the eighth display is retrieved, and during step 440, the address of step 408 is retrieved as the IJ turn address for the chained bit generation subroutine. address (indicated by 18) is set. The system then branches to a chained bit generation subroutine beginning at step 372. Two other shapes of chain bits are possible.

The first is that during step 392 (Figure 14E) the third
Occurs when a segment of a group is determined to be a skin S segment. Under these conditions, a display of the general form shown in FIG. 3 would occur, with the last five segments, no segment 4 and no segment 8, chained together. Under these conditions, the operations shown in steps 492, 494 and 496 are performed before the system branches to the pointer pit generation subroutine. Upon return from the pointer bit generation subroutine, the system performs steps 498, 500, and 502 before branching to the pointer bit generation subroutine. The return step from the pointer bit generation subroutine is step 408. Another possible chaining situation occurs when the third segment is determined to be common during step 406.

Under this condition, the seventh and eighth segments must be chained. To accomplish this, the system branches from step 406 and performs the step operations shown in the boxes of steps 504, 506, and 508 before branching to the pointer bit generation subroutine.
These steps are substantially similar to the steps described above, so detailed explanations will be omitted. Upon return from the pointer bit generation subroutine, the system performs steps 510, 512 and 514 before branching to the chained bit generation subroutine.
Perform the operation. Since these steps are also substantially similar to the steps described above, detailed explanation will be omitted. The return step from the subroutine is again step 408. As is clear from the flow chart and the above description, a program or logic design engineer of ordinary skill can provide software or hardware that accomplishes the desired functionality. Also, as mentioned above,
These features may be hardware-only, software-only, or
Alternatively, it can be implemented either by some combination of hardware and software. The particular means for performing these functions may be selected based on various economic or other considerations. Unless otherwise indicated, specific means for performing various functions do not form part of the invention. Operation of the Control Unit FIGS. 15A and 15B show a block diagram of the control unit hardware for control unit 40, which includes most of the functionality described above.

As can be seen from Figure 15B, input/output interface 1
The signal on line 600 from 42 (FIG. 6B) is provided as an information input to input decoder 602. control unit 4
0 periodically scans each terminal 12A to determine if it has been keyed. When the control device finds that the scanned keyboard has an input, this input is passed through the appropriate interface for the device to the input decoder 6.
02. When the control unit receives an input, it knows which device it polled, so it also knows which device generated the input. The specific circuit arrangement for generating the boring messages and for receiving the boring responses do not form part of the present invention and will not be described here. If mode key 118 is pressed, circuit 602 decodes the input character and
Generates output on a suitable one of the four lines 604, and MIS
If key 120 is pressed, it will produce an output on line 606, and if quote key 122 is pressed, it will produce an output on line 608.
generates output on the top and edit keys 114, 130, 132,
If one of the keys 134, 136, 138, etc. is pressed, the output will be generated on the appropriate line on line 610, and when the data input key 110 or 112 is pressed, the output will be generated on the appropriate line on line 612 or Output is generated on the combination of lines 612 and line 61 when the mode setting request key 124 is pressed.
4 on line 616, and on line 616 if mode setting transmit key 126 is pressed.

Mode selection line 604 supplies these to OR gate circuit 618. Thus, a signal appears on output line 620 from OR gate circuit 618 whenever a mode selection operation is being performed. Skin S line 606 and market information line 6
08 supplies these as inputs to the OR gate circuit.
This way, when the function key is pressed, this O
A signal appears on output line 624 from the R gate circuit.
Edit line 610 and data input line 612 provide these as inputs to OR gate circuit 626. Thus, when either a data input function or an edit function is being performed, a signal will appear from OR gate circuit 626 on edit output line or data input output line 628. 15th
Before describing the manner in which the circuits shown in Figures A and 15B perform the various functions required, reference is made to the circuitry shown in Figures 15A and 15B.

These are memory 1 that stores various information for each device.
This is a circuit group that stores addresses within 8. Directory-631 contains the save address word (area 24) for each device.
) address. Directory-632 contains the segment address stack (i.e. area 2) for each device.
8 mode display word). Directory-633 stores the address of the display control word within area 26 of memory. Directory 634 stores the address in memory of the prepare mode word in area 26 of memory, and directory 635 stores the address in memory of the mode word or screen format word in area 26 of memory, and -636 stores the address of the current mode word within this area of memory. Directory 637 stores the address of the entry marker in area 22 for each device. One input to each directory is the device clock on line 640, which is the address input to each directory. Each directory
When receives both an upper input signal and a lower input signal (or when the center input is activated for four directory inputs having a center input), directory one is activated and produces an output. . In order to carry out the above operation, each directory is provided with a suitable gate circuit. First, assume that the input to the decoder is an edit input or a data entry input.

As can be seen from FIG. 10B, the first operational step under these conditions is to determine the control area address for the device and to read the current mode word etc. into the control unit. . This combines the signal on the edit or data entry line 628 through an OR gate circuit 642 and line 644 as one input to the current mode word directory 636;
and by supplying line 628 as one input to entry marker card directory 637. For convenience in the following discussion, the control unit includes a clock that starts when an input is received and stops when it has completed the operations required by the input, said clock running at a rate synchronized with the rate at which memory 18 is accessed. shall occur. It should be noted that updating the display requires accessing the memory approximately once every 10 memory cycles. Suitable means are used, for example, suppressing the clock circuit during the time interval. Since this means does not form part of the invention, a detailed explanation is omitted here. At time C of the control unit clock, a signal appears on line 646 that enables the current mode word directory 1 and outputs the current mode address for the device indicated on line 640 to OR gate circuit 650 via line 684. (FIG. 15A) and, via line 38, to address memory 18 for reading the desired word into MDR 94 (FIG. 6A).

Also, at time CI of the control unit clock, a signal is present on line 652 that enables gate circuit 654 (FIG. 15A) to supply the contents of MDR on line 95 to mode word register 658 via line 656. do. At clock time C2 of the control unit, a signal appears on line 660 that enables the entry marker word directory 637, generates an address output on line 648, and via OR gate circuit 650 and line 38 to memory I.
8' and stores in the MDR 94 the entry marker keyword for the device for which service is being requested. Also, the C2 clock signal is on line 662 (Figure 15B).
is supplied to gate circuit 664 via line 6 at this time.
66, causes the entry marker data on line 95 to be placed in entry marker save address register 672 via OR gate circuit 668 and line 670. The operations necessary for step 154 are performed in this manner. Decoding of the functions, step 156, is performed by decoder 602.

The next operational step, step 158, is performed by valid function test circuit 674 (Figure 15B). The inputs to this circuit are decoder output lines 610, 612 indicating the function to be performed, output line 676 from mode word register 658 and entry marker register 6.
Output line 678 from 72. Circuit 674 verifies that no attempt has been made to change the common segment, for example. If the requested function is invalid, it is activated (step 160 in Figure 10B).
doesn't happen. If circuit 674 determines that the requested function is valid, circuit 674 connects line 6
A signal is provided to the implementation unit 692 via 90 .

The implementation unit 692 also receives line 6 from the decoder 602.
10 and 612, an input on line 678 from EM register 672, and an input on line 95 from MDR 94. If necessary, implementation unit 69
2 sends an address signal through line 694 and OR gate circuit 650 to request information by addressing memory 18 or to place information generated from the implementation unit into memory using the signal on line 694. It can be memorized. Such information from the execution unit is provided on line 696, OR gate circuit 688 and line 97.
is supplied to the MDR via. One of the implementation units 692 is to update the entry marker and store the updated entry marker in the area 22, such as the appropriate control segment 18B. Therefore, the implementation unit 69
2 produces an output on line 698 and OR gate circuit 668
and entry marker updated via line 670
is stored in register 672. These entry markers are connected to gate circuit 70 via line 678 at the appropriate time.
0. Gating circuit 700 is derived from the implementation unit on line 702, gating circuit 704 and line 706.
This is made possible by an input signal supplied to the gate circuit 700 via the gate circuit 700. The output from gate circuit 700 is provided to the MDR via line 708 and OR gate circuit 688. The various functions for the implementation unit 692 described above are listed in section 10B.
Performs the functions 162-170 shown in the figure. Next, if the skin S or market information key, which is a function key on a certain keyboard, is pressed, under this condition, an output is generated from the OR gate circuit 622 on the line 624, and this output is OR It is provided as an input to the current mode word directory 636 via gate circuit 642.

At clock time CI, this directory becomes enabled and generates an address output, storing the current mode word in register 658 in the manner described above. The first step shown in FIG. 10A, step 176
is done like this. The second actuation step (step 178) of determining the function is performed by the decoder 60
2. The next two operational steps, steps 180 and 182, are performed by the function mode entry marker position determination circuit 712 (15th
Figure A).

Two of the inputs to this circuit are MIS and quote information lines 606 and 608. The current mode word in register 658 has its first six bits provided to segment test circuit 714. The circuit produces an output on the appropriate line or lines of line 715 depending on whether segment groups 1, 2 or 3 store market format information, and which of the one or more segment groups Output is generated on the appropriate one or more of lines 716 depending on whether they contain common format information. line 715
and 716 are two additional sets of inputs to circuit 712. The last two bits in register 658 at this point indicate the first segment to check during this operation. These two bits are connected to the first
A segment check decoder circuit 72 is supplied. The output from circuit 720 is provided as another input to circuit 712 via line 722. MDR output line 95 also forms another input to circuit 712. These are the inputs required by circuit 712 when the function key is pressed. Additional inputs, described below, are used when the circuitry makes entry marker position determinations when the mode key is pressed. Circuit 712, with inputs provided thereto, determines the segment having the desired function and the entry marker position for this segment.

The address in memory 18 of the segment is provided via line 723 to OR gate circuit 725 and line 727.
accessing the display control word for the device. The circuit then generates an output on line 724 which is provided to register 672 via OR gate circuit 668 to cause the desired entry marker address to be stored within register 672. The final step of operation involves an output derived from circuit 712 on line 726, which causes the address at which the entry marker address is to be stored to be read into address memory via OR gate circuit 650. It also includes an output on line 728 and connects this output to gate circuit 70 via OR gate circuit 704 to enable gate circuit 700 to OR the entry marker address in register 672 to OR gate circuit 688. is supplied to the MDR via. The necessary repositioning of the entry marker is done in this way. Next, consider the case where one of the mode keys 118 on the keyboard 16 is pressed.

Under this condition, the signal on mode line 620 is applied to clock time CI via OR gate circuit 642 to the current mode word directory to enable said directory and to the memory address circuit to enable the current mode word directory. supply the address of This converts the current mode word to MDR9 in the manner described above.
4 and store this word in register 658. Reading the current mode word into register 658 has no effect on the actual time. The CI clock pulses are delayed by 1/2 clock time and line 7
40 to the previous mode word directory 634 as one of the inputs. The signal on line 620 enables directory 634 at this time to transfer the address of the pre-pierce mode word to the memory address register. This causes the MDR to write the stored current mode word into the previous mode word position. Step 28 shown in FIG. 14B is performed as follows. Clock time C3 has line 74.
2 to one of the inputs of the mode word directory-635.

The other input to this directory is the activation input on line 604. In addition to serving as an active input, line 604 also functions as an address input to mode word directory-635. Therefore, the address of the desired mode word is coupled to the memory address circuit via line 648 and OR gate circuit 650. Step 282 shown in FIG. 14B is thus performed. The C3 clock is provided on line 646 with a 1/2 clock time delay to synchronize the current mode word address to memory address circuit 32. Thus, at time C3 M
The mode word read into DR is stored in the current mode word position of memory 18. Thus the first
Step 284, shown in Figure 4B, ends. At clock times C4, C5, C6 and C7, active inputs are provided to the segment address stack directory 632, with additional address and active inputs to this stack being derived from the enable line 604.

The output from directory 632 forms the sequential addresses for the four mode display words of the newly selected mode. These words are sequentially MDR94
is read out. Clock pulses C4 to C7 are each delayed by 1/2 clock time and are provided as active inputs to display control word directory 633 via line 746. At this time, Directory-6
33 is enabled by the signal on line 620. Thus,
Each mode display word displayed in M Town R is stored in a corresponding word position in display control word area 20 for a given device. Figures 14B and 14
Steps 286 and 304 shown in Figure C are performed in this manner. At clock time C8, the signal on line 74 is again applied, causing the MDR to read the prepierce mode word for the device.

The C8 clock is also connected to gate circuit 65 via line 652.
4 to enable the circuit 654 and provide the contents of the MDR to the mode word register 658. 14th
Step 288, shown in Figure B, thus ends.
During clock time C9, a signal is provided on line 748 as the active input of save word directory-631. A signal on mode line 620 enables this directory entry to provide the memory address circuit 32 with the address of the save word for the device. A signal also appears on line 662 at clock time C9, enabling gate circuit 664 to supply the save address word read into the MDR to entry marker save address register 672 via OR gate circuit 668. The contents of register 672 on line 678 are provided as a set of inputs to test quote in segment save quote address circuit 750 (Figure 15A).

Other inputs to this circuit are the three market output lines 715 from segment test circuit 714. One or more of these lines is activated depending on which market forming segment group was designated as being included in the previous mode. Circuit 750 is powered by the CIO clock signal on line 752. Circuit 750 performs the functions shown in boxes 290A, 290B, and 290C shown in FIG. 14B. Accordingly, circuit 750 determines which segment group in the previous mode was a quote segment, determines whether an address was previously stored, such as a memory address for a quote segment, and determines whether an address was previously stored, such as a memory address for a quote segment. If not, line 7
54 and the OR gate circuit 668 to store the address in the save register 672. The current segment address needed to make the above determination is on line 755, O
It is obtained from line 95 in response to memory access requests provided to display control word directory 633 via R gate circuit 725 and line 727. For one clock time CII, lines 646 and 65
2 again, causing the current mode word to be stored in the mode word register 658 in the manner previously described.
Step 306 shown in FIG. 14C is thus performed. Step 308 has already been performed since the save word was stored in register 672 during a previous operation. The save addresses in register 672 are provided on line 678 as a set of inputs to new mode segment test circuit 756 (FIG. 15A). circuit 7
The second set of inputs at 56 is the quote information line 715. line 7
The CI2 signal on 58 enables circuit 756 to
The functionality shown in the figure does not have 310, but causes 330 to be implemented. This circuit serves to determine whether a segment of the save address is used for non-quote functions in the new mode. If the save address is being used for a non-market function in the new mode, circuit 756 produces an output on line 760, clearing the save address. circuit 756
also produces outputs on lines 762 and 764. These cause the A2 bit for the segment to be marked, inhibiting updating of the segment, and clearing the data stored within the segment. If the memory does not have segment clearing capability, address the words of the segment sequentially and fill these words with 0s from the cleared MDR.
A segment clear operation can be performed by writing . As with circuit 750, the required segment address is provided to circuit 756 via line 95 in response to an address request on line 765. Line 765 accesses display control word directory-633 through OR gate circuit 725. At clock time C13, a signal appears on line 748 to access the save word address in memory. Also, line 7
A signal also appears on 66, which is supplied to gate circuit 700 via OR gate circuit 704 to enable gate circuit 700 to write the save address information in register 672 to the accessed save address position. Place it on plate R to make it stand out. At the beginning of clock time CI4, the current mode word is stored in register 658.

This word is provided to segment test circuit 714. The combined outputs on lines 715 and 716 are also provided as inputs to the beginning and end segments of chain determination circuit 770. At time C14, a signal is provided to circuit 770 via line 772 and OR gate circuit 774 to enable circuit 770 to perform step 340 of FIG. 14E.
Determine the beginning and end segments of the chain required to start from. This circuit produces an output on line 776 to address the memory for the desired information and receives information from the MDR on line 95. Information determined by circuit 770' is provided via line 780 to pointer bit write circuit 782 and chained bit write circuit 784. Pointer bit write circuit 782 performs subroutine steps 352 and 364 (14th D).
The circuit 784 performs the pointer bit write function in Figure).
performs the chained bit write function of steps 372-388 (Figure 14D). When circuit 770 sets up the first chain, it produces an output on line 786, energizing circuit 782. Circuit 782 generates an address output on line 788 and causes the pointer bit information appearing on line 790 to be stored in memory. When circuit 782 completes its function, circuit 782 produces an output on line 792 to energize circuit 784 to perform its function. This circuit 784 produces an address output on line 794 and
Store the chained bit information appearing above in memory. When circuit 784 has completed its function, circuit 784 produces an output on line 796, which is provided as one input to AND gate circuits 798 and 80. 8
If all three segments have not yet been checked, at this time output line 802 from circuit 770
No signal appears on line 806, producing an output from inverter 804 and enabling AND gate circuit 798, producing an output on line 806.

This signal is passed through the OR gate circuit 774 to the circuit 7701.
This is supplied to enable the circuit 770 to determine the beginning and ending segments of a new chain. When all segments are checked in the new mode, a signal appears on line 802, and if a signal also appears on line 796, AND gate circuit 800 is enabled and produces an output on line 808. . The signal on line 808 is applied to the last two bit positions of the current mode word stored in mode word register 658 and sets these bits to point to the first segment. The signal on line 808 is also provided to circuit 712 to enable this circuit and to
, determine the position and memorize the entry marker for the new mode. Circuit 712 performs these functions in the same manner as would occur if a function key were pressed. Once this operation is complete, all functions required when pressing the mode key are terminated;
The circuit prepares to accept new input. When the mode setting request key 124 is pressed, the decoder 606
generates an output on line 614 and enables mode set mask generator 820 (FIG. 15B) to generate an output on line 822 and store this signal in memory 18 via OR gate circuit 688.

Since the mask is stored at the position indicated by the device entry marker, circuit 820 does not need to generate an address output. Once the mask is filled,
Since there is a different mask for each device, line 826
a mask store 82 that receives the device clock via
4, and is configured to be able to supply an appropriate mask to the mask generator at any predetermined time. Once the mask is properly filled and visually verified, the operator presses the mode setting transmission key 126.

Thus, decoder 602 generates an output on MSU transmission line 616 and sends this signal to MSU validation circuit 830 (first
5A) as input. This circuit, or other circuits in the system, reads the generated mask and supplies it to circuit 830 via line 95. Circuit 8301 performs a check to determine whether all mode setting rules have been followed and produces an output on line 832 if these rules have been followed. If the mask is disabled, circuit 830 produces an output on line 834 which triggers an error message to generator 836 on line 838.
generates an error message on top. The signal on line 838 is stored in memory 18 via OR gate circuit 688 at the address shown on line 840. The confirm signal on line 832 enables circuit 842 to generate a mode word and segment address stack for the new mode.

Although this circuit 842 is a fairly complex circuit that includes a large number of inputs and outputs, only a few of the inputs and outputs are shown in the figure. The output from this circuit is stored in memory via line 844, and is also stored in mode word directory 635 via line 846 and also in segment address stack directory 632 via line 848. It has thus been possible to obtain a circuit for controlling the generation and display of information in different modes on a split segment display device.

In the embodiment of the invention described above, each display is divided into eight segments, and up to three different types of information can be displayed simultaneously on these displays; however, these values are merely illustrative. Of course, it is possible to divide the display into more or fewer segments than these values, or to apply different display formats to each device. The machine can also increase the number of information formats available for display, for example by increasing the number of bits in each mode word to differentiate the format of information displayed in each segment. It is also possible to change the number of modes available. The various choices of hardware and software of the present invention have been described above, and as previously pointed out, it is possible to vary the way the hardware and software are combined for various uses of the present invention. Can be done. Further, although FIG. 6A shows a single memory 18 for storing both display and control information,
Separate registers or storage devices may be provided to perform each of these functions. Furthermore, the directory 63 may be stored in a selected area within the memory 18, or may be stored in a separate device as in this embodiment. The invention is not limited to the embodiments described herein; the invention includes other variations.

[Brief explanation of the drawing]

FIG. 1 shows a representative display for an embodiment of the invention, FIGS. 2-5 show various ways of dividing a display for an embodiment of the invention, and FIGS. 6A and 6B show a typical display for an embodiment of the invention. A block diagram of a system according to an embodiment of the present invention, FIG. 7 is a diagram showing a keyboard layout suitable for the embodiment shown in FIGS. 6A and 6B, and FIGS. 8A and 8B are diagrams showing a keyboard layout suitable for the embodiment shown in FIG. 6A. 9 shows a portion of the information contained at the beginning of one of the operating segments of the memory shown in FIG. 6A. FIGS. 10A and 10B show various information from the keyboard. FIG. 11 is a flow diagram illustrating the operations involved in displaying stored information; FIG. 12 is a general flow diagram illustrating the operations performed in response to input; FIG. 12 is a flow diagram illustrating the operations involved in displaying stored information; and FIG. FIG. 13A is a flowchart showing the operation of changing the format or arrangement of information to be displayed; FIG. 13A is a diagram showing masks displayed upon initial assignment of mode settings; FIG. 13B is a diagram showing typical masks displayed upon changing mode settings. Figures 14A to 14
Figure F is a flowchart showing details of the operations performed when a mode key or function key on the keyboard is pressed; Figures 15A to 158 are blocks of a control unit suitable for use as the control unit shown in Figure 6B; This is a diagram. 10...Entry marker, 12 (12A......
...12N) ...Terminal device, 14 (14A...
......14N)...Display device, 16 (16A...16N)...Keyboard,
18...Memory, 18A...Boat buffer area, 18D...Control segment, 18C...
common segment, 18D... operating segment, 20, 22, 24, 26, 28... area,
32...Memory address circuit, 36...OR
Gate circuit, 40... Control unit, 44...
Word counter, 46...Segment number register, 48...Display clock circuit, 50...Clock counter, 52""" line clock counter, 54""" segment clock counter, 56...device clock Line, 57... Device clock counter, 60, 62, 64, 66... Output line, 68...
・Two-division circuit, 76... Gate circuit, 82...
Buffer/control circuit, 84...Character generator,
88...OR gate circuit, 90...Multiplex control circuit, 94...Memory data register, 98...Entry marker register, 10
0...Comparison circuit, 110...Alphabet key, 112...Numeric key, 114...
...Edit key, 116...Fraction key, 11
8...Mode selection key, 120...Skin S function key, 122...Market price function key, 1
24...Mode setting request key, 126...
．． ... Mode setting transmission key, 128 ... Attached key, 130 ... Clear key, 132 ... Home key, 1
34...Transmit key, 136...Print key, 138...Monitor key, 142...Interface unit, 150, 152...514...Step,
602...Input decoder, 604......
...616...line, 618,622,626...O
R gate circuit, 630... Directory 1, 631...
Save address word directory, 632...Segment address stack directory, 633...Display control word directory, 634...Previous mode word directory, 635...Mode word directory, 636...Current Mode word directory, 637... Entry marker word directory, 642, 650... OR gate circuit, 654, 664... Gate circuit, 658...
Mode word register, 668...OR gate circuit, 672...Entry marker-save address register, 674...Valid function test circuit, 688...OR gate circuit, 692... Implementation unit, 700, 704...OR gate circuit, 712...
...Function mode entry marker position determination circuit, 714...Segment test circuit, 725...OR gate circuit, 750...Test fork quote insegment save quote address circuit, 756... ...Segment test circuit for new mode, 770...Chain determination circuit, 774.
...OR gate circuit, 782... Pointer bit write circuit, 784... Chain bit write circuit, 798, 800... AND gate circuit, 80
4...Inverter, 820...Mode setting mask generator, 824...Mask store,
830...Mode setting confirmation circuit, 836...
...Error message generator, 842...Mode word/segment address stack generation circuit for new mode. It's over. The final blow. 2 〆Ritae Ekimono Yu〆Yu. Sunset. 〆〃． Average. I finished the paper and finished it in the evening. 2. Ebisushi Kyoukogoro〃 〆Otsuyu〆no; Otsuta y. Pre-〆M〃〃〆〆〆〆〆〆〆〆〆Evening harvest〆〈Autumn female〆〆〆〆〆〆Pulling wood fence,〆〆Z〆〆Butsu de Reta Buddha〆〆Reta. Numaita on Buddha's side. It's a must-see for the evening.

Claims (1)

[Scope of Claims] 1. A system for displaying a plurality of different information segments on a periodically updated display device, comprising: an addressable storage means having a plurality of information segments; means for storing a memory address; means for reading the contents of a selected segment of said memory to update a segment of said display device; and said memory address storing means operable when updating by a predetermined memory segment is completed. an information display control for a segmented display device, comprising: means for determining an address of a selected memory segment to be used to update the next segment of the display device using the address stored in the segmented display device. method. 2. A method for displaying a plurality of different information segments on a periodically updated display device comprising addressable storage means having a plurality of information storage segments, comprising:
The addressable means includes the steps of: storing the memory address of the currently displayed segment; updating the segment of the display device by reading the contents of a selected segment of the memory; and updating with a predetermined memory segment. determining the address of the selected memory segment for use in updating the next segment of the display device using the memory address stored in the storage means when the memory address is completed. An information display control method for a segmented display device, characterized by: 3. In a method for locating an entry marker at a segment position of a predetermined format in a system for displaying a plurality of different information segments of at least two different formats, the step of indicating the format of the information segment in which the entry marker is to be placed; and storing instructions for the format of information to be displayed in each segment.
Comparing the indicated information format with segment formats stored in a predetermined sequence; and placing an entry marker at a selected position of a segment that matches the indicated information format and corresponds to the first stored instruction. An information display control method for a segmented display device, characterized in that: