JPS60152297A - Drive controller for inverter - Google Patents

Abstract

PURPOSE:To protect a compressor and to increase the reliability of a system by independently operating a carrier period, data unit timer, and simultaneously switching the carrier period and data unit timer. CONSTITUTION:The same reference oscillating frequencies are inputted to two microcomputers 5, 6 by a reference frequency oscillator 7 as a system clock, and the microcomputer 5 generates a carrier period Tphi by its own signal generating means for a motor rotating frequency command (f-set). Then, the signal is outputted to the second microcomputer 6, and outputs T2 data for data unit timer T2 signal formed by the second microcomputer 6. Then the microcomputer 6 outputs a PWM signal to a motor.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an inverter drive control device suitable for drive control of compressors for air conditioners, refrigerators, etc., and industrial induction motors with small specific shaft output.

Conventional train configuration and its problems Control methods for inverters that drive motors include pAM,
Several methods are known, such as PWM, but among them, the sine wave approximation unequal width PWM method improves the utilization rate of the power supply, makes the device lighter and smaller, reduces the generation of electrical noise, and reduces noise and vibration. In recent years, it has become popular in recent years.

The stop string wave approximation PWM method is a method in which a PWM algorithm is generated so that the integral value of the voltage applied to the motor windings approximates a sine wave, as shown in FIGS. 3 and 6.

Here, the ``ALT'' method, which is the basis of the present invention, will be explained as a conventional example.

FIG. 1 is a block diagram of the inverter system. 1 is a current smoothing section that generates direct current from a commercial power supply, 2 is an inverter, 3 is an electric motor, and 4 is an inverter drive control circuit.

Next, FIG. 2 shows an example configured for use in an air conditioner. 1′
2' is a smoothing rectifier, 2' is an inverter using one transistor, 3' is a 3-phase compression margin, 4' is an inverter drive control circuit, 4a is a PWM algorithm generator, 4b is a photocoupler, and 4C is a transistor. This is a driver that supplies the base current of .

The signal generated by the PWM algorithm generator 4a is optically insulated and amplified by a photocoupler 4b, then supplied to a driver 4C, and after current amplification, is supplied to an inverter 2'.
It drives the compressor 3'. The transistors of the inverter 2' are composed of three pairs of upper and lower arms, and the upper and lower arms perform switching operations that are inverted from each other, and are never turned on at the same time.

FIG. 3 shows the voltage waveform of the signal that causes the closing force to be 0 to each transistor and the voltage waveform that causes the closing force to be 11 to the compressor.

U, V, and W indicate the base signals of the upper arm transistors, respectively. Also, U-V, V-rf, ff-U
are the voltage waveforms that cause an opening force of 11 points to each winding of the compressor 3'. As is clear from the figure, the voltage applied to the compressor is configured to approximate a sine wave when integrated, and the period of this voltage pattern determines the rotation speed of the compressor.

Next, the PWM algorithm will be explained.

Figure 4 shows the concept of a ``carrier''.

In FIG. 4, the half cycle of the sine wave, lul, is equally divided by the integer iN. This N fc''°carrier' is called, and the period Tφ divided into N equal parts is called a "carrier period°'."

If voltage data is given as a total pulse width for each carrier period Tφ, an algorithm can be constructed as shown in FIG.

Next, the voltage values applied to the compressor will be explained with reference to FIG. It is assumed that a constant voltage is generated using the algorithm shown in FIG. 5ja). If each pulse width is increased proportionally, the waveform will become as shown in Figure 6(b),
The integral value also increases proportionally.

That is, the output voltage can be increased or decreased in proportion to the pulse width.

Next, the pulse width and 'HALT' which determine the voltage will be explained using FIG. 6.

There is time for the data area divided into multiple parts within the carrier period Tφ, and the remaining time i ”ti A L T
“.

shall be called a region. Voltage data is not output in this HALT region.

It is assumed that the data area time is light minutes shorter than the carrier period Tφ(1). This condition is shown in Figure 6 (?L). Next, as shown in Figure 6(b), K, 11A period T
Let φ be Tφ(2). At this time, assuming that the data area time is constant, the frequency f'' is 2 (f!r (carrier period V/2)) and the output voltage V is also doubled. This is because it will be doubled.

Therefore, when the data area time is constant and the carrier period Tφ is changed, the frequency f increases in inverse proportion to the carrier period Tφ, and the voltage V increases or decreases in proportion to the frequency f.

The state of this V/f pattern is shown in FIG.

At this time, the °'HALT" period also °°deday's hiatus period °
It will change as °.

Next, details of the data area will be explained with reference to FIG.

The data area explained in FIG. 6 is divided into integers, and the divided basic period is defined as a tick unit timer T2.

In other words, the voltage is divided into logic circuits with a resolution of L, and the circuits are given to the data unit timer T2.

Naturally, the larger the values of the carriers N and K described above are, the closer the voltage applied to the compressor can be to a sine wave.

In FIG. 8(a), the carrier period Tφ is Tφ(1)
and data unit timer T2 i 'J', 2 (1)
shall be. Next, as shown in FIG. 8(b), the data unit timer T2 is doubled to T2(2). At this time, the data area time (T2XK) is doubled, and the "HALT" time is relatively reduced.

At this time, the output voltage V becomes 2i. After this, if the carrier period Tφ is further changed, the respective v/l patterns become as shown in FIG.

Next, in FIG. 9, as the 'voltage ■ increases, the eighth
The "HALT" area U shown in the figure decreases. As the temperature rises further, there is a point where "HALT"°1 peak area reaches /l"iM.

If the compressor opening force 11' is smooth and the DC' voltage value is constant, this point becomes the limit. Therefore, when the frequency ft is increased beyond this point (.times.i), the voltage V reaches a ceiling, resulting in a constant voltage change.

This situation will be explained using FIG. 10.

Fig. 10(a) (7) J: Uni °'1 (ALT" region is set to O, gear period Tφ (3) is divided into the number of data, and data unit timer T2 (1) is given. In other words, Tφ
(3) −K XT2(1). Next, Figure 10 (b
), the carrier period Tφ is increased by increasing the frequency f′ as shown in
If woTΦ(4), then T 2 (3) is TQI, (4
) = K x T2 (3).

At this time, since the data area time ratio in the carrier period Tφ is the same in both cases, the voltage ■ becomes constant in both cases. This situation is shown in FIG.

Next, the relationship between the inverter output and the load will be explained.

If the load is a resistive load, the inverter output is proportional to the square of the voltage.

On the other hand, regarding the compressor, the amount of work is proportional to the displacement of refrigerant in the 7 rings, so when the rotation speed is low, the displacement is small, and when the rotation speed is high (/j), the displacement is also large.

A certain proportional relationship is required between the switching frequency U and the output voltage.

However, in an actual electric motor (compressor electric motor 9.), at low frequencies, a loss, σ1iil loss, etc. increase, so as shown in Figure 12, in the low frequency range, the voltage is A so-called boost function is required.

In the conventional chestnut, the carrier period Tφ and the data unit timer T
Constructed by 2 f analog timer, gear rear period Tφ
The frequency was set by a timer, and the data unit timer T2 was corrected in accordance with the set value of the carrier period Tφ timer, thereby creating a boost curve.

The biggest advantage of this 'HALT' method is that by simply changing the values of the carrier period Tφ and the data unit timer T2, the PWM algorithm generation pattern can be realized in just one cycle over the entire frequency 'direct Vζ'. .

The above is a conventional one-click configuration, but if the gear gear period Tφ and data single-stop timer T2 are configured with analog timers, it is possible to finely adjust the timer values of Jl with external parts, and the gear period Tφ, Although there are advantages such as being able to adjust each data unit timer T2yc independently, the frequency range used is wide, 1, 1, and approximated by a sine wave. career n,
It becomes necessary to switch the data number K.

However, in the low frequency range, the waveform resolution becomes rough and the waveform is disturbed, making it necessary to increase the carrier N and the number of data K to 11. In the high frequency range, when the carrier N and the number of data are large, , the switching speed of the transistor becomes 13 times, the rest time of the transistors in the upper and lower arms becomes shorter in proportion, and the output voltage decreases as a result. Therefore, it is necessary to select a single shift with a small carrier N and the number of data. ν occurs.

f) In the analog timer method shown in F-1 (1, carrier, switching of PWM generated data itself due to change of data number (C1, selection of external data area such as ROM);?
1. i:t' However, it is difficult to switch between two analog timers smoothly due to excessive C.

When the carrier period Tφ and the data unit timer T2 are changed due to dry conditions, (d, -instant, the target frequency and 'voltage are different'). ,
This is extremely problematic as it can lead to locking and sometimes even destruction of the power transistor.

In addition, analog timers have various problems such as frequency drift due to temperature changes, reliability problems such as aging, and space, reliability, and cost problems due to complicated system configurations. There is.

OBJECTS OF THE INVENTION The present invention eliminates the above-mentioned drawbacks of the conventional art.The same reference frequency is input to two microcomputers, and the carrier period Tφ and the data unit timer T2f are independently operated and digitized. This is intended to protect the compressor and improve system reliability by simultaneously switching the period Tφ and the data unit timer T2f.

Structure of the Invention To achieve this object, the present invention provides a carrier period Tφ
, two microcomputers each having a signal generation means for independently operating and digitizing the data unit timer T2, and for simultaneous switching of the carrier period Tφ and the data unit timer T2. The same reference oscillation frequency is input as a 7-stem clock to the 1st microcomputer, and the first microcomputer generates a carrier period Tφ by its own signal generation means in response to the input motor rotation frequency command, and this signal is sent to the 2nd microphone 5computer. In addition to outputting T2 data for the data unit timer T2 signal generated by the second microcomputer.

With this configuration, the second microcomputer uses the carrier period Tφ and the data unit timer T2 to read the ROM.
The data is accessed to configure a sinusoidal wave approximation PWM system drive control device using the "ALT" method.

DESCRIPTION OF EMBODIMENT IJ Hereinafter, the inverter drive control device of the present invention will be explained using FIGS. 13 to 19 showing one embodiment thereof.

13 is a circuit diagram, and FIG. 14 is a block diagram.

In Fig. 13, 5 is the first microcomputer 1.6
1d 2nd (1) It is a microcomputer.

7 is a base thread frequency oscillation circuit, and is input to each microcomputer 6.60O8C terminal. The first microcomputer 6 receives an eso/eso fiz commercial frequency manual motor rotational frequency command f-set. '21: From the first microcomputer 5 to the second microcomputer 6, a signal of carrier period -Tφ created by the first microcomputer 5 and a signal of the data unit timer T2 created by the second microcombi coater 6 are sent. T2 data for this purpose is output. Then, the second microcomputer 6 outputs the F W fA signal to the motor.

FIG. 14 is a block diagram.

60/6 (
) llz is the frequency input for creating the system's sequence timer. In order to drive the compressor, a means to gradually change the frequency toward the target frequency is required, and this input constitutes a timer that provides the speed at which the frequency is changed.

f-set is an input that gives a target frequency, and the frequency gradually approaches the value set manually.

The reference oscillation input is frequency-divided by system clocks 8 and 9 to obtain a system clock output. This system clock is provided by Tφ timer frequency divider 1o, T2 timer frequency divider 11. Input to control section 12.13, control section 1
2.13 serves as a reference for executing the program and creating the carrier period Tφ and the data unit timer T2.

The carrier period Tφ and the frequency division value of the data unit timer T2 are:
R of the first microcomputer 5 corresponding to each frequency.
It is stored in the OM 17 and is input to the first microcomputer 6.flf-set input value ((corresponding carrier period Tφ, data of data unit timer T2 is sent via the control unit 12 to data 1, data unit of carrier period Tφ,
The data of the data unit timer T2 is set in the 4Tφ timer branch 10, and the data of the data unit timer T2 is sent from the control unit 12 to the control unit 13 of the second microcomputer 6.
The T2 timer frequency divider 11 of the microcomputer 6 is selected.

The carrier period Tφ generated by the first microcomputer 5 is inputted to the second microcomputer 6, and
The address counter 1 is input to the control section 13 of the second microcomputer 6 by interrupt processing along with the data unit timer T2 created by the second microcomputer 6.
The ROM 15 storing PWM data is sequentially accessed via the controller 4, and data of ty, v, and w phases are sequentially outputted via the data latch 16 instructed by the control unit 13.

Functions necessary for system control, such as refrigeration cycle processing, communication processing with the indoor control microcomputer of a separate air conditioner, four-way valve, and fan motor processing.

Current control and γi removal control are performed by the first microcomputer 6.
The control unit 12 processes the information.

Next, an overview of digital processing is shown in Figure 16 and Figure 1.
This will be explained using Figure 6.

FIG. 16 is a V/f pattern diagram that realizes boosting in the low frequency range according to the present invention.

As mentioned above, the V/rg distribution is determined by the data unit timer T2, and the frequency f is determined by the carrier period Tφ, so the desired boosted voltage value of each frequency shown in FIG. It is sufficient to plot the intersection point with (X) and output each combination of Tφ-T2 as data.

FIG. 16 explains digital processing of a region where the 'HALT' region is short.

Here, the data iK is set to 6, and the data are called D1 to D6. Let the data unit timer f T2 be the carrier period iTφ.

When the 'HALT' time without switching is longer than the carrier period Tφ, after outputting 'HALT' as shown in Figure 8,
The signal waits for the carrier period Tφ, and the next data D1 can be output in synchronization with the next carrier period Tφ.

Next, if the next carrier period Tφ comes while the "HALT" time is shorter than the data unit timer T2, the data unit timer outputs ')IALT' for a time of 2 and then outputs data D1 to D6. At this time, the output time of data D1 to D6 remains as the data unit timer T2.

Next, when the carrier period Tφ comes while the data D6 is being output, the next ")IALT"° is not outputted, and the data D6 is continuously outputted for the period of the data unit timer T2. During this time, the address of the PWM pattern data is set to +2 next time.

In other words, data D1 is skipped and accessed.

Here, the PWM pattern data is
Data before and after ", data D6 and next data D1
is determined in advance to be the same logic 1 [1. The data D6 output for the second time is now the next data D
1, the result is the same as if the 'HALT' area had disappeared and the data had been output continuously.

As the frequency increases further, the data unit timer T2 is always used during the ``IALT'' period, but the ``HALT''
If the existence rate of that item is lower, the total is ')iALT''
The period ratio decreases and the voltage increases.

Furthermore, when the voltage reaches the upper limit, the "HALT" period is completely dissipated, resulting in a relationship of Tφ-61゛2.

This state has already been explained using Figure 1Q.

To further increase the frequency, it is sufficient to shorten the carrier period Tφ while maintaining the relationship Tφ−6T2.

Next, the flowchart for realizing the embodiment is shown in FIG.
It is shown in Figure 8.

FIG. 17 shows T processed by the first microcomputer 5.
The φ timer section is shown. FIG. 18 shows the T2 timer and PWM waveform output processing processed by the second microcomputer 6. The data contents of ROMi5 are shown in FIG. 14 (FIG. 19 shows the data contents of ROMi5).

The PWM data area in the ROM shown in FIG. 19 stores one cycle of PWM waveforms of near sine wave 1 or higher, and includes UH, V)l, WH, UL, VL, W.
L.

data, I (ALT data indicating the 'HALT' period), and DATA AEND data indicating the end of one data period are respectively assigned.

The timing of the actual waveform output is shown in FIG. FIG. 16 shows one output of U, V, and W and is fc.

1, as shown in FIG.
17, and outputs the T2 data to the second microcomputer 6, sets the Tφ timer, and after determining whether the time is up, outputs the Tφ times signal to the second microcomputer 6 as well.

Next, as shown in FIG. 18, the second microcomputer 6 initializes the PWM data, reads the T2 data output from the first microcomputer 5, sets the T2 timer seven times, and updates the time. 〒－“
i and proceed to the next program.

Then read the PWM data from the ROM and output the data END.
Make a judgment. Since the data is not K k4 D at first, a HALT determination is performed next. Here, since id is the first data, it becomes °N°° and all data is output. Next, read the second data. Data is sequentially output with this one response. After the data is output by D6, “HA L
T'' becomes Y, and at this point the interrupt signal sent from the first microcomputer 6, the carrier period Tφ
Make a judgment.

If the carrier period Tφ is not input at this point,
It outputs "HA L T", waits until the carrier period Tφ interrupt is received, and returns to the original state when the carrier period Tφ is accepted as an interrupt input, and outputs the next data D.
1 output.

“'HALT” becomes Y, and at this point the carrier period is 1
If the interrupt input of φ is Y, the address of the PWM data is immediately incremented by 1 and the original data is taken back to output the next data D1.

Now, in the last data of one cycle of data, the data EN
The determination of D is Y'', the last data is output, and before entering the next cycle, the PWM data is initialized and also taken at the beginning.

In this way, data for one cycle is output one after another, and the frequency 1 and the voltage (2) are determined from the carrier period Tφ and the data unit timer T2 (V), and a desired PWM pattern is obtained.

PWM data, carrier period Tφ, data unit timer T
If there is no change in 2, the same data as before is output repeatedly. When the carrier period Tφ and the data unit timer T2 are completely changed, the PWM pattern remains the same as before, but the frequency and voltage change respectively. If you change the starting address of the data address, the carrier N and the number of data K will change.
The W M pattern will be selected. The first address of the data address, the carrier cycle Tφ, and the data register timer T2 are determined in advance by the first microcomputer 5 by comparing and calculating the capacity, current, temperature setting, etc. of the air conditioner.

In this way, an algorithm of the sine wave approximation unequal width PWM method is generated, and smooth rotational speed control of the compressor can be performed.

Effects of the Invention As is clear from the above implementation example, according to the inverter drive control device of the present invention, in the sine wave approximation unequal width PWM method, the ROM area is small and the V/, - pattern is a carrier. The 'HALT' method realizes control using digital values, which can be obtained by operating only the period Tφ and the data unit timer T2, and has smooth and smooth change characteristics. In comparison, this embodiment has an epoch-making effect in that it realizes switching of the carrier period Tφ and the data unit timer T2 to be completely opened.

That is, since the carrier period Tφ and the data unit timer T2 can be switched synchronously, it is possible to easily switch the carrier and PWM data pattern during a frequency change, which was extremely difficult in the conventional analog system.

Therefore, even if the inverter is used in the rotational speed range, has a wide axis range, and has a high speed, even if the same sine wave approximation waveform is required in the entire range, it will be possible to respond as required.

-! In addition, the PWM data pattern may be the same for the voltage boost by negative a:i as long as the data unit timer T2 is changed.

In particular, by controlling the system using a microcomputer, the current rotational status can be controlled rationally as a system without the need for special feedback, making it reliable. In addition to improving performance, it also saves space and reduces costs.

In addition, since the carrier period Tφ and the data unit timer 12 are synthesized using the same reference frequency, there is no mutual error unlike that seen in analog timers, and highly accurate ilj control for frequency, voltage, and voltage is possible. becomes possible.

Furthermore, since the ROM area of the second microcomputer is small, one microcomputer can have various patterns for the number of carriers N and the number of data depending on the application, making it possible to create a system system! By changing only the first microcomputer for the pass, the sine wave near 1 or more PW
The M drive 1b control device can be configured for multiple types of printing.

[Brief explanation of drawings]

Figure 1 is a block diagram of the impermanent stem, Figure 2
ri x 7:17/1 Invert/7 system block diagram, Figure 3 is a voltage waveform diagram applied to the transistor and compressor in the same system, Figure 4 is an explanatory diagram of "carrier ° ° in the same system, Figure 6 (a). (b') is an explanatory diagram of different voltages applied to the same compressor, respectively. and kya)j
Timing diagram of the data area explaining the a period τφ, No. 7
Figure f'i V/f pattern diagram when data unit timer T2 is constant in the same system, Figure 8 ta), (
b) is a timing diagram of different data areas explaining the data unit timer T2, FIG. 9 is a V/r pattern diagram when the data unit timer is changed by 1°, 2°, and 10th
Figure (a). [b) is a data area timing diagram for different constant voltage regions, FIG. 11 (d) is a V/l pattern diagram including constant voltage region, and FIG. 12 is a V/1 pattern diagram including low frequency voltage boost.
A pattern diagram, Fig. 13 is a circuit diagram of an inverter and a noise cutting device showing an example of the present invention, Fig. 14 is a block diagram of the inverter drive control device, and Fig. 16 is a block diagram of the inverter and drive control device. Figure 16 is a diagram of the v/1 pattern that realizes voltage boost in the device; Fig. 18 is a flowchart of data unit timer T2 processing in the inverter drive control device, and Fig. 19 is an explanatory diagram of the PWM data area in the ROM in the inverter drive control device. Flow smoothing section, 2... Inverter, 3... Compressor, 4... Impark drive ITJ control circuit, 5... First microcomputer, 6...Second microcomputer,
7...Reference station TFT, several oscillation circuit, 8.9...
...System clock, 10...Tφ timer frequency divider (signal generation means), 11...T2 timer frequency divider (signal generation means), 12...1st control section of the microcomputer, 13...2nd
Microcomputer controller/LzilS, 1
4... Address counter, 15... Second
ROM of microcomputer, 16...2nd
Data latch of microcomputer, 17...
・ROM0 of the first microcomputer Agent's name Patent attorney Toshio Nakao V-1 person Figure 4 T4) X N Figure 5 Figure 6 = Time opening Figure 7 Figure 8 T2 (2) KK Figure 9 Figure 10 T2(') 'K - Time r4 12(3)xK -

Claims (1)

[Claims] A first microcomputer having a carrier N, a signal generating means for generating a first timer signal corresponding to the carrier H and having a carrier period Tφ that determines the rotational speed of the motor; A signal generating means for generating a second timer signal constituting voltage data consisting of a plurality of steps giving components, and a voltage is applied to the 41 motor in a time domain where the data is stored in the order of generation and the voltage data does not go out of order. a second microcomputer having a ROM having a HALT area with an output equal to or smaller than the first microcomputer; A second microcomputer is provided with the same input/stem clock, and a motor rotation frequency command is input to the first microcomputer, and a second clock is generated using the first timer signal and the second microcomputer. A controller is provided for outputting T2 data for a timer signal to the second microcombicoater, and in the second microcomputer, data access is started at the first. Second timer: The next data access is performed by the second timer, and the first data access is performed by the second timer. An inverter drive control device in which second timers are set as independent digital values, and the second microcomputer outputs the electric power.