JPH0552156B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to an inverter drive control device suitable for drive control of compressors for air conditioners, refrigerators, etc., and industrial induction motors of relatively low output.

Conventional configuration and its problems The control method of the inverter that drives the electric motor includes
Several methods are known, such as PAM and PWM, but among them, the sine wave approximation unequal-width PWM method improves power supply utilization, reduces the weight and size of equipment, reduces the amount of radio noise, and reduces noise and vibration. It has become the mainstream in recent years.

The sine wave approximation PWM method is a method that generates a PWM algorithm so that the integral value of the voltage applied to the motor windings approximates a sine wave, as shown in FIGS. 3 and 5.

Here, the "HALT" method, which is the basis of the present invention, will be explained as a conventional example.

FIG. 1 is a block diagram of the inverter system. 1 is a rectifying and smoothing unit that generates direct current from a commercial power supply, 2 is an inverter, 3 is an electric motor, and 4 is an inverter drive control circuit.

Next, FIG. 2 shows an example configured for use in an air conditioner. 1' is a smoothing rectifier, 2' is an inverter using transistors, 3' is a three-phase compressor, 4' is an inverter drive control circuit, 4a is a PWM algorithm generator, 4b is a photocoupler, and 4c is a transistor base. This is a driver that supplies current.

The signal generated by the PWM algorithm generator 4a is optically insulated and amplified by a photocoupler 4b, then supplied to a driver 4c, and after current amplification, is supplied to an inverter 2' to drive a compressor 3'. The transistors of the inverter 2' are composed of three pairs, one upper and lower, and the upper and lower arms each perform switching operations that are inverted from each other.
They cannot be turned on at the same time.

FIG. 3 shows the signals applied to each transistor and the voltage waveforms applied to the compressor.

U, V, and W indicate the base signals of the upper arm transistors, respectively. Also, U-V, V-
W and W-U are voltage waveforms respectively applied to each winding of the compressor 3'. As is clear from the figure,
The voltage applied to the compressor is configured to approximate a sine wave when integrated, and the period of this voltage pattern determines the rotation speed of the compressor.

Next, the PWM algorithm will be explained. Figure 4 shows the concept of "carrier".

In FIG. 4, the half period of the sine wave is divided into equal parts by an integer N. This N is called a "carrier", and the period Tφ divided into N equal parts is called a "carrier period".

If voltage data is given as a pulse width every carrier period Tφ, an algorithm can be constructed as shown in FIG. 3.

Next, the voltage values applied to the compressor will be explained with reference to FIG. Assume that a constant voltage is generated using the algorithm shown in FIG. 5a. If the respective pulse widths are increased proportionally, the waveform becomes as shown in FIG. 5b, and the integral value also increases proportionally.
That is, the output voltage can be increased or decreased in proportion to the pulse width.

Next, the pulse width and "HALT" that determine the voltage will be explained using FIG. 6.

There is time for the data area divided into multiple parts within the carrier cycle Tφ, and the remaining time is “HALT”
shall be called a region. Voltage data is not output in this HALT region.

Now assume that the data area time is sufficiently short with respect to the carrier period Tφ1. This state is shown in Figure 6a.
Shown below. Next, as shown in Figure 6b, the carrier period is
Let Tφ be 1/2 and Tφ2. At this time, if the data area time is constant, the frequency will be doubled (carrier period 1/2) and the output voltage V will also be doubled. This is because the pulse width relative to the carrier period Tφ is doubled.

Therefore, if the data area time is constant and the carrier period Tφ is changed, the frequency will change in inverse proportion to the carrier period Tφ, and the voltage V will change in proportion to the frequency.
increases or decreases.

The appearance of this V/pattern is shown in FIG.

At this time, the "HALT" period also changes as a "data suspension period."

Next, details of the data area will be explained with reference to FIG.

The data area explained in _FIG.
shall be. That is, the voltage is divided into K resolution logic patterns, the values of which are given by the data unit timer _T2 .

Naturally, the larger the values of the carriers N and K explained above, the closer the voltage applied to the compressor can be to a sine wave.

In FIG. 8a, the carrier cycle Tφ is Tφ1, and the data unit timer _T2 is _T21 . Next, as shown in Figure 8b, the data unit timer _T2 is set to 2.
Double it to T ₂ 2. At this time, the data area time (T ₂ ×K) is doubled, and the "HALT" time is relatively reduced.

At this time, the output voltage V is doubled. When the carrier period Tφ is further changed from this result, each V/pattern becomes as shown in FIG.

Next, in FIG. 9, as the voltage V increases, the "HALT" region shown in FIG. 8 decreases. As the temperature rises further, there is a point where the "HALT" area disappears. If the voltage applied to the compressor is smoothed and the rectified DC voltage value is constant, this point becomes the limit. Therefore, if the frequency is increased beyond this point, the voltage V will reach a ceiling, resulting in a constant voltage change.

This situation will be explained using FIG. 10.

As shown in Figure 10a, the “HALT” area is set to O,
The carrier period Tφ3 is equally divided by the number of data K, and a data unit timer T ₂ 1 is provided. In other words, Tφ3=K
×T ₂ shall be 1. Next, as shown in FIG. 10b, if the frequency is increased and the carrier period Tφ is set to Tφ4, T ₂ 3 can be obtained from Tφ4=K×T ₂ 3. At this time, the data area time ratio in the carrier period Tφ is the same in both cases, so the voltage V is constant in both cases. This situation is shown in FIG.

Next, the relationship between the inverter output and the load will be explained.

If the load is a resistive load, the inverter output is proportional to the square of the voltage.

On the other hand, regarding a compressor, the amount of work is proportional to the amount of refrigerant displaced within the cylinder, so when the rotation speed is low, the displacement is small, and when the rotation speed is high, the displacement increases.

In other words, a certain proportional relationship is required between the frequency and the output voltage.

However, in actual electric motors (compressor motors), iron loss, copper loss, etc. increase in the low frequency range, so
As shown in Figure 2, a so-called boost function is required to adjust the voltage upward in the low frequency range.

In the conventional example, the carrier cycle Tφ and the data unit timer _T2 are configured with analog timers, the frequency is set by the carrier cycle Tφ timer, and the timer is corrected to the data unit timer _T2 according to the setting value of the carrier cycle Tφ timer. was added to realize the boost curve.

The greatest advantage of this "HALT" method is that the PWM algorithm generation pattern can be realized in just one cycle over the entire frequency range by simply changing the values of the carrier cycle Tφ and the data unit timer _T2 .

The above is the configuration of the conventional example, but the carrier cycle
Configuring Tφ and data unit timer T ₂ with analog timers has the advantage that each timer value can be finely modified using external parts, and the carrier cycle Tφ and data unit timer T ₂ can be adjusted independently. When the frequency range used becomes wide and approximation by a sine wave is desired, it becomes necessary to switch the carrier N and the number of data K depending on the frequency band.

In other words, in the low frequency range, the resolution of the waveform becomes rough and the waveform is distorted, making it necessary to increase the carrier N and the number of data K. In the high frequency range, when the carrier N and the number of data are large, transistor switching becomes difficult. Since speed becomes an issue and the idle time of the transistors in the upper and lower arms becomes relatively large, resulting in a drop in output voltage, it is necessary to select small values for both the carrier N and the data number K.

In the analog timer method shown in the conventional example, the PWM generated data itself can be switched by selecting an external data area such as ROM when changing the carrier or the number of data, but switching between the two types of analog timers is transient. It is difficult to switch smoothly. If the carrier cycle Tφ or the data unit timer _T2 is switched even slightly, the desired frequency and voltage will momentarily become different values, resulting in overcurrent of the compressor, locking, and sometimes destruction of the power transistor. This is very problematic as it can lead to

In addition, analog timers have various problems such as frequency drift due to temperature changes, reliability problems such as aging, and space, reliability, and cost problems due to complicated system configurations. There is.

OBJECT OF THE INVENTION The present invention aims to eliminate the above-mentioned conventional drawbacks.
The same reference frequency is input to two microcomputers, the carrier period Tφ, and the data unit timer _T2.
The objective is to protect the compressor and improve the reliability of the system by operating each independently and digitizing them, and by simultaneously switching the carrier period Tφ and the data unit timer _T2 .

Structure of the Invention In order to achieve this object, the present invention comprises two microcomputers each having signal generation means for independently operating and digitizing the carrier cycle Tφ and the data unit timer _T2 , and In order to simultaneously switch the period Tφ and the data unit timer _T2 , the same reference oscillation frequency is input to the two microcomputers as the system clock, and the first microcomputer changes the carrier period according to the input motor rotation frequency command. The device generates Tφ by its own signal generating means, outputs this signal to the second microcomputer, and outputs _T2 data for the data unit timer _T2 signal generated by the second microcomputer. It is.

With this configuration, the second microcomputer accesses the ROM data using the carrier period Tφ and the data unit timer _T2 signal, and constitutes an inverter drive control device using a sine wave approximation PWM method using the "HALT" method.

DESCRIPTION OF EMBODIMENTS The inverter drive control device of the present invention will be described below with reference to FIGS. 13 to 19 showing one embodiment thereof.

FIG. 13 is a circuit diagram, and FIG. 14 is a block diagram.

In FIG. 13, 5 is a first microcomputer, and 6 is a second microcomputer.
7 is a reference frequency oscillation circuit, which is input to the OSC terminal of each microcomputer 5, 6. 1st
The microcomputer 5 receives a 50/60Hz commercial frequency input and a motor rotational frequency command.
set is input. Further, from the first microcomputer 5 to the second microcomputer 6, a signal with a carrier period Tφ created by the first microcomputer 5 and a signal T ₂ for the data unit timer T 2 created by the second microcomputer ₆ are transmitted. Data is output. A PWM signal is then output from the second microcomputer 6 to the electric motor.

FIG. 14 is a block diagram.

input to the first microcomputer 5
50/60Hz is the commercial frequency input for creating the system's sequence timer. In order to drive the compressor, a means to gradually change the frequency toward the target frequency is required, and this input constitutes a timer that provides the speed at which the frequency is changed. -set is an input that gives a target frequency, and the frequency gradually approaches the value set in this input.

The reference oscillation input is frequency-divided by system clocks 8 and 9 to obtain a system clock output. This system clock is input to the Tφ timer frequency divider 10, the _T2 timer frequency divider 11, and the control units 12 and 13, and the control units 12 and 13 execute the program and set the carrier period Tφ and the data unit timer _T2 . It becomes the standard to create.

The carrier cycle Tφ and the frequency division value of the data unit timer _T2 are stored in the ROM 17 of the first microcomputer 5 corresponding to each frequency, and are applied to the -set input value input to the first microcomputer 5. The data of the corresponding carrier period Tφ and the data unit timer _T2 are passed through the control unit 12, and the data of the carrier period Tφ is sent to the Tφ timer frequency divider 1.
0, the data of the data unit timer _T2 is sent from the control unit 12 to the control unit 13 of the second microcomputer 6, and the data of the _{T2 timer} frequency divider 11 of the second microcomputer 6 is set to 0.
is set to

The carrier period Tφ created by the first microcomputer 5 is input to the second microcomputer 6, and the carrier period Tφ created by the second microcomputer 6 is input to the second microcomputer 6 by interrupt processing together with the data unit timer _T2 created by the second microcomputer 6. is input to the control unit 13 of the address counter 14
The ROM 15 storing PWM data is sequentially accessed, and U, V, and W phase data are sequentially output via the data latch 16 instructed by the control section 13.

Functions necessary for system control, such as refrigeration cycle processing, communication processing with the indoor control microcomputer of the separate air conditioner, four-way valve, fan motor processing, current control, and defrosting control are performed by the control unit 12 of the first microcomputer 5. Processed in

Next, the outline of digital processing will be explained using FIG. 15 and FIG. 16.

FIG. 15 is a V/pattern diagram for realizing boost in the low frequency range according to the present invention.

As mentioned above, V/slope is a data unit timer.
_T2 , and the frequency is determined by the carrier period Tφ
Therefore, all you have to do is plot the intersection of the voltage value of each desired boosted frequency shown in Fig. 12 and T ₂ x, and output each combination of Tφ - T ₂ as data. become.

FIG. 16 explains digital processing of an area where the "HALT" area is short.

The number of data K is 6 here, and the data D1~
I'll call it D6. _T2 data unit timer
and the carrier period is Tφ.

First, when the "HALT" time is greater than the carrier period Tφ, after outputting "HALT" as shown in FIG. 8, the signal of the carrier period Tφ is waited.
The next data D1 is output in synchronization with the next carrier cycle Tφ.

Next, if the next carrier cycle Tφ comes while the “HALT” time is shorter than the data unit timer _T2 ,
After outputting "HALT" for the time of data unit timer _T2 , data D1 to D6 are output. At this time, the output time of data D1 to D6 is determined by the data unit timer.
Leave _T2 as is.

Next, if the carrier cycle Tφ comes while the data D6 is being output, the next "HALT" is not output, and the data D6 is continuously output for the period of the data unit timer _T2 . During this time, the address of the PWM pattern data is set to +2 next time. In other words, data D1 is skipped and accessed. Here, the PWM pattern data is determined in advance so that the data before and after each "HALT", that is, the data D6 and the next data D1 have the same logical value. Since the data D6 output for the second time is now the same as the next data D1, the result is as if the "HALT" area had disappeared and the data had been output continuously.

As the frequency increases further, the "HALT" period is always the data unit timer T ₂ , but the existence rate of "HALT" itself decreases, and the total "HALT"
The period ratio decreases and the voltage increases.

Further, when the voltage reaches the upper limit, the "HALT" period completely disappears, and the relationship Tφ=6T ₂ is established. This state has already been explained using FIG.

To further increase the frequency, the carrier period Tφ may be shortened while maintaining the relationship Tφ=6T ₂ .

Next, the 17th flowchart for realizing the embodiment is shown.
As shown in FIG.

FIG. 17 shows the Tφ timer section processed by the first microcomputer 5. FIG. 18 shows the _T2 timer and
This shows PWM waveform output processing. Further, the data contents of the ROM 15 shown in FIG. 14 are shown in FIG. 19.

The PWM data area in the ROM shown in FIG. 19 stores one cycle of a sine wave approximation PWM waveform continuously, and includes U _H , V _H , W _H , U _L , V _L , W _L ,
data, HALT data indicating a “HALT” period, and DATAEND data indicating the end of one cycle of data are respectively assigned.

Further, the timing of actual waveform output is shown in FIG. FIG. 16 illustrates one output of U, V, and W.

First, as shown in FIG. 17, the target frequency -set is input to the first microcomputer 5.
Tφ data and _T2 data according to the frequency
It reads from the table in the ROM 17, outputs _T2 data to the second microcomputer 6, sets a Tφ timer, and outputs the Tφ signal to the second microcomputer 6 after determining whether the time is up.

Next, as shown in FIG. 18, the second microcomputer 6 first initializes the PWM data, reads the _T2 data output from the first microcomputer 5, sets the _T2 timer, and sets the time up. Wait and proceed to the next program.
Then read the PWM data from the ROM and
Determine END. Since the data is not END at first, a HALT judgment is performed next. Since this is the first data, it becomes "N" and the data is output. Next, read the second data. Data is sequentially output by repeating this process. After the data has been output up to D6, "HALT" becomes Y, and at this point, the interrupt signal and carrier cycle Tφ sent from the first microcomputer 5 are determined.
If the carrier period Tφ is not input at this point, it outputs “HALT” and waits until the carrier period Tφ interrupt arrives. When the carrier period Tφ is accepted as an interrupt input, it returns to the original state and outputs the next data D1. Do this.

If "HALT" becomes Y and the interrupt input of carrier cycle Tφ is "Y" at this point, the address of the PWM data is immediately incremented by 1 and returns to the original state in order to output the next data D1.

Now, for the last data of one cycle of data, the data END determination is "Y", the last data is output, and before entering the next cycle, the PWM data is initialized and the process returns to the beginning.

In this way, data for one cycle is output one after another,
The frequency and voltage V are determined by the carrier period Tφ and the value of the data unit timer _T2 , and the desired
A PWM pattern can be obtained.

If there is no change in the PWM data, carrier cycle Tφ, and data unit timer _T2 , the same data as before is repeatedly output. When the carrier period Tφ and the data unit timer _T2 are changed, the PWM pattern remains the same as before, and the frequency and voltage change respectively. If you change the starting address of the data address, you will select a PWM pattern with a different carrier N and data number K. The starting address of this data address, the carrier cycle Tφ, and the data unit timer _T2 are determined in advance by the first microcomputer 5 by comparing and calculating the capacity, current, temperature setting, etc. of the air conditioner.

In this way, an algorithm for the sine wave approximation unequal width PWM method is generated, and smooth rotational speed control of the compressor can be performed.

Effects of the Invention As is clear from the above embodiments, according to the inverter drive control device of the present invention, the sine wave approximation unequal width
In the PWM method, the ROM area is small, the V/pattern can be obtained by operating only the carrier period Tφ and the data unit timer _T2 , and it can have smooth change characteristics.
This method has an epoch-making effect in that it realizes control using digital values and, compared to conventional analog methods, realizes completely synchronous switching of the carrier cycle Tφ and the data unit timer _T2 .

That is, carrier period Tφ, data unit timer _T2
Since the signals can be switched synchronously, carrier and PWM data patterns can be easily switched during a frequency change, which was extremely difficult with conventional analog systems. Therefore, even if the operating speed range of the inverter becomes extremely wide and high speed, and an equivalent sine wave approximation waveform is required in the entire range, it becomes possible to meet the requirements.

Furthermore, for voltage boost due to the load, the PWM data pattern may be the same as long as only the data unit timer _T2 is changed.

In particular, by including and controlling the system using a microcomputer, the current rotational status can be determined without the need for special feedback, allowing more rational control as a system and improving reliability. , space saving, and cost reduction.

In addition, the carrier period is calculated using the same reference frequency.
Since Tφ and data unit timer _T2 are combined,
There is no mutual error found in analog timers, and both frequency and voltage can be controlled with high precision.

Furthermore, since the ROM area of the second microcomputer is small, one microcomputer can handle the number of carriers N and the number of data K depending on the application.
By changing only the first microcomputer for system control, a wide variety of sinusoidal wave approximation PWM drive control devices can be constructed.

[Brief explanation of the drawing]

Figure 1 is a block diagram of an inverter system, Figure 2 is a block diagram of an air conditioner inverter system, Figure 3 is a voltage waveform diagram applied to the transistor and compressor in the same system, and Figure 4 is a "carrier" diagram in the same system. ”, Figures 5a and b are explanatory diagrams of different voltages applied to the same compressor, and Figures 6a and b are explanatory diagrams of the data area explaining "HALT" and carrier period Tφ in the same system, respectively. 7 is a V/pattern diagram when the data unit timer T ₂ is constant in the same system; FIGS. 8 a and b are timing diagrams of different data areas each explaining the data unit timer T ₂ ; and FIG. The figure shows data unit timer _T2
Figures 10a and 10b are data area timing diagrams for different constant voltage regions, and Figure 11 is a V/pattern diagram when changing the constant voltage region.
A pattern diagram, FIG. 12 is a V/pattern diagram including a low frequency voltage boost, FIG. 13 is a circuit diagram of an inverter drive control device showing an embodiment of the present invention, and FIG. 14 is a block diagram of the same inverter drive control device. Figure 15 is a V/pattern diagram that realizes voltage boost in the inverter drive control device, Figure 16 is a timing diagram of the data area using digital processing in the inverter drive control device, and Figure 17 is the inverter drive control device. Carrier cycle Tφ processing flowchart in control device, 1st
Figure 8 is a flowchart of data unit timer _T2 processing in the same inverter drive control device, and Figure 19 is a flowchart of data unit timer T2 processing in the same inverter drive control device.
It is a PWM data area explanatory diagram. 1... Rectifying and smoothing section, 2... Inverter, 3...
Compressor, 4... Inverter drive control circuit, 5...
First microcomputer, 6... Second microcomputer, 7... Reference frequency oscillation circuit,
8, 9...System clock, 10...Tφ timer frequency divider (signal generation means), 11... _T2 timer frequency divider (signal generation means), 12...Control section of first microcomputer, 13... Control section of second microcomputer, 14...
...Address counter, 15...ROM of the second microcomputer, 16...Data latch of the second microcomputer, 17...ROM of the first microcomputer.

Claims (1)

[Claims] 1 Carrier N and corresponding to this Carrier N,
A first microcomputer includes a signal generating means for generating a first timer signal having a carrier period Tφ that determines the rotational speed of the motor, and voltage data consisting of a plurality of steps giving voltage components in one carrier period. A signal generating means for generating a signal of a second timer, and a ROM having a HALT region storing data in the order of generation and having an output in which no voltage is applied to the motor in a time region where no voltage data exists. 2
A system clock is provided that inputs the same input to the first and second microcomputers, and the first microcomputer inputs the motor rotation frequency command and also controls the first timer. for the signal and the second timer signal made by the second microcomputer.
A control unit is provided to output _T2 data to the second microcomputer, and in the second microcomputer, data access is started by the first and second timers, and the next data access is performed by the second timer. , the first and second
An inverter drive control device that sets each timer as an independent digital value and outputs it to the electric motor from the second microcomputer.