JPS60152182A - Device for pattern recognition - Google Patents

Device for pattern recognition

Info

Publication number
JPS60152182A
JPS60152182A JP59008317A JP831784A JPS60152182A JP S60152182 A JPS60152182 A JP S60152182A JP 59008317 A JP59008317 A JP 59008317A JP 831784 A JP831784 A JP 831784A JP S60152182 A JPS60152182 A JP S60152182A
Authority
JP
Japan
Prior art keywords
circuit
pattern recognition
operational amplifier
signals
line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59008317A
Other languages
Japanese (ja)
Inventor
Kiyoshi Tajima
田島 洌
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd, Sanyo Denki Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP59008317A priority Critical patent/JPS60152182A/en
Publication of JPS60152182A publication Critical patent/JPS60152182A/en
Pending legal-status Critical Current

Links

Landscapes

  • Transforming Light Signals Into Electric Signals (AREA)
  • Image Input (AREA)

Abstract

PURPOSE:To obtain a pattern recognizing device of simple structure and high recognition efficiency by arranging a serial circuit matrix of both photosensitive elements and diodes connected in an adverse series and by commonly connecting one terminal of each line to an operation amplifier. CONSTITUTION:Time division timing pulses t1-t4 which are never overlapped each other are supplied to timing pulse input terminals T1-T4. This impression of pulses activates a serial circuit among sensor S in every line, when signals in correspondence to luminous energy irradiated on a photosensitive element A. These signals are added to an OP amplifier acting as a non-inversion amplifier circuit and are converted into digital signals by an A/D conversion circuit to be sent to a pattern recognizing means.

Description

【発明の詳細な説明】 (イ) 産業上の利用分野 本発明は図形や文字等のパターンを認識するパターン認
識装置に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a pattern recognition device for recognizing patterns such as figures and characters.

(ロ)従来技術 フォトダイオード等の感光素子を用いたパターン認識装
置は多数存在するが、何れも構造が複雑でまた価格の点
で間−があった。
(b) Prior art There are many pattern recognition devices using photosensitive elements such as photodiodes, but all of them have complicated structures and are expensive.

し1 発明の目的 本発明は簡単な構成で高い認識率を示すパターン認識装
置を提供する事を目的とする。
1. OBJECTS OF THE INVENTION It is an object of the present invention to provide a pattern recognition device that has a simple configuration and exhibits a high recognition rate.

に))発明の構成 本発明は感光素子と逆直列接続されたダイオードとの直
列回路を行列に配置し、各行毎の一端を共通接続して夫
々オペアンプに接続すると共に上記直列回路の各列毎の
一端を共通接続してその各接続線に互に重なシ合う事の
ない時分割タイミングパルスを印加し、上記オペアンプ
出力をAD変換回路を経由してパターン認識手段に印加
する構成を有する。
B)) Structure of the Invention The present invention arranges a series circuit of a photosensitive element and a diode connected in anti-series in a matrix, one end of each row is connected in common and connected to an operational amplifier, and each column of the series circuit is It has a configuration in which one ends of the two are connected in common, time-division timing pulses that do not overlap each other are applied to each of the connection lines, and the output of the operational amplifier is applied to the pattern recognition means via an AD conversion circuit.

ホ1実施例 第11閃は本発明パターン認識装置の構成を示しており
 、tA+は感光素子181と該素子と逆直列に接続さ
れたダイオードIDIとの直列回路を行列、図に於ては
4×4個配置したセンナで、各直列回路の各行毎の一端
は夫々一括接続されてオペアンプ(OP)・・・の子端
子に連)、また各直列回路の各列毎の一端は夫々一括接
続されてバソフンア回路(Bu)・・・を介してタイミ
ングパルス入力端子(Tり(T2)(T5)(T4)に
連っている。尚、上記センサ陣)を構成している感光素
子IAIとしては三洋電機(株)製、可視光全スペクト
ルアモルファス光センサ、AM−31[]1が用いられ
、またダイオードID+としてはシリコンダイオード、
18953が用いられている。またオペアンプ(OP)
はLν324が、バッファ回路(B u、 )としては
74LSO5が用いられた。タイミングパルス入力端子
(TI)(T2)(T5)(T4)には第2図に示す如
く互に重なシ合うことのない時分割タイミングパルス(
tl)(t2)(tlり(tA)が供給される。
E1 Embodiment 11 shows the configuration of the pattern recognition device of the present invention, where tA+ is a matrix of a series circuit of a photosensitive element 181 and a diode IDI connected in anti-series with the element, and tA+ is 4 in the figure. x4 sensor arrays, one end of each row of each series circuit is connected together and connected to the child terminal of an operational amplifier (OP)...), and one end of each column of each series circuit is connected together. It is connected to the timing pulse input terminals (T (T2) (T5) (T4) through the basso fan circuit (Bu)...in addition, as the photosensitive element IAI that constitutes the above sensor group). A visible light full spectrum amorphous optical sensor, AM-31[]1 manufactured by Sanyo Electric Co., Ltd. was used, and a silicon diode was used as the diode ID+.
18953 is used. Also operational amplifier (OP)
Lv324 was used for the buffer circuit (B u, ), and 74LSO5 was used for the buffer circuit (B u, ). The timing pulse input terminals (TI) (T2) (T5) (T4) receive time-division timing pulses (which do not overlap each other) as shown in Fig. 2.
tl)(t2)(tl(tA)) is supplied.

オペアンプ(OP)は子端子に信号を入力しているので
非反転増巾回路として動作する。このオペアンプ周辺を
部分的に@5Nに示しであるが、この回路構成に依ると
、入出力(vi、VO)の極性が同じ(ViとvOとが
同相)で1回路の利得(vO/v1)は(1+ Rf 
/ R,)で決定され、入力インピーダンスが非常に高
゛くとれると云う利点がある。また感光素子囚の負荷抵
抗R1を、照度−出力電圧特性から47にΩとし、螢光
灯を光源とする場合には入力(vl)にリップルが出る
ので入力容量01として0.2、μFを付加した。
Since the operational amplifier (OP) inputs a signal to its child terminal, it operates as a non-inverting amplifier circuit. The area around this operational amplifier is partially shown in @5N, and according to this circuit configuration, the input and output (vi, VO) have the same polarity (Vi and vO are in phase) and the gain of one circuit (vO/v1 ) is (1+ Rf
/R,), and has the advantage that the input impedance can be very high. In addition, the load resistance R1 of the photosensitive element is set to 47 Ω from the illuminance-output voltage characteristic, and when a fluorescent lamp is used as a light source, a ripple appears in the input (vl), so the input capacitance 01 is set to 0.2 μF. Added.

しかしこの入力容量は応答速度に直接影響するので、そ
の値の設定には要注意である。
However, since this input capacitance directly affects the response speed, care must be taken when setting its value.

第1図に戻って各オペアンプ(OP)・・・の出力はA
D変換回路(0)を経てマイコンを主構成要素とするパ
ターン認識手段(Pl’l)に印加される。
Returning to Figure 1, the output of each operational amplifier (OP) is A
The signal is applied via the D conversion circuit (0) to the pattern recognition means (Pl'l) whose main component is a microcomputer.

而してタイミングパルス入力端子(T1)(T2)(T
5)(T4)にパルス(tl)(t2)(tB)(tA
)を印加する事に依ってセンナtelのうちの直列回路
を列毎に活性化し、その時に感光素子体)に照射されて
いる光量に応じた信号を得、オペアンプ(OP)、AD
変換回路[01を経てパターン認識手段(PR)に供給
されてパターン認識が行われる。
Therefore, the timing pulse input terminals (T1) (T2) (T
5) Pulse (tl) (t2) (tB) (tA
), the series circuit of the senna tel is activated for each column, and a signal corresponding to the amount of light irradiated on the photosensitive element body (at that time) is obtained, and the operational amplifier (OP), AD
The signal is supplied to the pattern recognition means (PR) through the conversion circuit [01] and pattern recognition is performed.

(へ)発明の効果 本発明は以上の説明から明らかな如く、感光素子とダイ
オードとの逆直列回路を行列に配置して各行毎の一端を
共通接続して夫々オペアンプに接続し、また上記直列回
路の各列毎の一端を共通接続してその各接続線に互に重
なり合う事のない時分割タイミングパルスを印加すると
共に上記オペアンプ出力をAD変換回路を経由してパタ
ーン認識手段に印加するものであるので、構成が簡単で
あるにも拘らず、高い認1W率が期待出来る上に廉価な
パターン認識装置を得る事が出来る。
(f) Effects of the Invention As is clear from the above description, the present invention arranges anti-series circuits of photosensitive elements and diodes in a matrix, and connects one end of each row in common to each operational amplifier. One end of each column of the circuit is commonly connected, and time-division timing pulses that do not overlap each other are applied to each connection line, and the output of the operational amplifier is applied to the pattern recognition means via an AD conversion circuit. Therefore, although the configuration is simple, a high recognition 1W rate can be expected and an inexpensive pattern recognition device can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明パターン其忍識装置の構成を示す電気回
路図、第2図は同装置に用いるタイミングパノνスの波
形図、第3図はその主要部の電気回路図であって、18
+はセンナ、 tA)は感光素子、(OP)はオペアン
プ、を夫々示している。 出願人 三洋電機株式会社 代理人弁運士 佐 野 静 夫
FIG. 1 is an electric circuit diagram showing the configuration of the pattern recognition device of the present invention, FIG. 2 is a waveform diagram of the timing panosu used in the device, and FIG. 3 is an electric circuit diagram of the main parts thereof. 18
+ indicates senna, tA) indicates a photosensitive element, and (OP) indicates an operational amplifier, respectively. Applicant: Sanyo Electric Co., Ltd. Agent: Shizuo Sano

Claims (1)

【特許請求の範囲】[Claims] 1)行列に配置された感光素子と該素子と逆11゛列に
接続されたダイオードとから成る直列回路の各行毎の一
端を共通接続し7て夫々オペアンプに接続すると共に上
記直列回路の各列毎の一端を共通接続してその各接続線
に互に重なり合う事のない時分割タイミングパルスを印
加し、上記オペアンプ出力をAD変換回路を経由してパ
ターン認識手段に印加して成るパターン認識装置。
1) One end of each row of a series circuit consisting of photosensitive elements arranged in a matrix and diodes connected to the elements in inverse 11' columns is commonly connected and connected to an operational amplifier, respectively, and each column of the series circuit is connected in common. A pattern recognition device comprising connecting one end of each line in common, applying non-overlapping time-division timing pulses to each connection line, and applying the operational amplifier output to a pattern recognition means via an AD conversion circuit.
JP59008317A 1984-01-19 1984-01-19 Device for pattern recognition Pending JPS60152182A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59008317A JPS60152182A (en) 1984-01-19 1984-01-19 Device for pattern recognition

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59008317A JPS60152182A (en) 1984-01-19 1984-01-19 Device for pattern recognition

Publications (1)

Publication Number Publication Date
JPS60152182A true JPS60152182A (en) 1985-08-10

Family

ID=11689774

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59008317A Pending JPS60152182A (en) 1984-01-19 1984-01-19 Device for pattern recognition

Country Status (1)

Country Link
JP (1) JPS60152182A (en)

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