JPS60146365U - 発光ダイオ−ドアレイヘツド - Google Patents

発光ダイオ−ドアレイヘツド

Info

Publication number
JPS60146365U
JPS60146365U JP1984034544U JP3454484U JPS60146365U JP S60146365 U JPS60146365 U JP S60146365U JP 1984034544 U JP1984034544 U JP 1984034544U JP 3454484 U JP3454484 U JP 3454484U JP S60146365 U JPS60146365 U JP S60146365U
Authority
JP
Japan
Prior art keywords
light emitting
emitting diode
diode array
array head
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1984034544U
Other languages
English (en)
Inventor
鮫島 一博
勝 大西
賢一郎 岡
Original Assignee
三菱電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to JP1984034544U priority Critical patent/JPS60146365U/ja
Publication of JPS60146365U publication Critical patent/JPS60146365U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate

Landscapes

  • Dot-Matrix Printers And Others (AREA)
  • Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
第1図は従来のLEDアレイヘッドの構成を示した図で
あり、第2図は本考案の一実施例を示した図である。 図において、1,7は基板、2は負荷抵抗、31.32
.33はポンディングパッド、4に給電線、5はLED
アレイチップ、6はドライバチップである。

Claims (2)

    【実用新案登録請求の範囲】
  1. (1)基板上に複数の発光ダイオードを有する発光ダイ
    オードアレイチップを複数千鳥状、あるいは−列状に配
    列した発光ダイオードアレイヘッドにおいて、上記発光
    ダイオードアレイチップに近接して駆動用チップを配置
    し、上記発光ダイオードアレイチップ上のホンディング
    パッドと上記駆動用チップ上のポンディングパッドとを
    直接接続したことを特徴とする発光ダイオードアレイヘ
    ッド。
  2. (2)発光ダイオードアレイチップまたは駆動用チップ
    のすくなくともいずれか一方が各発光ダイオードの発光
    出力を安定化させる負荷抵抗を有していることを特徴と
    する実用新案登録請求の範囲第1項記載の発光ダイオー
    ドアレイヘッド。
JP1984034544U 1984-03-09 1984-03-09 発光ダイオ−ドアレイヘツド Pending JPS60146365U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984034544U JPS60146365U (ja) 1984-03-09 1984-03-09 発光ダイオ−ドアレイヘツド

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984034544U JPS60146365U (ja) 1984-03-09 1984-03-09 発光ダイオ−ドアレイヘツド

Publications (1)

Publication Number Publication Date
JPS60146365U true JPS60146365U (ja) 1985-09-28

Family

ID=30538010

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984034544U Pending JPS60146365U (ja) 1984-03-09 1984-03-09 発光ダイオ−ドアレイヘツド

Country Status (1)

Country Link
JP (1) JPS60146365U (ja)

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