JPS6014371B2 - text processing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention is an apparatus for automatically processing and printing text content and format, comprising: an input device for inputting characters to be printed; a storage device; a serial printing device; and an underlining device.

In offices, typed texts are recorded so that they can later be printed out at high speed and processed appropriately, and the printed text can be recorded with centered headings and There is a strong need for complete formatting of pages with registered printed lines.

In fact, an automatic printing device of this type would eliminate the time required to type text several times, for example for a personal standard letter, since this would be required to handle the same text several times. This is because it eliminates the time spent on

Moreover, it very often happens in offices that there is a need to send circular letters or standard letters that differ only in address or a few lines of typeface, so that the need to send out circular letters or standard letters that differ only in address or a few lines of font is very common, so A need has arisen for an automatic printing device that assembles parts in a desired order. Various automatic printing devices are known in which text is printed in the form of an original or an underprint and is simultaneously recorded on a perforated tape. In one of these known devices, the text is corrected after it has been printed and this correction is placed in the manuscript or underprint so that it can be identified by the operator. To correct the tape recorded on the tape, the operator commands the extraction of text from the perforated tape and the simultaneous printing on the paper. The operator then stops printing the document at the point where various corrections are made. In this way, the text is re-recorded in the correct form on the perforated tape and
It is then printed. This type of automatic printing device has the disadvantage that the operator cannot call up any point in the text to make corrections, since the entire text has to be reprinted each time up to the point where the glitch appears. .

In this way, correction becomes very laborious and time consuming. Other automatic printing devices introduced data through a thousand boards into the memory of a central processing unit located at a point at a certain distance, and this data was displayed visibly on a cathode ray screen. Are known.

The operator can correct this visually displayed text by actuating the appropriate keys on the keyboard. In this way the contents of the memory of the central processing unit can be changed. Then when the text is to be printed
The processing device supplies the encoded characters of the correct text to the typewriter. However, this printing device has the disadvantage that it is expensive because it needs to be connected to a processing device.

Additionally, print line length, margins, insertions, and deletions are difficult for the operator to control as long as they are related to the central processing unit program. Finally, other automatic printing devices are known, which are also connected to a processing device and include a keyboard, a cathode ray screen for visually displaying the data, and a working memory.

The printed text is visually displayed and recorded in working memory. The operator then makes corrections on the spot and when the text is complete it is transferred to a central processing unit which retransmits it for printing at the operator's request. This printing device also has the disadvantage of being expensive in practice because it is difficult to recall the correct points.

Furthermore, this device has the disadvantage that the degree of correction to be made to the text cannot be easily changed as long as the text is written in the program of the processing device. There is also a very present need in offices to be able to obtain records that can be examined easily and quickly in order to avoid wasting time in manual searches of documents. Furthermore, a need arises for so-called "cross-indexing", ie for recording or filing documents under different keywords depending on the circumstances. For example, documents are filed under three keywords such as "Series Number,""Document Issue Date," and "Case Number."
During a search, when it is necessary to retrieve all documents issued with exactly the same seal, the keyword "issue date" is used; on the other hand, when it is necessary to retrieve all documents related to exactly the same case, the keyword "issuance date" is used. "Case number" is used. Of course, the user must be able to select various keywords in relation to his or her own document file and search requirements. For example, the filing or indexing of keywords is different when the device according to the invention is used in a private office or an accounting firm. Are known. Keywords relating to individual documents are recorded by the operator in a program contained in the memory of the central processing unit. When a worker wants to search for a document, he sends data related to the document to the central processing unit through a terminal device connected to the central processing unit.
The central processing unit then performs the search and sends the results to the terminal, which visually displays the results of the search on a screen or paper. However, this type of device has the disadvantage that it is not independent, both because it requires the use of a central processing unit and because the central processing unit itself is very expensive to purchase or rent. This device further provides that the keywords related to a given file are recorded in a predetermined program of the computer, so that when the user wants to obtain another file, he has to change the program of the computer, thus creating a new file. The disadvantage is that it is necessary to employ trained technicians to record the data related to the system. Other information retrieval devices are also known in which information is recorded on microfilm.

When a worker wants to search for a document, he or she communicates keywords related to the desired document to the central processing unit. The central processing unit performs the search and sends the document number so that the operator can retrieve the microfilm. This type of device has the disadvantage of requiring the use of a central processing unit as well as a device for projecting the microfilm;
As a result, it is uneconomical. According to the present invention, a manual input device includes a device for inputting text information, a storage device for storing the input text information, and a serial printing device for printing read text information on separate lines.
a device for automatically underlining a portion of a text whose starting and ending points are defined by two underlining signals input by the input device independently of word spaces; An underlining signal is stored in the memory device and causes all of the portions of the text to be applied during one scan of the marking device and under the control of the stored underlining signal. A text processing device is provided which is provided with a device for causing the portion to be printed to be underlined during every other scan of said portion.

The present invention will be described below with reference to the drawings.

The following description is given in the following order. Preface (page 11) Central unit (page 14) Execution of instructions (page 44) First group of instructions (page 52) Second group of instructions (page 63) Third group of instructions (page) Fourth Groups of instructions (page 78) Interrupts (page 83) Typewriter controller (page 93) Command keyboard controller (page 101) Magnetic tape storage, controller (page 102) Introduction of instructions to the central unit (page 116) Recording text (page 128) Correcting text (page 149) Correcting words (page 159) Printing corrected text (page 163) Recording the format of the first example file (page 17) Reading the file (Page 184) Correcting files (Page 193) Searching for documents (Page 196) Second example of operation Second embodiment (Page 210) Preface The automatic printing bag hawk according to the present invention includes a processing device 39 and a core storage device. 42 (FIG. I).

The central device 5 includes a typewriter 6, a magnetic tape storage device 7,
and a group of peripheral devices including an instruction keyboard 8. The typewriter 6 is connected to the central unit 5 through its own control unit 9, which is adapted to transmit the commands and data coming from the typewriter 6 in an appropriate form to the central unit 5 and vice versa. The typewriter 6 is of a known type and has an input/output device 12 adapted to encode and decode characters coming from the central unit 5 and to send associated instructions to the typewriter 6. The typewriter 6 is an input/output device of the central device 5.

In fact, it will become clear from the following description that ``the typewriter 6 enters texts and sends them to the storage 42 of the central unit 5, selects the processing operations to be accomplished by the automatic printing device, and processes the It is possible to print the text in its final form.Magnetic tape storage device 7
is also connected to the central device 5 through its own control device 10.

The storage device 7 is adapted to contain all commands directed to the printing device, which commands are selected from time to time and transferred to the storage device 42 of the central unit 5. The storage device 7 is further adapted to contain a magnetic record of the text entered by the typewriter 6. These texts are retrieved from time to time by a worker and entered into the central unit 5 for the purpose of being printed by a typewriter 6.
The command keyboard 8 is connected to the central unit 5 via a further control device 11 and has a plurality of keys, each associated with a command of a particular group of devices.

These keys therefore make it possible to select the corresponding group of commands without using the typewriter 6. During the first cycle, the text to be processed is entered in the typewriter 6 which at the same time prints out the text itself and, via the input/output device 12 and the control device 9, into the storage device 4 of the central unit 5. transfer it to .

From there the text is transferred through the control unit 10 to the tape storage 7 to be recorded. The worker can now correct or change the text by adding or changing lines or clauses, changing line lengths, and correcting typographical errors. To accomplish this task, the worker writes a set of commands corresponding to the changes he wishes to make on a typewriter or command keyboard 8.
Select by. Each group of instructions is identified by a label consisting of, for example, four symbols, so that it can be easily selected.

As a result of this operation, the selected group of instructions are transferred from tape storage 7 to storage 42 of central unit 5 and put into operation. Thus, the central unit 5 executing the selected instructions transfers it to the tape storage 7 after processing the text. In this way the text is recorded in the desired form and then printed by a typewriter. The operations described above are accomplished by central unit 5 executing a set of instructions recorded on tape storage 7.

Central Unit The central unit 5 includes a timing circuit or timer 20 (FIG. 2) adapted to provide the necessary timing signals for the flow of data within the central unit 5 itself.

The two timers essentially consist of an oscillator 21 (FIG. 3) which combines a signal C (FIG. 4) with a frequency of 64 megacycles. This signal is passed through six flip-flops F
The shift register 22 (
3), this shift register 22 performs its entire cycle during 12 periods each having a duration of 2 microseconds. 6 flip-flops FI-F
6 output signals are shown in FIG. 4 and each designated by the reference symbol TI-T6.

In order to obtain the signals necessary for timing, the outputs of the six flip-flops FI-F6 are coupled together via gate circuits, the outputs of which constitute the timing signal of the central unit 5. For example, a flip-flop FI' is coupled to a flip-flop F3 for the purpose of obtaining the signal TS. More specifically, the direct output of flip-flop F3 is supplied to one input of AND gate circuit 24 via inverter 23 (FIG. 3), and the output of flip-flop FI is supplied to the other input of circuit 24. Therefore, the output TS of the circuit 24 is at level "1" when the outputs of the flip-flops FI and F3 are 1 and 0, respectively.
It is in. On the other hand, in another case, the output TS is
0". Therefore, the other flip-flop FI-F6
It is clear that all other timing signals shown in FIG. 4 can be obtained by appropriately combining the outputs of .
The central unit 5 further has a register 30 (FIG. 2) with a capacity of 3 bits and consisting of three flip-flops.

Register 30' has three inputs 30a, 30b and 3
0c, which are connected to a typewriter 6 (FIG. 1), an external storage device 7, and an operating keyboard 8, respectively. Register 30 (FIG. 2) is further provided with three outputs 31a, 31b and 31c, which are connected to corresponding inputs 30a, 30b or 30 of register 30.
The same number of inputs to the logic circuit 31 is adapted to feed the code of one 8-bit type character indicating the peripheral device which has activated c into a register 32 having an 8-bit capacity. More particularly, during the execution of an instruction by the central unit 5, the peripheral device 6, 7 or 8 may interrupt this execution in order to send data or instructions to the central unit 5.

For this purpose, at this time the peripheral device 6, 7 or 8
Corresponding input 30a, 30b or 3 of ladder register 30
0c and thus the input 31a, 31b or 31c of the logic circuit which supplies the corresponding 8-bit type character. Furthermore, the respective inputs 31a, 31b and 31
In the case of two peripheral devices that simultaneously activate c, the logic circuit 31 selects the one of these two peripheral devices that is superior to the other and responds to this device according to the priority order given as an output. Eight bit shapes are provided. For this purpose, the logic circuit 31
consists essentially of a coupling circuit with three inputs and eight outputs. The voltage values of these eight outputs selectively configure the shapes of eight bits corresponding to each of inputs 30a, 30b and 30c. three inputs 31a,
31b and 31c are further arranged in a well-known manner such that each of these inputs 31a, 31b and 31c conditions a corresponding combination of eight bits only when the input with higher priority is at the 0 level. It is connected to the logic circuit 31 in a similar manner.

For example, input 31b can provide a combination of eight bits associated therewith as output from logic circuit 31 only when input 31a is at level "0". This clearly requires input 31a to be dominant over input 31b. The same is true when comparing input 31c with input 31b. As previously mentioned, the output of logic circuit 31 provides the same number of inputs to resistor 32.

The output of register 32 is connected via channel 33 to reset logic 34 . Reset logic circuit 34
has three outputs 34a, 34b, 34c, each of these outputs relates to a combination of eight bits sent to this circuit from register 32 through channel 33; therefore, reset logic circuit 34 Outputs corresponding to combinations of eight bits present in channel 33 are energized from time to time. Each of the outputs 34a, 34b and 34c is connected to a corresponding reset circuit for the three flip-flops forming the resistor 30, so that when one of these outputs is energized, the corresponding reset circuit of the resistor 30 is Flipf.

is cleared. In this way, for example input 30
When two signals are simultaneously present as inputs to the register 30, such as a and 30b, the logic circuit 31
An 8-bit type character corresponding to the higher priority peripheral associated with input 31a, namely typewriter 6, is fed into register 32. As a result, this character is sent through the channel 33 to the logic circuit 34, which energizes only the output 34a corresponding to the typewriter 6. Therefore, the flip-flop of register 30 corresponding to the higher priority peripheral, i.e. input 3
The flip-flop connected to 0a is cleared. In this way, after the operation associated with the higher priority peripheral is performed, the flip-flop of register 30 corresponding to the lower priority peripheral, ie, the flip-flop connected to input 30b, is activated. Stay as you are. The register 32 is therefore filled with the corresponding 8-bit type character and the operations described above are then repeated, so that the central unit 5 always takes into account the peripheral devices according to a predetermined priority order. The output of register 32 is further connected through channel 40 to another register 41. This register 41 is exactly the same as the register 32 and forms the input register of the core memory 42. The characters stored in register 41 are transferred through channel 43 to counting circuit 44. The operation of this counting circuit 44 is well known and is adapted to increment the characters introduced into it through channel 43 by one unit amount. The output of the counting circuit 44 is connected to the input of the resistor 32. In this way, the contents of register 41 are incremented by one unit amount whenever eight dot shapes are fed into it through channel 40. As will be explained in more detail below, this allows sequential recall of the elements of storage 42 containing the data or instructions of the program in progress. The bits contained in input register 41 are also transferred to address decoding circuit 45 of storage device 42 .

Based on the shape of the eight bits present in register 41, decoding circuit 45 is adapted to select one of the cores of storage device 42. Core storage 42 has a capacity of 1024 8-bit type characters and is divided into four areas, each called a page, each page having a capacity of 256 characters. Each page is identified by code numbers 0, 1, 2, and 3, respectively. Ten bits are therefore required to identify a component of the storage device 42, namely two bits to identify the page and eight bits to identify the component within the identified page. Two bits are required. The storage device 42 consists of eight identically configured core matrices arranged in eight planes.

Each core matrix is formed of 32 rows and 32 columns for a total of 1024 cores, so each matrix has a capacity of 1024 bits. As is known, each core of storage device 42 is traversed by four conductive wires. a write or inhibit lead, a read or sense lead, and two addressing leads. More specifically, each inhibit or sense conductor passes in series through all cores of each side, so there are eight sense conductors and eight inhibit conductors. On the other hand, two addressing conductors are arranged at right angles and intersect each core. Each addressing conductor passes in series through all cores arranged in the same row and column of the eight matrices. More specifically, the addressing conductors associated with the first row and first column of the core matrix pass in series through all cores located in the first row and first column of each matrix. Therefore, there are a total of 32 addressing conductors. The decoding circuit 45 may be comprised of any known type of combinational circuit and will therefore not be described in detail. More specifically,
The decoding circuit 45 has eight input conductors to which are fed the signals present in the register 41, and thirty-two outputs which are connected in sequence to thirty-two pairs of addressing conductors. Each core is selected when the two addressing conductors that intersect it are energized simultaneously. Each pair of addressing conductors is energized according to the particular shape of the signals present on the eight input conductors of the decoding circuit 45, thus selecting a corresponding group of eight cores placed in the zero state. In order to introduce the information coming from one of the devices 6, 7, 8 to the core of the storage device 42 selected in this way, these peripheral devices are connected to the storage device described below through channels formed by eight conductors. Device input logic circuit 47
is connected to the input of The output of this logic circuit 47 is formed by eight conductors forming a transmission channel 48. These conductors are connected to the corresponding inhibit conductors of each of the eight matrices of storage device 42. A current is sent through the inhibit conductor corresponding to the core to which it is desired to write a 0 so as not to cause a switch or change in the state of the selected core, whereas it is desired to write a 1. A change of state is effected in a known manner through the conductor corresponding to the core.

Similarly, to read information stored in a core, logic circuit 47 sends currents opposite to those sent during writing to the addressing conductors of the pair, so that only those cores in which a zero was recorded A switch occurs.

Therefore, only the sense conductor passing through the core with a recorded zero will be overloaded. Eight sense leads are connected to output register 501 through output channel 49 of storage device 42.

The information retrieved in storage 42 and recorded in output register 50 may have different meanings. In fact, this is the data to be sent to the peripheral device 6, 7, 8, or the storage address to be used subsequently, or later the storage device 4.
2 or data to be temporarily stored as to be transferred to another address in storage 42 or during the execution of a set of instructions. This relates to the code of the instructions to be executed by the central unit 5. For this purpose, register 5
0 is connected to peripheral devices through channel 50 to transmit data read in storage 42 to them.

Register 50 further connects register 4 through channel 55.
1 to feed it the storage address to be used next. Register 50 is further connected through channel 56 to an 8-bit register 57 to feed data to be temporarily stored therein. Additionally, register 50 is connected to an 8-bit register 59 through channel 58.
is connected to and feeds the instruction code into it. The data to be temporarily stored in register 57 comes from register 32 apart from register 50. For this purpose, the output of register 32 is passed through channel 66 to register 57.
is connected to the input of The register 59 is connected through an output channel 60 to a decoding circuit 62, which decoding circuit 62 receives as many i instructions as the number of instructions used by the central unit 5.
3 outputs 62, 62,8. Decoding circuit 62
is a combinational circuit of the type described with respect to circuit 31. As explained in more detail below, each instruction is identified by an 8-bit type code.

The first four bits of this code distinguish one instruction from the remaining twelve, and the second four bits constitute the so-called "address change signal", the meaning of which will be explained below. Circuit 62 connects channel 60 of the 13 output conductors.
One output lead is energized corresponding to the instruction represented by one of the four bits present.

The outputs 62, 62, 8 of the decoding circuit 62 provide commands to a command logic unit 63, which is hereinafter designated by the symbol COMO.
I......A series of commands directed by the COM 27 are supplied in a manner to be described later, and these series of commands control data transfer within the central unit 5. More specifically, these commands open the gate circuits shown as circles in Figure 2, thus passing information from one register to the other along the transmission channel in which these circuits are inserted. or enable transfer from storage device 42 (FIG. 2) to one of the registers 50, 57, 59 connected thereto to execute the respective instruction. In FIG. 2, near each gate circuit is shown its specific operating instructions.

For example, command COMOI opens gate circuit 64 which transfers the contents of register 32 to channel 40.
This makes it possible to transfer the data to the register 41 through the .
Register 59 is divided into two parts each formed from four flip-flops.

The first four flip-flops are sent the first four bits of the instruction code which define the type of instruction. The outputs of these flip-flops are collected into channel 60'. The second four flip-flops of register 59 are sent the bits forming the change signal. The output of these flip-flops is channel 61
are collected in. The bits in the change signal have different meanings depending on the type of instruction.

More specifically, the bits of the change signal are
The page of the storage device to which the given address belongs is derived from the information or command expressed by the command.
One peripheral device can be identified. Further, a bit in the change signal can indicate that the address or data should be increased by one unit. In the first case, the bits of the modified signal are present in channel 64 and are used by a decoding circuit 65 of the same type as circuit 62, which has three outputs 65, . The peripheral device is selected based on the content of the change signal that energizes one of 652 and 653.

Thus, through the channel 51, the decoder circuit connects the register 50 with the selected peripheral device to effect a silent data transfer between the central unit 5 and the selected peripheral device. If the bits of the change signal indicate a page of storage, the gate circuit 121 is opened by the command logic 63 so that the first two bits of the change signal are passed through the channel 70 to the register 71 with a capacity of 2 bits. Therefore, this register 71 is sent to the storage device 4.
Store the address of page 2.

The contents of register 71 and the contents of register 41 form one complete storage address, which is formed from the ten bits defining the 1024 element portions of storage 42, as described above. The contents of registers 71 and 41 are mutually modified or static, since the bits placed individually in the two registers 59 and 32 are fed into them through respective channels 70 and 40. This possibility makes it possible, for example, to specify data on the same page of the storage device 42 while keeping the contents of the register 71 constant. The page number is determined by the decoding logic circuit 4 through a channel 71 as described below.
5. Command logic device 63 and register 59
It is also conditioned by the bits of the modified signal stored in and transmitted to it by channel 75. Conductive wire 76 further connects logic circuit 31 to command equipment 63. In this manner, logic circuit 31 issues a signal on conductor 76 each time peripheral device 6, 7, 8 interrupts and energizes one of the flip-flops of register 30. This signal is then used by the command logic to generate commands related to the interrupt itself. The operating state in which the central unit 5 is executing a command is given the name '1 machine operating state'.

Each machine operating state has a duration of 2 microseconds and is defined by a time signal TS, the process of which is illustrated in FIG. At each machine operating state thus defined, a series of command logic circuits 63 (FIG. 2) are generated as a function of the signals present at their inputs, which, as previously described, represent individual commands. More specifically, these instructions are executed by the central unit 5 through a series of machine operating states. The operation to be performed by the central device 5 in each state is uniquely defined. For this purpose, the command logic 63 has two blocks 63A and 6
It has 3B. Block 6 shown in detail in FIG.
3A determines a series of machine operating conditions in which selected instructions are performed based on input signals sent by function decoding circuit 62. Block 63B shown in FIGS. 6-12 for each machine operating state
is a series of operating commands COMOI related to the selected command.
- Generates COM27. More specifically, block 63
A is the conductor 62, -62 coming from the disconnection circuit 62 as an input.
, 8 (FIG. 2), and these conductors 62, - 62, 8
each is associated with one of 13 instructions.

In addition, block 63A has as inputs another series of four flip-flops in register 59 and leads 75 and 76 respectively from register 31, and lead 100 coming from storage input logic 47. Each machine operating state is defined by the activation of the corresponding output MA-MG of a series of flip-flops FA-FG included in block 63A. Since each mechanical operating state has a duration of 2 microseconds, each of the flip-flops FA-FG must remain energized for a time interval equal to 2 microseconds. To achieve this, a timing signal TS is introduced into block 63A, which is passed through AND circuits DA-DG to flip-flops FA-FG.
energizes the input. The outputs MA-MG of flip-flops FA-FG condition block 63B so that the commands associated with the individual commands are generated during each state. More specifically, the sixth block constituting the block 63B
Each circuit shown in the figures to FIG. 12 has a corresponding signal MA.
- energized by MG and conditioned by the same input signal to block 63A. Since it is necessary to time a number of commands COMOI-COM 27 within a range of machine operating conditions, the timing signals TR, TI and TM (
4) is also entered as an input into the circuitry of block 63B.

The command COMOI-COM27 generated by block 63B' of logic device 63 further acts on input logic circuit 47 (FIG. 2) of memory device 42.

This logic circuit 47 also has two channels 80 and 81 as inputs, each of these having a capacity of 8 bits. Channel 80 has a source from the resistor 50, and channel 81 has a source from the resistor 57. Logic circuit 47 further has a channel 82 as an input, which channel 82
has a capacity of 2 bits and is sourced from register 71.
Channels 80, 81 and 82 are connected to registers 50, 57
and 71 are transferred to the input logic circuit 47 so that they are processed therein according to the corresponding commands COMO1-COM27 generated by the command logic circuit 63. The results of these processing operations, represented by eight bit combinations, are sent through output channel 48 to the element portion of storage device 42 identified by the address contained in addressing register 41.

More specifically, the logic circuit 47 receives commands COM03, COM
14 and COM 17 simply transfers the data present at its input to output channel 48 when it is acted upon.

In fact, command COM03 acts on gate circuit 85 (FIG. 13), so that the bits present in channel 80 coming from register 50 are transferred to channel 48. The commands COM14 and COM17 acting on the two gate circuits 86 and 87 respectively output the bits present in the channels 81 and 46 on the output channel 48.
Deciding to transfer to.

In this way, characters present in register 57 (FIG. 2) and characters coming from one of peripheral devices 6, 7, 8 are introduced into storage 42 without being processed. On the other hand, when the command COM06 acts on the logic circuit 47, the characters present in the input channel 80 are counted by the counting circuit 88.
It is incremented by a unit amount and then transferred through gate circuit 89 to output channel 48 .

When command COMI9 is generated, input channel 8
The eight bits present in 1 are introduced into a switching circuit 90;
This circuit 90 exchanges the first four bits with the second four bits in a known manner. The new character thus obtained is passed through the gate circuit 91 to the output channel 4.
Transferred to 8. Logic circuit 47 (FIG. 2) may further compare the contents of register 50 with the contents of register 57.

More specifically, when the command COM20 is present, a comparator circuit 98 of a known configuration is activated and the two registers 5 are
Compare their contents coming in from channels 80 and 81 from 0 and 57. The comparison performed by comparison circuit 98 means whether the characters present in the two registers 50 and 57 are the same or different. The result of this comparison is represented by bit E generated by comparator circuit 98 and sent on line 95. This bit is equal to one when the characters present in the two registers 50 and 57 are equal, and equal to zero when they are different. Bit E is sent through conductor 95 to a 1-bit capacity register 96 (FIG. 2).

The contents of register 96 are sent to register g7 having the same configuration as register 96 when command COM26 is generated. Conversely, command COM13 causes a reverse transfer.
Through lead 100, bit E can condition the operation of command logic 63 during the execution of a particular instruction. Furthermore,
When command COM21 is present, uncircuit 92 (FIG. 13) generates an AND between the eight bits present in input channels 80 and 81, respectively.

The result of this operation consists of one 8-bit type character, which is passed through gate circuit 93 to output channel 48.
will be forwarded to. On the other hand, when command COM22 is present, circuit 94 generates an exclusive OR between the bits present in input channels 80 and 81, respectively. As is known, the result of this logical operation is equal to 1 when the two bits are different and equal to 0 when the bits are equal. This result is then transferred to output channel 48 through gate circuit 99. As previously mentioned, all groups of instructions that condition the operation of central unit 5 are recorded in magnetic tape storage 7 (FIG. 1) in the form described below.

In order for these groups of instructions to be executed by the central unit 5, they must be transferred from this memory 7 to the core memory 42 (FIG. 2) one at a time. After this, the instructions forming the selected group are executed by the central unit 5 on a daily basis. A particular group of instructions, referred to as the "initial instruction group", is used to transfer the group of instructions from tape storage 7 to core storage 42 . This group of instructions consists of 64 characters and external storage 7
The information is recorded on two predetermined positions by magnetic tape within the computer. The control device 10 of the storage device 7 is configured to check the two storage device addresses in which the names of the first instructions are recorded, using a method that will be described later.

When these addresses are verified, it begins transferring the "first set of instructions" in the manner described below. During normal operation, the central unit 5 is inactive, so all its registers are cleared. When timer 20 (FIG. 2) generates signal TS, output MA of flip-flop FA is forced to level 1 via AND circuit DA (FIG. 5), so that central unit 5 is placed in state A. At this time, the AND circuit 112 (FIG. 6) of the block 63B activated at time mS generates a command COMOI to open the gate circuit 64 (FIG. 2), and transfers the contents of the register 32 to the register 41. Therefore, a transfer to the decoding circuit 45 occurs. Furthermore, output MA generates a direct command COM18 (FIG. 6) which opens gate circuit 113 (FIG. 2) and transfers the contents of register 71 to circuit 45. Since the address 0000000 of the storage device 42 has been cleared, it is now sent to the decoding circuit 45.The contents of the corresponding storage element section are now transferred to the output register 50.Control of the tape storage device 4 The device 10 has already selected the character to be sent to the central device 5 during this time and sends this character to the input channel 46 in the manner described below.

The AND circuit 114 (FIG. 6) of block 63B
OM17 is generated, and this command is sent to the gate 87 of the circuit 47 (
13) to transfer the first character present in the channel 46 from the tape storage device 7 to the device section in the core storage device 42 designated by the decoding circuit 45.

At the instant TR (FIG. 4) following the time interval TS, the AND circuit i15 (FIG. 6) of block 638
04, and this command is sent to the gate circuit 116 (Fig. 2).
, and transfers the contents of register 41 incremented by one unit amount from the counting circuit to register 32.

In this way, the bit shape 000 is stored in the register 32.
00001 is sent to increment the address of storage 42 by a unit amount. The central unit 5 then controls the operation of the controller 10 of the storage device 4 so that it selects the next instruction to be introduced into the storage device 42 and into the channel 46. Next, the same operation as described above is repeated, and successive pieces of information are stored in the element section 00000001 of the storage device 42.
recorded in In this way, 64 of the first set of instructions
characters are recorded in the first 64 element portions of the storage device 42. Since each machine operating state has a duration of 2 microseconds, the transfer of the entire initial group of instructions has a duration of 128 microseconds. When the contents of register 32 reach the binary value 64, the weighted value flip-flop 64 of register 32 takes the value 1 and therefore generates signal R64, which opens AND circuit 120 (FIG. 6) of block 63B.

AND circuit 120 is now connected to flip-flop 35 (second
3), so that the output BT of this flip-flop 35 takes the value 0. At the same time, the register 32 is connected to the AND circuit 121 (sixth
3), since the output signal BT of the flip-flop 35 is 0. The result is therefore that at this moment all registers of the central unit 5 (FIG. 2) have been cleared and that the first set of instructions has been recorded in the memory 42. This group includes instructions that send the next instruction to storage 42. All subsequent instructions begin at state A.

However, for these instructions flip-flop 35 is disabled, in other words its output BT has the value 0. When the commands COMOI and COM18 (FIG. 6) are generated again, the addresses of the elements of the storage device 42 recorded in the registers 32 and 71 are transferred to the decoding circuit 45 (FIG. 2). Therefore, the contents of this element section are read out and transferred to the output register 501.
Therefore, when BT=0, reading from the storage device 42 is performed. As is known, reading the core memory 42 is destructive, so it is necessary to rewrite the information that was lost in the selected device portion.

For this purpose, block 63 is opened by the signal BT.
The AND circuit 123 (FIG. 6) of B generates a command COM03, which closes the gate circuit 85 (FIG. 13) of the logic circuit 47 and transfers the contents of the register 50 (FIG. 2) to the storage device 4.
2 to the same element part in which they were stored at the instant TR. Command COM04 transfers the contents of register 41 incremented by one unit to register 32. The AND circuit of block 63B (FIG. 6) is controlled by the signal BT via an inverter to generate the command COM05 at the moment TR following the moment TS. This command opens gate 124 (FIG. 2) and transfers the contents of register 50 representing the first character of the instruction to register 59, so that during state A the first character of the instruction is read. . Similarly, the signal B is passed through the inverter (Fig. 5).
AND circuit 124 of block 63A controlled by T
energizes the flip-flop FB via the AND circuit DB at the instant TS, so that the output M of this flip-flop
The old one will be level 1.

At the same time, flip-flop FA is deenergized, so that central unit 5 moves from state A to state B. During state B, common commands COMO1, C are applied to all commands.
OM18 and COM03 are generated, and these commands transfer the contents of the element section of the storage device 42 identified by the contents of the register 32 to the output register 501 and then transfer these contents to the storage device 42 as described above. write to the same element part.

These operations during state B cause the reading of the second character of the instruction because the address stored in register 32 has been incremented by one unit amount during state A. . During state B, instructions relating to the individual instructions are also generated by block 63B based on the contents of register 59, which still contains the code of the instruction.

The first four bits of this code are sent via channel 60 to a decoding circuit 62 which activates an output corresponding to the instruction represented by the four bits entered as input. As will be known later, the world power remains energized for the entire time necessary for the execution of the command itself.
conditions the generation of a command. Instruction Execution Execution of individual instructions by the central unit 5 will be explained.

Thirteen instructions are given to execute any program,
and these represent 2 characters each consisting of 8 bits.
formed by one or a combination of three. The first letter of each command is used to characterize the command itself and has the following format: boblb2b3b4b5b
6b7 The first four bits bo-b3 represent the code of the instruction and the second four bits b4-b7 represent the change signal.

Instructions have essentially two types with respect to the number of characters forming them. The first type of command consists of three characters, the first of these defines the command, the second and third
The th character specifies the address of the element section of the core memory bag 42 on which the instruction itself acts.

The contents of these element parts are hereinafter referred to as arithmetic numbers. More specifically, the operand whose address is defined by the second character of the instruction is called the first operand, and the operand whose address is defined by the third character of the instruction is called the first operand through the second operation. Sent to 62. During state B, this decoding circuit decodes the code of the instruction, during which commands COMO1, COM18 and COM03 are generated, which read the second character of the instruction, i.e. the address of the first operand. cause Corresponding to the code of this instruction, the decoding circuit 62 outputs 62, (
2 and 7) and thus block 63B.
The output of the OR circuit 130 (FIG. 7) is energized. When bit b5 of the instruction change signal has the value 1, the second character of the instruction stored in register 50 (FIG. 2) must be rewritten to storage 42 incremented by one unit amount. No.

In this case, all inputs to AND circuit 131 (FIG. 7) of block 63B are at level 1, so circuit 131 generates command COM06. This command opens gate 89 (FIG. 13) of circuit 47, resulting in register 6
Characters containing 0' are sent to circuit 98 through channel 80.
, and this circuit 98 is incremented by one unit amount. This is then transferred to storage device 42 via channel 48. On the other hand, when bit b5 of the change signal is 0, the output of AND circuit 131 (FIG. 7) is at 0 level, and as a result, command COM06 is not generated.

During state B, AND circuit 30 of block 638 is now energized, so command COM04 is generated at instant TR to open gate circuit 116 (FIG. 2) and, as previously described, register 41 and incremented by one unit amount by counting circuit 44 to register 32. At the same moment TR (FIG. 4), another AND circuit 132 of block 63B (FIG. 7)
The output of 8 is energized, resulting in the generation of command COM15. This command opens gate circuit 146 (FIG. 2), which causes the transfer of the contents of register 50 to register 57. During state B, therefore, the second assertion of the instruction representing the address of the first operand is executed and this is then transferred to register 57. When bit b5 is equal to 1, this address is further incremented by one unit amount and rewritten to the storage device. A transfer to state C of the central unit 5 now occurs.

For this purpose, the output 6 of the decoding circuit 62 during state B is
27,62,o,62,. and 62,3 (FIG. 5) are all level because only output 62, corresponding to instruction TRA, is energized. These outputs via inverter circuit 134 energize the corresponding inputs of band circuit 133 of block 63A. Furthermore, since the output 626 of the circuit 62 is also at the 0 level, the inverter 1
35 to input 1 of the OR circuit 137 of block 63A.
36 is energized. In this way, the AND circuit 133 of block 63A is activated and this
The input 138 of another AND circuit 139 of A is energized. The other input of this AND circuit 139 is a flip-flop F
Since the output of B is connected, the fund circuit DC is momentarily energized to TS, and as a result, the flip-flop F
C puts the output MC at level 1. At the same time, AND circuit D
C resets flip-flop FB, so that central unit 5 moves from state B to state C. State C is used for reading the first operand.

In fact, the AND circuit 140 (FIG. 8) of block 638 generates the command COMIO at instant TS. This command opens gate circuit 41 (FIG. 2) of channel 55 and causes the transfer of the first address from register 50 to addressing register 41. When the address of the first operand belongs to the current page, bit b4 of the change signal of instruction TRA has the value 1, so that input 142 of AND circuit 143 (FIG. 8) is activated.

Additionally, input 144 of circuit 143 is energized through the inverter because output 626 of decoding circuit 62 is at level 0. Therefore, the AND circuit 1 43 is the command CO
M18 is generated, which is the contribution register 71 as mentioned above.
A command is given to transfer the contents of (FIG. 2) to the address decoding circuit 45. On the other hand, when bit b4 is at level 01, command COM18 is not generated and address decoding circuit 4
No bits are sent to 5, so the page of storage selected is page 0.

At the same time, the contents of the memory device element section selected by the address of the first arithmetic operation are read out and the contents are transferred to the output register 50.

At the instant TR (FIG. 4), the AND circuit 145 (FIG. 8) is energized and the command COM15 is generated. This command opens gate circuit 146 (FIG. 2) and causes the transfer of the first operand from register 50 to register 57. Finally, the command COM03 is sent to another AND circuit 146 (Fig. 8).
, which instructs the writing of the same information that has been read into the element portion of storage device 42.
Thus, in state C a first readout of the operand takes place, which is rewritten into the element section in which it was previously located and transferred to the register 57. A transfer of central unit 5 to state D then takes place.

In fact, the output 62, of the decoding circuit 62 has the value 1, so that
OR circuit 147 (FIG. 5) of block 63A is energized, resulting in input 148 of AND circuit 149 being energized. The other input 150 of the AND circuit 149 is a flip-flop. Since the flip-flop FD is activated by the flip-flop FC, the flip-flop FD is activated by the AND circuit DD at the moment TS. At the same time, the AND circuit DD resets the flip-flop FB, so that the central unit 5 moves from state C to state D. State D is used to determine the address of the element to which the first arithmetic operation is to be transferred. In fact, at time TS (4th
), AND circuit 165 (FIG. 9) of block 63B generates the command COMOI, which is in turn connected to gate circuit 64 (second
) and transfer the contents of the register 32 to the register 41. Since the contents of the register 32 have been increased by one unit amount during the period of state C, the addressing register 41 is stored following the element portion from which these contents were expressed during the period of state C. The address of the device element section is sent. When bit b6 of the change signal is 1, it is called the current page number.

The second type of instruction consists of two characters, the first of which defines the instruction and the second of which specifies the storage device 42.
Determine the address of the element part of the arithmetic number in .

The second type of instructions are called external instructions because, as explained below, they transfer instructions or information from the central device 5 to one of the peripheral devices 6, 7, 8 connected to it, or vice versa. This is because it makes it possible. The thirteen instructions are divided into four groups with respect to the machine operating conditions required for their execution, which are described in detail below.

First group of instructions 5 states A for the first group of instructions
, B, C, D, E belong to the instructions executed by the central unit 5.

The time required for their execution is therefore 10 microseconds. These instructions are transfer (TRA), exchange (S
CA), comparison (CFR), conjunction (AND), exclusive OR (EXOR), free transfer (TRL) and later individually with reference to Tables 1 and 2 shown below. Explained in detail.

1 Transfer (TRA) The transfer instruction identified by code 1000 performs the transfer of the first operand from the address defined by the second character of the instruction to the address defined by the third character.

As mentioned above, the addresses of the elements of the memory device 42 are such that each memory element is identified by the page number and the number of elements within that page. In fact, the instructions are arranged in such a way that the addresses of all the operands related to the instructions of one program are located on the same page of storage, precisely called the "current page". Furthermore, during the execution of one program, as described later,
An operand or instruction having an address belonging to page 0 is referenced. Therefore, the operand or instruction belongs to either the "current page" or "page 0". The bits b4 and b6 of the change signal are supplied in the manner described below, which code relates to the page of storage to which the operand of the instruction belongs.

When bit b4=1, the storage element defined by the second character of the instruction (the address of the first operand) belongs to the current page; when bit b4=0, it belongs to page 0. When bit b6=1, the storage element defined by the third character (the address of the second operand) belongs to the current page; when b6=0, it belongs to page 0. Furthermore, during the execution of one program, after the execution of one instruction, the memory addresses of two operands are set to 1.
It is necessary to increase or not increase by the unit amount.

This conclusion is represented by the values taken by bits b5 and b7. When bit b5:1, the address of the first operand is increased by one unit amount after execution of the instruction; when b5=0, it remains unchanged. The same thing happens for the address of the second operand when b7=1 or b7=0, respectively. As mentioned above, the instruction TR
The code of A is asserted during state A and register 59 (FIG. 2) is selected by command COM 18 by AND circuit 156 (FIG. 9). In fact, in this case the outputs 62,2 and 62,3 of the decoding circuit 62 are
and energizes AND circuit 156 along with bit b6 through two inverters. Circuit 113 (Figure 2)
Via the command COM 18, the contents of the page register 71 are now transferred to the addressing register 45. register 71
These define the current page since the content of has not been changed during the previous state. When bit b6 is 0, command COM18 is not generated by AND circuit 156 (FIG. 9), so no bit is sent to addressing circuit 45, causing page 0 to be selected. At the same time, the storage element selected by the third character of the instruction, ie the address of the element to which the first operand is to be transferred, is addressed.

These contents are then transferred to output register 50.
Furthermore, the command COM03 (Fig. 9) is sent to the flip-flop FD.
and this causes the read address to be rewritten to the selected element portion. When bit b7 of the change signal is 1, it is the AND circuit 157
Energize the input (Figure 9).

Since the output 62,2 is at level 0, the other input is also energized, and as a result, the AND circuit 157 becomes the OR circuit 158.
Therefore, the AND circuit 159 is activated. At this time, the AND circuit 159 generates the command COM06, which, as described above, instructs the memory device input circuit 47 ( Figure 2). During the period of state ○, a command COM04 is generated in the AND circuit 16 at the moment TR, and as described above, this command COM04 is sent to the register 3.
2 (Figure 2) is increased by one unit amount. lastly,
At the moment TS (Fig. 2) AND circuit DE (Fig. 5)
is energized, which directly sets the flip-flop FE, so that the output ME becomes PERU.

The AND circuit DE also resets the flip-flop FD, so that the central unit moves from state D to state E. State E is used to transfer the first arithmetic operation stored in register 67 during state C to the element portion of storage device 42 whose address was retrieved during state D.

In fact, at instant TS a command COMIO is generated by the AND circuit 161 (FIG. 10) of block 63B and this acts on the gate circuit 141 (FIG. 2) to be read during state D and to register 50'. This causes the sent address to be transferred to the register 41. When bit b6 is 1, AND circuit 162 (FIG. 10) outputs command CO.
M18 is generated, which is the page register 71 as described above.
(FIG. 2) is caused to be transferred to the addressing circuit 45.

Since the output 62 of the circuit 62 corresponding to the transfer command is at the bell 1, the OR circuit 163 (FIG. IO) is activated, and therefore the AND circuit 164 is activated. In this way, a command COM14 is generated, which acts on the memory device input circuit 47 (FIG. 13) in the manner described above to select the memory device selected by the decoding circuit 45 of the first operand contained in the register 57. Transfer to the element section occurs. Therefore, state E
The first operand during state B is identified by the third character identified during state D from the element corresponding to the address identified by the second character of the instruction retrieved during state B. The data is transferred to the element section corresponding to the address. In the pork information mS following the above-mentioned operation (FIG. 4), the flip-flop FE (FIG. 5) energizes the input 166 of the AND circuit 167 unless an interrupt by one of the peripheral devices 6, 7, 8 intervenes. do.

The other input 168 is activated via an inverter 169 by the signal T indicating an interrupt, since it has the value 0. The output 204 of AND circuit 167 energizes flip-flop FA via AND circuit DA, so that the central unit can move from state E to state A and begin execution of the next instruction. 2 Exchange (SCA
) The exchange command (SCA) is identified by code 1010 and performs a transfer to the element defined by the third character of the first character expressed within the element defined by the second character; Swap the first four bits of the first instruction with the second four bits.

This instruction change signal has the same meaning as the instruction TRA change signal. The instruction SCA is confirmed by the decoding circuit 62,
This circuit 62 produces a signal 622 as an output.

This instruction is executed in exactly the same way that instruction TRA, described above, was executed. The only difference is that during state E, AND circuit 175 (FIG. 10), energized by output 622, generates command COMI9. This command acts on storage input circuit 47 in the manner described above to cause the transfer of the contents of register 57 (FIG. 2) to the selected storage element, exchanging the two groups of bits. 3 Compare (CFR) The Compare Instruction (CFR) is identified by code 1001 and it performs a bit-wise comparison between the first operand and the second operand, the result being stored in register 96 of central unit 5 ( (FIG. 2).

This instruction change signal has the same meaning as the previous instruction change signal. Command CRF is verified by circuit 62, which now generates a signal at output 633.

Instruction CFR is executed in a similar manner to instruction TRA. The only difference is that during state E commands COM03 and CO
This means that M20 is generated. In fact, command COM03 is now generated by AND circuit 176 (FIG. 10) and this causes the writing of the contents of register 50 to the selected storage element, ie the writing of the second operand. The command COM20 is generated by the AND circuit 177 (FIG. 10) in the twinkling spoon ml (FIG. 4) and is sent to the memory input circuit 47 (FIG. Figure 2)
and if the two contents are the same then bit E=
1 is sent to register 96. 4 Logical product (AND
) The instruction AND is identified by code 1111 and provides a bitwise conjunction between the first operand and the second operand.

This instruction change signal has the same meaning as the previous instruction change signal. The instruction AND is verified by circuit 62, which now produces signal 624 as an output.

This instruction is executed in exactly the same way as instruction CFR.
The only difference is that during state E, output 624 energizes AND circuit 178 (FIG. 10) and that AND circuit 17
8 generates the command COM21. This acts on the storage input circuit 47 to provide an AND between the contents of registers 50 and 57 as described above.
The result of this comparison, represented by eight characters, is transferred to the storage element that previously contained the second operand.

This means that during state E, the second operand is in register 41.
This is made possible by the fact that it exists in 5 Exclusive OR (ORE) The instruction ORE is identified by code 1110 and provides a bitwise exclusive OR between the first operand and the second operand.

The result of this operation is stored in the second arithmetic element in memory 42. The change signal for this command also has the same meaning as the change signal for the previous command. The instruction ORE is identified by circuit 62, which now produces as output a signal 625 and acts similarly to the instruction AND.

The only difference is that during state E, the output 625 is in the band circuit 1.
79 (FIG. 10) and this circuit 179 generates the command COM22. As previously discussed, this command acts on the storage input circuitry so that an exclusive OR function is achieved. 6 Free transfer (TRL)
) A free transfer command (TRL) is identified by the code 1011 and is different from the case of the command TRA by the third character from the element part identified by the second character in any part of the memory 42. The first operation number is transferred to the identified element section.

The page to be transferred is bits b6 and b7 of the change signal.
Identified by When b6=b7=0, the address defined by the third character belongs to page 0, and b6=0
When b7=1, it belongs to page 1, and when b6=1, it belongs to page 1.
When 7=0, it belongs to page 2, and when b6=b7=1, it belongs to page 3. Bits b4 and b5 of the change signal are bits b4 and b of the change signal of instruction TRA.
It has the same meaning as 5. The command TRL is identified by a circuit 62 which now outputs a signal 6 as an output.
2, 2, and during state ○, the output 62 energizes the OR circuit 180 (FIG. 9) and this circuit 1
80 is executed in the same manner as command TRA, except that command COM27 is generated.

This command COM 27 acts on the gate circuit 185 (FIG. 2) to transfer to the decoding circuit 45 bits b6 and b7 of the change signal representing the address of the page in the memory device to which the first operand is to be transferred. Second group of instructions For this group, represent the first operand and the second of the instructions.
Instructions related to constants displayed by the th sentence year belong to it.

These instructions are Transfer Constant (TRC), Transfer Constant Free (TLC), and Compare Constant (CDC). These commands are sent to states A, B, C, D by the central unit 5.
, E. The time required for these executions is therefore 8 microseconds. These instructions are outputs 62.o, 62.3 and 62, . It is related to These are instructions (TRA), (TRL) and (
CFR).

In fact, the operations performed in states A and B are exactly the same as those performed by the corresponding initial set of instructions. More specifically, during state A the code of this instruction is retrieved and during state B the second character, here representing a constant, is read. Since the constant is now computed during state B, there is no need to perform state C, which is used to read the first operand in storage 42 by the corresponding instruction of the first group. Here output 62,
o? 62, 8, 62, . Since one of the signals is always level, the OR circuit 186 (FIG. 5) is energized.

This circuit energizes the input 187 of the AND circuit 8 fins.
Further, the other input turtle 89 is energized by the flip-flop FB, and as a result, the AND circuit 188' is also energized by the time TS.
(Figure 1) Flip-flop FD is energized via AND circuit DD. The AND circuit DD further resets the flip-flop FB and "acts on the corresponding reset circuit,"
As a result, a change from state B directly to state ○ occurs. 1
Transfer Constant (TRC) The Transfer Constant instruction (TRC) is identified by code 1100 and performs the transfer of the constant represented by the second character of the instruction to the element identified by the third character of the instruction.

This constant can be incremented or not incremented by one unit after execution of the instruction under the control of bit b5 of the change signal. When b5=0, the constant remains unchanged; when bit b5=1, the constant is increased by one unit amount. The storage address defined by the third character can be incremented or not incremented by one unit amount under the control of bit b7 of the change signal.

When b7=0, this address is left unchanged, and when b7=1, this address is incremented by one unit amount. It should be noted that bit b4 of the change signal is always 0 and is not used.

Therefore, bit b6 of the change signal is used to define the page of storage to which the address represented by the third character belongs.
is used. When b6=0, this address is page 0
, and when b6=1, this address belongs to the current page. The command TRC is verified by circuit 62, which then produces as output signal 62,o.

As mentioned above, this signal moves the central unit 5 directly into state D. During this state, the same operation as described for instruction TRA takes place, namely reading the third character of the instruction. During state E, a constant is transferred to the address defined by the third character as for instruction TRA. 2 Free transfer of constants (TLC) The command (TLC) for free transfer of constants is code 01.
00 and this causes a transfer to the address defined by the third character of the constant defined by the second character.

This instruction change signal has the same meaning as the instruction TRL change signal. During states A and B, the same operations as described for instruction TRC are performed, ie reading of the instruction and constant code. This command is confirmed by circuit 62, which now produces as output signal 62,3.

This signal moves the central unit 5 from state B directly to D, as described above. During this state, the third character of the instruction is read out as in the case of instruction TRL. Condition E
During this period, a constant is transferred to the address defined by the third character in the same way as for the instruction TRA. 3 Constant Comparison (CDC) The instruction for constant comparison (CDC) is identified by code 1101 and performs a bitwise comparison between the constant represented by the first operand and the second operand.

The result of this comparison is represented by bit E=1 when these two operands are the same, and by bit E=0 when they are different. This bit is placed in register 96 of central unit 5 (FIG. 2). instruction CD
The change signal of C has the same meaning as the change signal of command TRC.

The command CDC is confirmed by a circuit 62, which now generates as output a signal 62, so that the central unit 5 moves from state B to state D. During this state, the second arithmetic number is read out as in the case of the instruction CFR. Finally, during state E a comparison is made between this constant and the second operand. 3
For this group of commands, the central unit 5 (FIG. 2) sets the state A,
Instructions executed in the order of B and C belong to it.

The time required for these executions is therefore 6 microseconds. These instructions are the command to receive a character from a peripheral (CDP), the command to send a character to a peripheral (CAP), and the skip command (SAL). These instructions have only one address and are therefore formed by two characters.

The first character contains a code characterizing the type of instruction within the limits of the group and associated change signals. The second character contains the storage address of the operand.

1 Command to accept characters from peripheral device (COP) Command to accept characters from peripheral device (COP) is code 0110
is defined by and this causes the transfer of the operand from the peripheral defined by bits b6 and b7 of the change signal to the storage address defined by the second character.

Bit b4 of the change signal defines the page of storage to which the address defined by the second character belongs. When b4=0, this address belongs to page 0, and when b4=1, it belongs to the current page. Furthermore, when bit b5=0, this address remains unchanged after execution of the instruction, and when bit b5=1, this address is incremented by one unit amount. During state A, command CDP is acknowledged by circuit 62, which now generates signal 628 as an output.

During state B, the second character of the instruction is read as for the first and second groups of instructions. 2 of this command
The th character identifies the element part of the storage device 42 in which the character transmitted by the peripheral device 6, 7 or 8 defined by bits b6 and b7 of the change signal is to be recorded.
The central unit then moves from state B to state C because the AND circuit 139 of block 63A (FIG. 5) is energized by the OR circuit 133 and the outputs 626, 627 of circuit 63
, 621o, 6211 and 62,3 are zero.

During state C, output 628 is output to AND circuit 197 (eighth
) is activated, and this AND circuit 197 is connected to the command COM17.
This command COM17 is sent to the storage device input circuit 47.
At this point, the characters present in the channel 46 (FIG. 2) are transferred to the element portion of the storage element portion 42 that was read during state B. After these operations, the central device 5 returns to state A.

In fact, since output 628 is on bell 1, OR circuit 19
8 (FIG. 5) is always energized. As a result, one input 199 of AND circuit 200 is energized, and the other input 201 is energized via inverter 169. In this case, the AND circuit 200' activates the AND circuit 202 which has been activated by the output 203 of the flip-flop FC. The output 204 of the AND circuit 202 energizes the flip-flop FA at the moment TS (FIG. 4),
As a result, the central unit moves from state C to state A. 2
Command to send a character to a peripheral device (CAP) The command to send a character to a peripheral device (CAP) is code 0.
111 and which causes the transfer of the arithmetic change signal addressed by the second character to the peripheral device defined by bits b6 and b7.

These bits have the same meaning as the corresponding bits of instruction CDP. During state A, this command is acknowledged by circuit 62, which now generates signal 629 as an output. The second character of this command, expressed during state B, now identifies the address of the character to be sent to the peripheral defined by bits b6 and b7 of the change signal.

For this command, the central unit also moves from state B to state C due to the fact that OR circuit 133 of block 63A (FIG. 2) has been activated. During state C, the character of the address selected during state B is presented and simultaneously stored in register 50 (FIG. 2). Additionally, output 629 energizes AND circuit 195 (FIG. 8), which generates command COM08. This command is sent to the selected peripheral device to prepare it to receive characters sent from the central unit 5. After these operations, the central unit 5 returns to state A as in the case of the command CDP. 3 Synopsis Instructions (SAL) A jump instruction (SAL) is identified by the code 0010 and it is inherited during the course of a program where two instructions are being executed, even if they are not present. make it possible to move from one command to another.

The second instruction of instruction SAL indicates the storage address of the next instruction to be executed by central unit 5. During states A and B, the same operations are performed for instruction SAL as described for the previous instructions.

On the other hand, bits b6 and b7 of the change signal define the page to which the element defined by the second character of this command belongs, as well as for commands TRL and TLC. This storage element section now contains the first character of the instruction to be subsequently executed. The jump may be conditional or unconditional.

For example, "In the comparison made by the command CDC"
The result is represented by bit E, which is fed into register 96 (FIG. 2) of central unit 5. In this case, the command SA
L is conditioned by either bit E=0 or bit E=1 according to the particular arrangement of the program in progress. The value of bit E that conditions execution of a jump instruction is identified by bits b4 and b5 of the change signal of this instruction. More specifically, there are two cases. That is, if b4=b5=0 for the instruction SAL conditioned by the value E=0 that occurs when E=0, and
b for jump instructions conditioned by the value 8:1
This is the case when 4=0 and b5=1. The second character read and recorded in register 50 during state B now indicates the storage address at which the jump is to be made.

Block 63A is adapted to issue in a well-known manner an output signal CV representing the function:
Figure 5).

CV=b4 + b5・E+b5・E Therefore, CV is b4=b5=E=0 or b4
=0 and it is 1 when b5=E=1.

When the jump condition is not verified, i.e. when E=1 and E=0 in the above two cases, respectively.
Signal CV=0.

At this time, the AND circuit 210 of block 63A is activated because the two inputs 211 and 212 are in Peru and the output 626 of circuit 62 is activated. As a result, AND circuit 210 via OR circuit 213 energizes input 214 of AND circuit 215 , and the other input 216 is energized by inverter 169 . In this case, the AND circuit 215 is the AND circuit 2
18 input 217 is energized, and the other input 219 is connected to the output 220 of flip-flop FB. As a result, output 221 of AND circuit 218 sets flip-flop FA through conductor 204 at instant TS. Therefore, when the jump condition is not verified, the central unit 5 returns from state B to state A, with the result that the jump command is not executed. On the other hand, when the jump condition is verified, i.e. considering the two cases listed above, the signal C
V is on bell 1.

This signal therefore energizes the OR circuit 137 and, via the AND circuit 137, the input 138 of the AND circuit 139. The other input of this circuit is activated by the flip-flop FB as long as the central unit 5 is in state B. As a result, the flip-flop FC is activated at the moment TS through the AND circuit DC. At this time, the central device is in state B.
Then, state C is entered, during which time a command COMIO is generated by AND circuit 140 (FIG. 8) and commands the transfer of the contents of register 50 (FIG. 2) to addressing register 41.

In this way, the storage device address at which the jump is to be performed is stored in register 41. At instant TI, the AND circuit 225 (FIG. 8) generates the command COM12, which opens the gate circuit 221 (FIG. 2) and transfers bits b6 and b7 to the contribution register 71, indicating the page to which this address belongs. Forward. The AND circuit 226 further includes the command CO
MI I is generated, which is adapted to inhibit the counting circuit 44 (FIG. 2).

In this way, the AND circuit 227 gives the command C to the instantaneous TR.
When generating OM04, the same address stored in register 41 is fed into register 32, which is the second character of the instruction indicating the address at which the next instruction will begin execution. Once the instructions executed during state C have completed, the central unit 5 issues instructions CDP and C.
Go to state A as described for the AP case.

During state A which then follows, the second character of the instruction and the address defined by bits b6 and b7 of the change signal are fed into addressing registers 41 and 71. An unconditional jump occurs, for example, when some peripheral interrupts a program during execution.

For example, an interrupt is caused when a peripheral device performs an operation instructed by a command CAP sent to the peripheral device by the central device 5, or when a peripheral device introduces a character to the central device 5 by a command CDP. This interrupt requires the central unit 5 to store a jump instruction in the storage element, which makes it possible to return to the last address taken into account by the program before the interrupt. This jump instruction is therefore not conditioned by the value of bit E. This in this case has a value of 1
and bits b4 and b5 of the change signal which take 0. At this time, the output signal CV of circuit 105 (FIG. 5) is always at level 1, regardless of the value of bit E. In this case, the same operations are performed by the central unit 5 as previously described for conditional jump instructions whose conditions are verified. Furthermore, there is an unconditional jump instruction called a "return jump" instruction, the meaning of which will be explained below. This instruction is identified by bits b4 and b5 of the change signal;
Both of these bits take the value 1. Signal CV is always at level 1 in this case, so that the same operations as previously described for conditional jump instructions whose condition is verified are performed by the central unit. Fourth group of instructions To the fourth group of instructions belong the instructions which are executed by the central unit 5 in the order of states A and B.

This group also includes conditional jump instructions when the jump condition is not verified as described above. Also belonging to this group is the command to send a command to a peripheral (COP), which is identified by the code 0101 and which is defined by bits b6 and b7 of the change signal in the way described for the commands CDP and CAP. transmits the command with the code defined by the second character to the peripheral device specified by the second character.

Note that bits b4 and b5 of the modify signal are not used by this instruction and are therefore always at level 0. During state A, instructions are now decoded by circuit 62, which energizes output 627.

During state B, the second character of the command representing the command to be sent to the selected peripheral is presented and transferred to register 50. Two AND circuits 230 and 231 (seventh
) are here commands COM08 and COMO9 respectively.
occurs.

Command COM08 causes the transfer of the contents of register 50 to the peripheral, and command COMO9 is sent directly to the peripheral to indicate that the character coming from the central unit is a command and not a write character. After performing these operations, circuit 2 is energized by the output 627 of circuit 62 at instant TS.
13 (FIG. 5) sets flip-flop FA in the same manner as previously described for jump instructions where the condition is not verified, so that the central unit transfers from state B to state A.
Move to. The characteristics of each instruction are summarized in the summary table below, which includes the symbol for each instruction, the corresponding name, the code associated with that instruction, the corresponding output of circuit 62, bit b4 and b5 and their meanings are indicated.

Table 0 shows the machine operating state in which each command is executed by the central unit 5, the group to which the command belongs, the values of bits b6 and b7 and their meaning. INTERRUPTS As previously mentioned, an interrupt command in execution of one of the aforementioned instructions reaches the central unit 5 from any one of the peripheral devices connected to the central unit 5 (FIG. 2).

Execution of the currently executing program is interrupted to execute the current instruction and another series of instructions is executed. The machine operating states used to accomplish the interrupt are states F and G, so the interrupt is accomplished in 47 microseconds. When one of the peripheral devices 6, 7 and 8 sends an interrupt signal T, the logic circuit 31 (second
FIG. 5) energizes conductor 76, which introduces the signal . . . T into block 63A (FIG. 5).

If at the moment the signal mT is sent a first or second group of commands (which ends in state E) is in the process of being executed, the central unit 5 continues to execute this command until this state is reached. . Then, as described above, the output Mold of the flip-flop FE is activated and the input 232 of the AND circuit 233 is activated, the other output 234 of this circuit being activated by the signal INT. Via the AND circuit DF, the circuit 233 therefore activates the flip-flop FF at the instant TS, so that the central unit moves from the state E to the state F'. If at the moment the signal INT is sent a third group of instructions (whose execution ends in state C) is in the process of being executed, the interrupt will only be executed when this state is reached.

In fact, Fritzpf. Output MC of Tsubu FC is activated, and as a result, input 203 of AND circuit 248 is activated.
The other input 235 of this circuit is activated only when AND circuit 236 is activated. This occurs only when both conductor 76 and the output of OR circuit 198 are at level 1. This OR circuit has its inputs as commands SAL and CA.
Outputs 626, 628, 62 corresponding to P and CDP
9 is activated when an instruction ending in state C is in the process of being executed. In this way, state C
It never occurs that the execution of an instruction that does not end in is interrupted in state C by the signal mT. The central unit exits state C when AND circuit 248 is activated via AND circuit DF. Similarly, when a fourth group of instructions ending in state B is in the process of being executed, signal mT takes effect only when this state is reached.

In fact, the output 220 of the flip-flop FB energizes the input 240 of the AND circuit 241, the other input 242 of which is energized by the AND circuit 243. Circuit 243 is activated only when both signal INT and the output of OR circuit 213 are at level 1. This only occurs when a conditionally unverified jump instruction, or instruction COP, is in the process of being executed. In this way, the possibility that the execution of an instruction that does not end in state B is interrupted by signal T in state B is prevented. Therefore, AND circuit 24
1 is activated, the central unit changes from state B to state F.
Move to. In each case, during state F, the storage elements selected during the previous state are proposed in a known manner, as if the central unit 5 had returned to state A. . The contents of this element section are transferred to the output register 50 in the manner described above. At this time, the AND circuit 245 (FIG. 11) generates the command COM25 at the instant TM (FIG. 4), and this command is transmitted to the gate circuit 246 (
2) to transfer the contents of register 32 to register 57.
Transfer to.

These contents correspond to the storage address of the last instruction in the process of execution. At the same time, the command COM25 is
1 all flip-flops are placed at level 1 and act on their respective set circuits. In this way, the element section 2
55 is selected because the signal shape 11 of register 41
This is because 111111 exactly corresponds to this element portion. The page to which this element section belongs is page 0, because the contents of register 71 are not transferred to addressing circuit 45 and gate circuit 113 is closed.

In fact, during state F the command COM18 to open the gate circuit 113 is not generated, as a result of which the signal shape 00
is present in the register 71. At this time, the output M' of the flip-flop FF generates a direct command COM23 (Fig. 11), and this command is sent to the memory device input circuit 47 (
2) to send on output channel 48 the character 001011 followed by the bits contained in register 71.

For this purpose, the logic circuit 47 includes a circuit 101 (FIG. 13) formed, for example, by six flip-flops, these flip-flops having the bit shape 00101.
1 are obtained at their outputs by the command COM23. The circuit 101 for this bit shape
adds two more bits coming in from register 71 through input channel 82. These eight bit shapes are then transferred to output channel 48. Output channel 48 constitutes the input of storage device 42 (FIG. 2), so that the shape of these eight bits is stored in register 41.
The data is written into the element section of the memory device 42 selected by the address included in the address. This address is page 0 as mentioned above.
This corresponds to the element section 255 of . As mentioned above, the character 00
1011 defines a "jump back" instruction, while the bit in register 71 defines the current page. At the moment TR (Fig. 4), the AND circuit 247 (Fig. 11) outputs the command COM0.
4, this command causes the contents of register 41 to be incremented by one unit, i.e. the character 00 corresponding to element section 0 of page 0.
000000 is sent to register 32. Therefore, during state F, a return jump command is written to the element section 255 of page 0, and the address 0 is written to the addressing register 32.
0000000 is sent. At the instant TS (FIG. 4) following these operations, the central unit advances to state G, since the AND circuit (FIG. 5) is activated.

During state G, another AND circuit 250 (FIG. 12) generates a command COMOI for instantaneous information mS, which command corresponds to the contents of register 32 for register 41, that is, element part 0 of page 0. Commands address transfer. At the instant TN (FIG. 4) following the instant TS, the AND circuit 251 (FIG. 12) also generates a signal RO, which resets the flip-flop of the register 71 (FIG. 2) in a known manner and thus to select page 0. The output MG of the flip-flop FG also generates a direct command COM14 (FIG. 12), which acts on the circuit 47 in the manner described above to determine the address in the memory of the last instruction in the execution process (this address is (included in register 57 (FIG. 2)) is transferred to element section 0 of page 0 of storage device 42. Therefore, as a result of the operation just described, an instruction for returning to the page to which the address of the instruction that is currently being executed at the moment the interrupt occurs has been edited in the element section 255 of page 0.

This address is further stored in element section 0 of page 0. After these operations, another AND circuit 252 (
FIG. 12) generates the command COM26 at the moment TR following the instantaneous mM (FIG. 4).

This command acts on the gate circuit 253 (FIG. 2) to transfer the contents of the logic circuit 31 to the register 32, in other words to transfer the address corresponding to the peripheral device 6, 7 or 8 that caused the interrupt to the register 32. Send it in. Through channel 33 the contents of register 32 are simultaneously reset to reset logic circuit 3.
Sent to 4. Additionally, command COM 26 acts on gate circuit 255 to transfer the possible comparison bit E from register 96 to register 97, where it is stored for the entire duration of the interrupt. In fact, it is possible to use register 96 during the interrupt itself, for example when the interrupt contains instructions CFR or CDC. When signal INT is generated during the course of a command by two or more of peripherals 6, 7, 8 at an instant TI following Fujijo mR (Fig. 4), AND circuit 256 (Fig. 12) COM24 is generated to open gate circuit 257 (FIG. 2).

This therefore causes a reset of the flip-flop in register 30 corresponding to the higher priority peripheral that caused the interrupt. In this way, after execution of the program corresponding to the interrupt introduced by this peripheral, another possible interrupt corresponding to a lower priority peripheral can be introduced again. After these operations, the central unit 5 at this moment switches on the flip-flop FG.
AND circuit DA (Fig. 5) energized by the output MG of
Returns to state A at the instant TS following the instant TI as long as is energized.

Therefore, execution of the first instruction whose address has been stored in the register 32 among a series of interrupt-related instructions is started. As a result, during state A, in which the central unit 5 is at the end of an interrupt, inter alia a command COMOI is generated, which command transfers from register 32 to register 41 the address corresponding to the first instruction to be executed. Make it possible. This instruction, along with other instructions in the series of interrupt-related instructions, is then executed under the same conditions as described above, according to the type of instruction itself. In order for the central unit 5 to restart execution of an instruction interrupted by an interrupt, the last instruction in a series of instructions related to an interrupt is always an instruction that orders an unconditional jump to the address of the element section 255 on page 0. be.

This element section contains page 0 following the element section 255 as described above.
The first character of the instruction that commands a return jump to the address defined by the second character of the instruction stored in element section 0 of is stored. A return jump command is then executed by the central unit 5 in the manner described above, in effect returning the central unit 5 to the same condition it was in at the time of the interrupt.

More precisely, the end of the return jump instruction 'koshi register 41
is stored the address defined by the second character of the instruction itself, ie the same address that central unit 5 occupied at the time of the interrupt. Additionally, during state B of the return jump instruction, bits b4 and b of the change signal
5 take the value 1, command COM13 is generated by AND circuit 258 (FIG. 7). This directive is
bit B is transferred from register 97 to register 96 by acting on register circuit 259 (FIG. 2). Register 96 therefore stores the bit E that was present at the moment of the interrupt. Once the return jump instruction has completed, a return to state A occurs, which causes the program interrupted by the interrupt to continue. Typewriter control device Control device 9 for typewriter 6 (Fig. 1 and Fig. 14)
is adapted to control the exchange of data and instructions between the typewriter 6 and the central unit 5.

The input/output device 12 of the typewriter 6 has an input device 12' for receiving the code of the character to be printed and the code of the function character from the control device 9. These codes are formed by 8 bits, these 6 bits are used to define the characters, one bit of them is a shift bit to define uppercase and lowercase letters,
One bit may be used as a parity bit, for example. The six bits of the character act on a series of six electromagnets to effect the selection of the character or function in a known manner. The device 12 furthermore has an output device 12^ adapted for transmitting seven character and function codes to the control device 9, which are entered in a known manner by means of a keyboard 270 and a keyboard 271, respectively.

Transmission of these codes is accomplished by switching six switches of any known type not shown in FIG. The function conductor 65 connecting the control unit 9 to the central unit 5 is connected to the typewriter 6 by the decoding circuit 65 in the manner described above.
is energized by the decoding circuit 65 only when .

Data is further exchanged with the central unit 5 through an output channel 46 connected to a storage input circuit 47 of the central unit 5 and an input channel 51 connected to an output register 50' of the central unit 5. The input channel 51 transfers the data present in the register 50 to an 8-bit type register 273 of the control device 9.

The operation of the control device 9 is controlled by the central device 5 by external commands COP and CAP for receiving write characters or commands from the central device 5 and by commands CDP for transmitting characters to the central device 5. More precisely,
The control device 9 can be placed into a transmitting or receiving state by the central device 5 using the command COP. In fact, as mentioned above,
Command COP generates two commands COM08 and COMO9, which are passed through conductor 269 to control device 9.
is sent to the disconnection circuit 274 of. This circuit 274 decodes the received command in a known manner. This command is the command COM
08, circuit 274 energizes output COM08', and when it is command COMO9, it energizes output COMO9'. These outputs are sent to the control device 9
are placed in the transmitting state and receiving state, respectively. Central device 5
proposes to receive a character from the control device 9 with the command CDP, it sends the command CDP to the control device 9.
OP is sent, and this command COP generates command COM08.

This command, together with the signal present on conductor 652 selecting control device 9, energizes AND circuit 275, which acts on the reset circuit of flip-flop 276 to indicate to it that control device 9 is in the transmitting state. let them do it. When the operator activates a character key on keyboard 270, output device 12'' energizes AND circuit 278 through conductor 277 in a known manner, which circuit 278 is further supplied with a signal by flip-flop 276.

The output signal of the AND circuit 278 is the flip-flop 279
opens the gate circuit 280 so that characters entered from the keyboard 27 are transferred to the output channel 46. Conductor 277
(FIG. 2) is connected to input 30a and register 30
This causes an interruption in the operation of the central unit 5 in the manner described above. The central unit 5 then corresponds to the typewriter 6 identified by the conductor 30a and the circuit 3
Jump to the storage address decoded by 1. This address contains the first character of the command CDP, so that the central unit 5 is adapted to receive the characters present on channel 46. When the operator activates a function key on keyboard 271 (FIG. 14), the keyboard emits a signal on lead 285, which causes central unit 5 to send an interrupt signal in the same manner as lead 277.

It is therefore prepared to receive the characters of the function present on channel 46. Conductor 285
also energizes AND circuit 282, which acts on the set circuit of flip-flop 279 to open gate circuit 283, which places channel 284 in communication with output channel 46. Keyboard 271 also generates signals corresponding to actuated function keys on conductors 286.

This signal acts on the decoding circuit 287, which supplies the code corresponding to the actuated key. This code is formed from eight bits, of which bits b4, b5 and b6 are always zero to distinguish between function characters and printable characters. This code is sent via channel 284 and through gate circuit 283 to output channel 46. When it is desired to send command characters to the control device 9, the central device 5 sends the command COMO
9 is sent to it via channel 57.

This command is decoded by decoding circuit 274, and this circuit 2
74 energizes the output COMO 9' at this time. The power of this world is passed through the AND circuit 290 through the flip-flop 276
, which places the control device 9 in the receiving state. This state is established by the flip-flop 276 at the moment T
N' is identified by the output signal R of the AND circuit 291 which is activated. The reason why the AND circuit 291 is activated in the neighboring state mN' is because the instruction CAP
At this moment during the period , the central device 5 has already proposed in the storage device 42 the character to be sent to the peripheral device, as described above, and sends it to the input channel 5 of the control device 9.
This is because the data is stored in the register 50 (FIG. 2) connected to 7. Upon execution of instruction CAP, the characters present in channel 57 are transferred to register 2 by central unit 5.
73. When this character is a function character identified by the 0 bits b4, b5 and b6 as described above, the decoding circuit 291 for these bits connected to the register 273 generates a signal Y; On the other hand, if the character is a printed character, decoder circuit 274 generates signal W rather than signal Y in well-known manner. In the first case, gate circuit 295 is opened, so that the characters present in register 273 are passed through channel 296 to decoding circuit 28.
Sent to 7.

This circuit 287 generates a signal at an output 297 which is sent to the input circuit 12' of the typewriter 6 through a gate circuit 298 which is opened by the signal Y. Gate circuits 295 and 298 can obtain the receiving state (R=1) and the character is a function character (Y=1 and W=0).
) It should be noted that it is only opened when When the character present in register 273 is printable, signal W activates gate circuit 300 so that this character is transferred to input circuit 12' of typewriter 6.

In the gate circuit 300, the control device 9 is in the receiving state (R=
Note that it is only opened when 1) and the character is printable (W=1 and Y=0). What has been said above for a single character applies both to subsequent characters received and to subsequent characters sent.

Each time input circuit 12' receives a character, it generates a signal on conductor 301, which introduces an interrupt to central unit 5 via input 30a, so that central unit 5 sends another character. Get ready.

Based on the contents of the storage element as identified by the interrupt, the central unit 5 can now send a command or character with the next command.

For example, when the control device 9 is in the transmitting state, the central device 5
sends a command CDP so that transmission continues, or a command CO commanding reception so that the control device 9 is placed in a receiving state.
You can send P. Of course, the letter is the next command C
It is sent from the central device 5 by the AP. Command keyboard control device A command keyboard 8 is a control device 1 that corresponds to a large number of commands.
1 to the central unit 5.

More specifically, the keyboard has a general switch, not shown, for supplying power to all devices of the printing mechanism. It furthermore has the well-known start button, which starts the operation of the device in such a way as to send as input a first set of instructions to the memory 42 of the central unit 5 in the manner described above. These instructions were further adapted to pass any other set of instructions as input to storage 42 in a manner to be described below. A particular group of instructions, referred to as "input" instructions, are enabled to enter storage 42 as input. The keyboard 8 further has an indicator lamp which is turned on by a command coming from the central unit 5. For this purpose, this is done in the same way as described for the control device 9 of the typewriter 6, since the exchange of commands between the central controller 5 and the keyboard 8 takes place via the command COP. It acts on the keyboard 8. More specifically, the decoding circuit 6
5 (FIG. 2), the command COP selects the keyboard 8, which accepts only the specific command represented by the second character of the command COP and formed by the eight bits all at level 1. This command acts on the keyboard 8 in a known manner to illuminate the indicator lamp. The keyboard 8 is adapted to send only one interrupt signal to the central unit 5 by actuation of an interrupt key connected to the input 30c of the circuit 30 (FIG. 2).

The interrupt key then conditions the central unit 5 to execute the sequence of commands associated with the interrupt originating from the keyboard as described above. Magnetic Tape Storage Device Control Device A control device 10 of the tape storage device 7 controls the input and storage of addresses, programs, and data in the storage device 7.

The storage device 7 is constituted by an open-loop magnetic tape 310 (FIG. 15) contained in a cartridge.

The cartridges are replaceable, so the reload may include any number of cartridges. The tape 310 has a series of parallel tracks P1, P2......PN, where data is stored in blocks B1...
B256 blocks are recorded in series, and each block corresponds to one line of printing. Each block is separated from neighboring blocks by an unrecorded area called an erased area. Each recorder block has a fixed length and contains 80 characters each consisting of 8 bits.

The characters in each block are sequentially numbered with fixed numbers 0 and 79 (FIG. 16). Characters 6 and 78 are used to record data related to the printing of the corresponding line, and characters 0 and 5 are used as function characters. More specifically, the first function letter is track P1.・・・・・・．・・・．・．． . . Contains a constant used by the central unit 5 to select the one track of the PN containing the block in which the next character is to be recorded. The address of this track within the limits of the selected track is defined by the second character, whereas the cartridge itself is identified by the third character.
The fourth character indicates the number of characters each line can contain.

This number can be selected by the operator to increase or decrease the length of the print line, as described below. The fifth character indicates the number of characters actually included in the printed line.

The sixth character indicates the code for the function to be performed on that line, such as centering, underlining, etc.

The 7th digit character is a vertical parity check character related to the remaining 79 characters.

Data track PI......PN' plus tape 3
10 is the data block address 11......1
Contains one track PO containing 256.

Each address block 11...1256 is formed from 25 characters, only one of which is used to contain the address of a data block or program block. Since this character contains 8 bits, it is sufficient to define one data block from the remaining 255 in the selected track. The remaining 24 characters in each address block are used as function characters. The first three of these characters represent two constants used specifically to identify address blocks and program blocks, respectively. In fact, truck PO
'This is one program block BPI formed from 70 characters between one address and the next address...
. . . BP256 is recorded, and the characters of the operation command of the printing mechanism are recorded here. Each address block 11...
. . . 1256 is used to select the block of data that geometrically follows it in the direction of tape progression.

For example, data block B2 recorded on track P1...PW is address block 1.
2 is selected. Therefore, in order to unambiguously select a data block, one must first select the track to which it belongs and then, within the limits of that track, select the block itself from the remaining 255 blocks. The control device 10 is connected through an input channel 51 (FIG. 17) to a register 50 (FIG. 2) of the central unit 5 and through an output channel 46 to an input circuit 47 of the storage device 42.

More specifically, the two channels 51 and 46 are connected to the control device 10 through two gate circuits 316 and 317.
is connected to the register 318 of. Register 318 can exchange the bits stored therein with shift register 319 via two gate circuits 320 and 321. Register 318 further transmits the bits received from register 318 to decoder circuit 325, which generates a plurality of commands in response to the bits received from register 318. The decoding circuit 325 acts on a timer 326, which generates a time signal that controls the operation of the control device 10. The decoding circuit 325 can further be activated by a signal present on a conductor 327, which signal is at level 1 when the start button of the keyboard 8 is actuated.

The decoding circuit 325 is connected via a gate circuit 328 to a four-position register 329 which is connected to the conductor 33.
0, which acts on the read head of tape storage 7 to select the track corresponding to the bit contained in that register. Register 319 is further connected to another decoding circuit 335, which circuit 335 is connected to register 3
When an address is present at 19, a signal is generated at its output 336.

This signal present at output 336 acts on circuit 337,
This circuit 337, when activated, sends an interrupt signal to input 30b of circuit 30 (FIG. 2) of central unit 5. The register 319 is connected to the signal shaping device 33 by the gate circuit 338.
9, this circuit 339 is adapted to supply at output 340 a signal corresponding to the character contained in register 319 from time to time.

These signals are used by a write device (not shown) of the storage device 7. Register 319 is a readout device 3 of known type.
42, this exposition device 342 is connected to the tape 3101
This records the bits in series and connects them to conductor 3.
43 to the register. The exchange of data between the central device 5 and the control device 10 is carried out by the commands COP, CDP, CAP issued by the central device 5.
This is done by

The control device 1 is initially in a reset or inactive state. This situation is symbolized in FIG. 18, which diagrammatically shows the sequence of actions carried out by both the central unit 5 and the control unit 10. Actions performed by controller 1 are shown by rectangular blocks, and logical decisions or alternative actions are shown by diamonds. The actions carried out by the central device 5 are indicated by arrows, which symbolically represent the opening of a gate circuit so as to allow the control device 10 to be transferred from one operating state to another. In order to write or retrieve information from the tape 310' of the storage device 7, the central unit 5 sends a so-called "selection" command COP to the control unit 101 in the manner described above.

When b6=0 and b7=1 in the first character of the instruction, the selected peripheral device is memory device 7, and these bits act on decoding circuit 65 (FIG. 2) of central unit 5 to (FIGS. 2 and 17), which energizes the input of AND circuit 35Q of control device 10 (FIG. 17). The other input of AND circuit 350 is in state B
Command COMO8 generated by command COP during
It is done by j. In this way, gate circuit 316
is opened, so that two of the instructions present on channel 51
The th character is introduced into register 318. This second character is simultaneously introduced into the decoding circuit 325, which circuit 3
25 is the conductor 352 when the so-called selected character is confirmed.
A signal is generated to start tape 310. This selected character is identified by the fact that bits b5, b6, b7 have the value 001. At the same time, the decoding circuit 325 generates a signal L in a known manner, which signal is transmitted to the gate circuit 3.
28 and transfers to register 329 the first four bits of the character present in the decoding circuit.

These bits are track P1 of tape 310...
......Used to select one track from among the PNs. Register 329 now sends a signal on conductor 330 that is used by storage device 7 in a known manner to select a track. Furthermore, the signal L pre-prepare the read circuit 342 to read the address in a known manner.

Circuit 342 serially sends to register 319 the bits of the first character of the first address block to be read. These operations are symbolically represented by block 353 (Figure 18). It is equally possible to place the control device 10 in the addressing state by actuating the start button of the keyboard 8.

This button or key acts on circuit 325 in such a way as to simulate the selection command COP. Circuit 325 then performs the same operations as described above, with the result that controller 10 likewise assumes the proposed state represented by block 353. As mentioned above, address block 11 of tape 310...125
6 is identified when the first three characters represent the corresponding constant.

Therefore, when the decoding circuit 335 (FIG. 17) verifies that the extracted block is an address block, it energizes the circuit 337, which is connected to the circuit 30 of the central unit 5 (FIG. 2). Sends an interrupt command to input 30b. These operations are symbolically represented by blocks 354 and 3
55 (FIG. 18). The central unit 5 now executes an interrupt. This interrupt causes the central unit 5 to execute a jump instruction to the element section corresponding to the memory device 7 in which the instruction CDP is recorded among the element sections of the memory device 42 (FIG. 2).

At this time, the central unit 5 receives the command CDP of channel 51.
to the register 318 (FIG. 17) of the central unit 10. This command is decoded by a circuit 325 which sends the signal M which places the control unit 10 in the send address state.
(block 356 in FIG. 18). Signal M also opens gate circuits 321 and 317, . The read address is passed from register 319 to register 318 and from there to channel 46 and storage input circuit 47.
(FIG. 2), the data is transferred to a predetermined element section of the core storage device 42. At this time, the central device 5 issues command C.
DC, thereby causing the central device 5 to control the control device 10
The address received from the block is compared with the contents stored in register 57 (FIG. 2) representing the address of the block. If the result of the comparison between these two characters is negative (bit E=0), the central unit 5
(Logic decision 357 in FIG. 18), therefore, controller 10 sends the next address in the manner described above and the operations described in blocks 354, 355, and 356 of FIG. 18 are repeated. . If the result of the comparison between the two characters is positive (bit E=1), the central unit 5 sends a command COP ordering a proposal or write. Of course, logical decision 357 is accomplished using conditional jump instructions. In fact, when the condition is not verified (bit E=0), the central unit 5 returns to state A as described above. On the other hand, when it is verified (bit E=1),
The central unit 5 executes a jump instruction to the storage address where the first character of the instruction COP is recorded. The type of command (write or issue) is determined by the second character of the command COP, which is decoded by circuit 325. When this character indicates a read command, the circuit 32
5 generates a signal L, which activates a decoupling device 342 to cause a serial readout of the bits of the first character of the selected block, and the decremented bits are transferred to a register 319.
(block 358 in FIG. 18). When this register is filled, it energizes circuit 337, which sends an interrupt signal to central unit 5 (block 360 of FIG. 18). With command CDP, the central device transfers the retrieved characters from control device 10 to storage device 42 (block 361 in FIG. 18). In this way, all characters of the selected block are transferred to storage device 42. When the central unit detects that the character read is the last of the selected block, it sends a so-called end command COP to the control unit 10 (logic decision 362 in Figure 8).

The decoding of the last character of this block is carried out by the central unit 6 using the instruction CDC, which consists of a constant representing the consecutive number of characters to be read from time to time and a constant representing the maximum number of characters in the block. give rise to a comparison of If the result of this comparison is positive (bit B=
1), the central unit 5 generates the termination command CO using exactly the same process as that used for the generation of the command COP for proposing.
Generate P. Decoding circuit 325 of control device 10 (7th Army
) decodes the second character of the termination command COP and generates a command signal, not shown in the drawing, which transfers the control device 10 in a known manner into the state corresponding to the termination command COP. (Flock 363 in Figure 18).

When this character indicates the end of the block presentation with the stoppage of the tape, the controller 10' returns to its initial state (FIG. 18).

When the presentation of the next block begins despite indicating the end of presentation of a block, controller 10 returns to the state represented by block 358. When this character indicates the end of the reading of a block and at the same time the issuing of a block that does not follow the block read is started, the controller 1Q' returns to the address issuing state, that is, the state represented by block 354. . If the central unit 5 proposes to record or write data to the selected block, it
Sends a command COP to write to (logical decision 359)
.

This command is decoded by circuit 325 (FIG. 18), which in turn energizes circuit 337 with a signal date. Circuit 337 sends an interrupt to central unit 5 (block 365 of FIG. 18), and central unit 5 sends command CAP to controller 101 in the manner described above. This instruction is the circuit 325
(Fig. 17), it is signal K
This signal K opens gate circuit 320 to transfer the character to be written or recorded from register 318 to register 319. At the same time, circuit 325 activates timer 326, which shifts the bits in shift register 319 by time signal TH and introduces them serially into interrupt device 333. These operations are illustrated starting at block 3661 in FIG. When the entire character has been recorded, the writing device generates a signal J in a known manner, which causes an interrupt to be sent by circuit 337 (block 367).

As a result, the central unit 5 issues the termination command CO in the manner described above.
P or command CAP can be sent (logical decision 36
8). In the first case, the control device returns to the inactive state; in the second case it returns to the state identified by block 366 in FIG. The operation of an automatic printing device is controlled by a group of instructions, each associated with a particular processing operation to be performed on the text.

These commands are stored in the pologram block BP located in track PO of tape 3 (Figure 15).
...Recorded in BP256. More specifically, the processing operations that may be performed on the text are either processing operations on the form of the text or processing operations on the constants. Type-related processing operations make it possible to selectively add or subtract characters in a printed line, in other words to justify the resulting line, and in other words to align the right-hand limits of the line, 1 1 in row or more rows
It is possible to increase the underlining by one or more words or to center one or more words in terms of print line length.

On the other hand, content-related processing operations erase one or more lines, making it possible to add new lines or text, or to correct errors. determined by instructions, these instructions must be transferred from tape storage 7 to core storage 42 of central unit 5 (FIG. 2) in order to take effect, and central unit 5 then transfers them to the core storage 42 of central unit 5 (Figure 2). Storage device 4
Execute in the order recorded in 2.

To transfer a set of instructions from tape storage 7 to core storage 42, the operator activates the start pushbutton on keyboard 8. The decoding circuit 325 (FIG. 17) is then activated in the manner described above and the controller 1 of the tape storage device 7
0 is placed in the proposed state 358 (FIG. 18). Central device 5
then leaves the inactive state represented by block 380 of FIG. The address recorded in the track PO of the storage device 7 (FIG. 1) is read out here and sent to the central device 5 via the control device 10.

Since each address is preceded by an interrupt, this causes the central unit 5 to jump to the element part of the memory device 42 (FIG. 2) at the address determined by the interrupt itself, as described above. Execute commands. At this address, a command CDC is recorded, which causes the central unit 5 to compare the address coming from the control unit 10 with the address stored in the register 57 in a circuit 98 (FIG. 13). Since the address stored in register 57 is formed by eight bits that are all 0, controller 10
Transfer of this block from tape storage 7 to core storage 42 occurs when program block 3101 sends to central unit 5 the address of the first program block recorded on tape 3101 and identified by eight zero bits. The input of the first instruction is symbolically block 381 (first
Figure 9). The address of the element section of the memory device 42 in which the characters of this block are recorded is supplied by the addressing circuit 45 of the memory device 42.
As mentioned above, the group of instructions recorded in the first block is the first instruction, which causes the central unit 5 to record subsequent instructions in the manner described below. The central unit 5 carries out the first command submission during state A and the stay in this state is determined by the output signal BT of the flip-flop 35 (FIG. 2). When this signal is 0, i.e. when the first group of instructions has been completely written into the storage device 42, the central unit 5 turns to executing the instructions included in the first group of instructions (see FIG. 19). block 382). At this moment, the central unit 5 (FIG. 2) is also in state A and the address decoding circuit 45 has recorded the address of the element following the element occupied by the first instruction of the first instruction group. There is.

When the central unit 5 moves to state B to execute the first instruction of the first instruction group, the contents of the element section of this last instruction are transferred to the output register 50', and then the command COM15 (FIG. 7) is generated. register 57 (second
(Figure). The first instruction of the first instruction group is instruction C.
OP, and this command causes the central device 5 to control the control device 10.
is placed in the proposed state 358 (FIG. 18). Central unit 5 then compares the address supplied by control unit 10 with the previously stored contents of register 57 (FIG. 2). These contents are addresses of blocks recorded on tape 310 that are included in the mental input instructions and are associated with another group of instructions related to the particular processing operation to be performed on the text. When this address is verified by the central unit 5, the block thus identified is transferred from the tape storage 7 to the core storage 42. The operations performed by the central unit 5 to record the block of input instructions are symbolically referred to as block 382 (19th
block 354,3 represented by and previously described in FIG.
55 and 3,56 (FIG. 18). The block of instructions written to storage 42 in this manner includes the address of a second block, which is also a block of input instructions, as described above.

- This second block is then written into the storage device 42 as described above. The central device 5 is now in an active state, symbolized by block 383 (FIG. 19). In this state, the first set of instructions and the two input program blocks are written to and reside in storage 42. The input block makes it possible, among other things, to write into the storage device 42 a particular set of commands, called "select" commands, which select commands are assigned to tracks P of the tape.
Typewriter 6 out of all the commands recorded in O.
keyboard 270 (FIG. 14). After the input input state represented by block 383 (FIG. 19), central unit 5 encounters a logic decision represented symbolically by block 384.

This logical decision represents the possibilities that the central unit 5 has for a group of general instructions or a group of selected instructions. This logical decision is represented by a conditional jump instruction recorded at the beginning of the first input block. This conditional jump command causes the central unit 5 to now select in the manner described above the address of the program block recorded in the track PO (FIG. 15) corresponding to the commands entered by the operator on the keyboard 270. A jump is performed to the element portion of memory 42 containing the instruction COP, which places central unit 5 in a position to submit as input the general instruction indicated by block 386 (FIG. 19).

This jump allows central unit 5 to perform a jump to the element portion of storage device 42 containing the command COP associated with the "select" command (block 385 in FIG. 19). The central unit 5 executes the jump command to one or the other component according to the fact that the operator has entered or not entered a particular processing action on the keyboard 270. When the operator does not perform any processing operation, the central device 5
executes a jump instruction to the storage element section containing the instruction COP for "selection". The address of this element portion is represented by the second character of the jump instruction. The first command of this group is the command CO to direct the typewriter 6 to the control device 9.
It is P. This command causes the central device 5 to put the control device 9 into the receiving state, and then, by the following command CAP, type printing outside the label JOB? send. These operations are symbolically represented by block 388 (Figure 20).
The control device 9 then sends a command to the input device 12' (FIG. 14) to print this level, which will then appear on the printed paper. After this, the next command COP causes the central device 5 to place the control device 9 in the transmitting state, symbolically represented by block 389 (FIG. 20). The operator then enters a label or group of characters on the keyboard 270 (FIG. 14) of the typewriter 6 that forms the desired instruction group.

The control device 9 introduces an interrupt after each character as already explained in the description of the control device 9. The current state of central unit 5 is represented by block 390 (Figure 20). Thereafter, each character transmitted by the control device 9 is stored in the element section of the storage device 42 (block 3).
91). When each character is received, the central unit 5 blocks 3
A logical decision, represented by 92, must be made, by which it is checked whether the label has been completely sent. More specifically, the central unit 5 checks whether the last character coming from the typewriter 6 is the fourth character of the label. Normally, this logical judgment is made using the instruction CF.
The method of executing this instruction, represented by a jump instruction conditioned on the result of the comparison operation performed by R, is the same as for the logical decision described above. If the last character received is not the fourth character of the label, the central unit 5 issues a command COP to the typewriter control unit 9.
, and this instruction places the controller 10 in the transmitting state represented by block 389.

The delivery of the next character to the central unit 5 is then obtained, so that the central unit 5 returns to the state represented by block 389. When the fourth character is sent, the central unit 5
checks whether the sent character corresponds to one of the labels recorded on track PO of tape 310 (block 393).

Of course, the command CFR performs a comparison, which is repeated many times until the selected label is verified. If the worker utters a slur when pressing the key to insert a label, the central device 5 sends a command to the control device 1 using the command COP.
Label job against W? is again commanded to be printed (block 388), resulting in the operator refeeding the label.

If the label has been entered correctly, the central unit 5 will locate the address 11 in the storage device 7 of the first block of the instruction group entered.
A jump instruction to the element section of the storage device 42 where No. 6 is recorded is executed. The central unit 5 now commands the entry of this element part of the storage device 42 and uses the address retrieved there by the command TRA as the second of the jump commands of the group of input commands.
It is transferred to the element section of the storage device 42 corresponding to the second character of the skip command of the group of characters. In this manner, central unit 5 may perform the operation represented by block 386 (FIG. 19). Within the element section defined by this character is the address 11 of the first block of instructions in the storage device 7 to be transferred to the storage device 42.
...1256 are included. These operations are block 3
94 (FIG. 20). Thus, corresponding to each label entered with the keyboard, the address of the first block of instructions can be changed according to the entered label, so that the corresponding block selected by the label in storage 7 is stored in storage 42. may be transferred. Thereafter, the central unit 5 transfers this selected block to the storage device 42 by the act described with reference to FIG. 19 and symbolically represented by block 386 (FIGS. 19 and 20). do. As a result, when the printing device is started, a first command (block 381 in FIG. 19) is transferred to the storage device 42, which retrieves an input command from the tape storage device 7 (block 383).
, and finally the input commands enter the selection command as input in storage 42 when no label has been selected by the worker (block 385), and the label JOB? when these commands are entered as input. is printed (block 388 in FIG. 20).

As a result, by typing the label, the operator selects a set of operating instructions. The "select" instruction selects the address of the group from among those assigned to the various operating instruction groups and provides it to the input instruction (block 394). Finally, the input instructions block 386 enters the selected instructions into the storage device 42 so that they are executed by the central unit 5. Recording Text When it is desired to record text, the operator places a piece of paper on the platen of typewriter 6 (FIG. 1) and activates the start pushbutton on keyboard 8.

Central unit 5 is thus conditioned to write initial instructions, input instructions and selection instructions to storage device 42 (FIG. 12) in the manner described with reference to FIGS. 19 and 20. Thereafter, the selection command controls printing of the label "JOB?" by the typewriter 6. The central unit then commands the typewriter 6 in a known manner with the command COP to "return to beginning with line basting". The worker then enters the label "REGI" on a typewriter (block 410 in FIG. 21), which is sent to the central unit 5.
, block BP1 of tape 310...
A group of so-called "record" commands of BP 256 is selected (block 411) and conditioned for transfer to storage device 42.

These commands are intended to preset the limit adjustments and control the presentation of the text to be typed later by the typewriter in the tape storage device 7. In fact, a recording command is issued to the central device 5 to record the tape 310 (FIG. 14) on which each thing to be copied or printed is to be recorded.
Block BI......supplies the address of B256. For this purpose, Tranek P1 of the tape 310...
. . . Each PN contains a special block called a “table block”.

This table block is in a predetermined position in each track and is accessible by the central unit 6 in the manner described below using an address that is maintained unchanged throughout the operation of the printing device. For example, each track P1...
Let us assume that the table blocks of PN (FIG. 14) are each block BI. This table block is formed by 67 8-bit type characters, so the first 64 characters contain a total of 512 bits. These bits are divided into groups in pairs, each of which is assigned to a data block B2......B25
It is assigned to 6. More specifically, track PI
The first pair of bits of the table block BI recorded in is associated with the same block BI, the second pair is associated with block B2, and so on, and the 256th pair is associated with block B256. are doing. Since these pairs of two bits can take on four shapes, each of these shapes is associated with one item of information for the corresponding block. More specifically, the meaning of these information items is summarized in the table below. The first combination indicates that the block is free and recordable and therefore can be occupied by data.

The second combination indicates that the block is occupied but can be recorded by erasing the data contained therein.

The third combination indicates that the block is free for data but is unrecordable due to changes or wear in the magnetic material of tape 310, for example.

This prevents any lines of text from being lost because they are recorded in a spoiled flock. The last combination is used to indicate that a block cannot be recorded if it is not desired to change its contents, such as in the case of table blocks. After the first 64 characters of the table block another group of three characters is recorded which is the same for all table blocks.

The first of these characters indicates the selection command COP, which, as previously described, selects tracks P1 and P1 of tape 310.
・・・・・・・・・・・・PN is selected. This command is used to select the track containing the first free recordable block, as described below.
The second character of the group of three characters indicates the address of the first free recordable block, and the third character indicates the label of the tape force to which this block belongs.

The first two characters, called "indication information", are sufficient to indicate the address of the first free recordable flock of tape, and the third character is used when multiple cartridges are used simultaneously and here It cannot be taken into account. Of course, the instruction information is updated in the table block after each journal review in a manner described below. The first of the ``record'' commands is a selection command COP directed to the controller 10 of the tape storage device, whereby track PI of the tape 310 is selected and the controller 10 is placed in state 3.
58 (Figure 18).

When the address corresponding to the table block BI of the track PI (which, as mentioned above, cannot be changed) is verified, the "record" command controls the presentation of the table block. This condition is symbolically represented by block 412 (FIG. 21). Therefore, the table-flock BI corresponding to the truck PI is stored in the storage device 4 by the central loading 5.
Transferred to area 2. The jump command included in the "record" command now causes the central unit to perform a jump to the element portion of storage device 42 where the first character of the instruction information is recorded.

This element is always the same no matter what the table block is, since the characters defining the instruction information have a fixed position within the table block, and these characters are always in the same area of the memory 42, as is known. This is because it is recorded. Since the first character of the instruction information is a command COP commanding the selection of the track containing the first free recordable block, the address of this block is recorded in the next element of the storage device 42, so that the tape storage device The first free recordable block of 7 is thus identified.

This condition is symbolically represented by block 413 (FIG. 21). The selection command COP places the control device 10 of the tape storage device 7 in the addressing state (block 414) in the same manner as described above with respect to FIG.
).

The selection of free recordable blocks identified by the instruction information then takes place in the manner described with reference to FIG. 18 (block 415 of FIG. 21). Starting from the free block address, the central unit 5 then selects a series of 23 free recordable blocks in the following manner.

With command TRC it transfers to the element portion of storage device 42 the address indicated by the instruction information incremented by one unit amount. This new address defines the data block following the data block defined by the indication information. The central unit 5 then fills in the contents of the table block BI and checks whether the data block defined by this address is free and recordable. In fact, it is
Instruction CDq checks whether the bits of the data block corresponding to this address both have the value 0. If the block identified by this new address is occupied, the result of the comparison is bit E=0.
give. The central unit 5 then executes the command TRC, using which it transfers the address of the occupied block, which has been increased by one unit amount, to another component part of the storage device 42. The same operations described above are then repeated to assess whether the block with this last address is free and recordable. If the result of this comparison is positive (bit E=1), the central unit 5 records this new address in the storage device 42 in two steps. In the first step, the central unit 5 executes a conditional jump instruction to the storage element in which the instruction TRL is recorded. In the second step, using this instruction, it transfers the address following the address pointed to by the indication information to the storage element following the last element occupied by the table block, thus Record the second block of 23 blocks.

The operations just described are summarized in block 416 (21st
Figure). This operation is repeated for the remaining blocks located at mutually spaced locations on tape 310.

In this way, the central unit 5 selects a group of free recordable blocks. The number of such blocks, 23, was chosen because this is the average number of lines of writing that would normally be made on type printing paper. When the number of free recordable blocks is less than 23, the central unit 5 moves to the next selection command COP to display table blocks belonging to the next track so as to always provide 23 free blocks.

In order to determine whether a block that is free is greater than or equal to 23 or less, the central unit 5 transfers the bits of the table block corresponding to the data blocks following the block defined by the instruction information to the elements of the storage device 42. Transfer and check whether these bits are all 0 and whether the number is 46 using the instruction CDC. If so (logical decision 425), i.e. there are at least 23 free blocks, the central soma 5 performs the operation described with reference to block 416, otherwise it is the table block of the next track. Jumps to address submission state to retrieve (block 414)
. Thereafter, the central device 5 puts the control device 9 of the typewriter 6 into a receiving state by the command COP.

Then, the next instruction CAP causes it to input Ryoreki 12' (
Send the address of the first free block to (Figure 14).
The input device 12' then instructs the typewriter 6 to print this address on the left edge of the paper below the label REGI in the manner described above (block 41 in FIG. 21).
7). Selection command CO recorded in the first character of instruction information
The central device 5 uses the controller 10 of the tape storage device using P.
is placed in a state of free address selection and reception (block 418). Then, using the command CAP, the central machine 5 sends a group of four space characters to the control unit 9 of the typewriter 6 to advance the carriage by four steps. At this point, the operator can enter, by means of the keyboard 270 of the typewriter 6, a code corresponding to the action that the central unit must perform on the print line or insert line during the next printing of the text. Actions that the center armor 5 can perform include determining the right limit of a line, centering, and underlining. To enter the codes corresponding to these operations, the worker activates the "1 step back" key on the keyboard 270 (logical decision 417 in FIG. 21).
, which returns the carriage of the typewriter 6 by one step.

Then, the control device 9 of the typewriter 6 sends a code for "return by one step" to the central device 5 using the command CDP.

Central unit 5 verifies this code by circuit 98 (FIG. 13) of storage input circuit 47 under the control of command CFR. In response, the central device 5 sends the command CDP to the control device 1.
0, and the control device enters the transmitting state. Command CO
The second second character of P is the address of the element section of the memory device 42 in which the character coming from the control device 10 is to be recorded, and this character is the address of the memory device element following the element section in which the address of the print line is recorded. It is not recorded in the department. After this, the worker
On the keyboard 270, actuate one of the group of alphanumeric keys associated with the action that the central armor 5 is to perform. The control device 10 then sends the code corresponding to this key to the central device 5, which records this code in the selected element of the memory device 42 (block 417''). To define the right-hand limit of the line, the operator activates the initial L key followed by the "one step back" key with spaces for the number and number of characters desired to form the printed line.

The central device 5 accepts the printed letter L and transfers it to a predetermined element of the storage device 42 in the manner described above.
The command following the command CDP for recording the character L in this manner is a jump command to another element section of the storage device 42 in which the command CFR is recorded. This command causes the central unit 5 to
compares the character L with the characters of the possible commands of the printing device. When this character is confirmed, the central unit 5 uses another jump command to count the space characters extracted following the character L' in a sequential operation controlled by a series of commands TRC. .

Then, each time there is a transfer of a constant representing a space character incremented by one unit amount. If a particular value is selected for this constant, such as 000000000, then at the end of the count the final constant corresponds to the number of characters entered for that print line. Further instructions TRC
The central unit 5 then transfers this number to a predetermined element in the memory 42, so that the line length remains recorded in the memory 42.

When the operator must enter other commands, such as centering a title, underlining, etc., the operator also enters a "one step back" and accordingly activates the respective alphanumeric key thereafter. In the same manner as described above, the code corresponding to this alphanumeric character is recorded in the corresponding element part of the storage device 42 instead of in the element part following the element part in which the row address is recorded. Upon writing of the letter L or other alphanumeric character associated with the command, the carriage recovers space "one step back" and is in the first position of the line.

The worker now enters the characters of the line of text to be recorded by means of the keyboard 270 (FIG. 14), which then positions the line on the paper four steps apart next to the address of the flock to be recorded. It will be printed.

These characters are now stored in storage device 42 in the manner described above.
The data is serially transferred to the register 42' (FIG. 2). Register 42' of this storage device 42 (block 4 in FIG. 21)
19) is saved in this transfer. At the end of the line, the operator activates the key for carriage return with line basing, so that the carriage returns to the beginning [Furthermore, the relevant code is checked by the central unit 5 using the command CDC and this Command CDC places central unit 5 in the next operating state using conditional jump commands as usual. In this state of operation, the central unit 5 transfers the line recorded in the register 42' (FIG. 2) to the register 42'' of the storage device 42, completes the data block therein with respect to the character of the function, and completes begins the search for the block of tape 310 in which the block that was written is ultimately to be stored.More specifically, using the instruction TRA, the central unit uses the first three characters of the block to select the track and select the next free block. The addresses and instructions COP for the corresponding labels on the tape 310 are transferred to order in these blocks subsequent processing operations, e.g. operations for writing the various lines of a given text in sequence. , since the characters of these three functions have been recorded in advance in a predetermined element section of the storage device 42 (block 416 in FIG. 21) ~ command TRA
It can be used for any data block without changing the second character of the instruction, which defines the address of the element from which the characters of the three functions to be transferred are to be retrieved. Also, since these data blocks are subsequently recorded in the same element portion of the storage device, the third character of the instruction TRA is always the same. Another instruction TRA to be executed afterwards
Using , the central unit 5 transfers to the fourth element of the data block the number of printed characters that the block can contain, which has already been recorded in the memory 42 .

The central unit 5 then uses the next command TRA to transfer the number of characters actually placed in the fifth element of each data block. This number is counted by the central unit 5 in a similar manner as for the number of spaces described above. However, in this latter case the command to start counting is given by the characters "carriage return with line basing". The central unit 5 then transfers to the sixth element of the block the code of the action to be performed on that row (centering, underlining, etc.).

Finally, the central unit 5 calculates the parity check character resulting from the entire data block in a known manner and transfers it to the seventh element of the block itself. The operations just described are represented briefly by block 420 (FIG. 21). Upon completion of the block just described,
The central device 5 uses the selection command COP to put the control device 10 of the typewriter 7 into a state where the tape 310 is released (first
8 block 358), thus controlling the controller 1
The address of the block in which the print line entered before the keyboard 27 is to be recorded is searched in the storage device 7 in the manner described above.

While controller 10 searches for this address, the operator enters a second print line via keyboard 270, which is transferred to register 42' (FIG. 2) of storage 42 in the manner previously described. In this way, the central counterfeit 5 "records the block recorded in the register 42' and corresponds to the first printed line on the level 42" and the tape 310' simultaneously with the completion of the block corresponding to the first printed line. The block to be recorded in the register 42^ and corresponding to the first print line is searched for, and the completion of the data block is interrupted as needed.

In fact, when the control unit 9 of the typewriter 6 or the control unit 10 of the tape storage device 7 sends a character to the central unit 5, they introduce an interrupt to the central unit 5 as described above. The central device 5 now has two control devices 9
and 10, and interrupts the completion of the progress for the data block recorded in the register 42''.The central unit 5 then restarts the completion of the progress. , register 42 of central unit 5
The time during which the controller 10 searches the tape 310 for a block in which the contents of `` are to be recorded varies depending on the position of the block on the tape.

At most, this time is equal to the average time it takes for an operator to enter the next line from the keyboard 270'. As described above, the addresses of the blocks recorded on the tape 310 are sequentially read out until the control device 1 secures the address received from the central device 5. Therefore, the maximum time required to read these addresses is determined by the tape advance speed and the length of the tape itself. When the operator has completed feeding the second print line, he again activates the key for "carriage return with line basing".

As a result, the central unit 5 registers 42 of the storage device 42
Transfer of the completed data block corresponding to the first printed line of ^ to tape storage 7 and transfer of the second printed line from register 42' of storage 42 to register 42r is effected. After this, the central device 5 moves to block 4 of FIG.
Returning to the recording state indicated by 17 and 418. The operator can now enter a third row, resulting in the operations described above being repeated. These operations are symbolically represented by blocks 421 and 422 (FIG. 21). When the worker finally completes writing the text, the worker notifies the central device 5 of the end of the text. To this end, after printing the last address, the operator activates the "one step back" key and thereafter activates the key for initial E on keyboard 270 (logic decision 423). The central unit 5 then verifies the code associated with this key and eventually by the command TRA the first three characters of the block associated with the last printed line are stored in the table block 65, 66 and the 6th digit. The data is transferred to the element section of the storage device 42 located therein. As mentioned above, the table block is operated by a worker using the keyboard 270.
storage device 4 after putting the label REGI by
2, so that the instruction information is thus updated and again contains the address of the first free recordable block (block 424 in FIG. 21), so that the next When the text has been recorded, the central unit 5 supplies the address of this block again in the manner described above. The second and third characters of the instruction TRA are always the same no matter what table block is recorded in the storage device 42. In fact, since the table block is always recorded in the same element of the storage device 42, the third character of the instruction TRA, which represents the address to which the contents of the element identified by the second character are to be transferred, is always the same. , thus valid for each table block.
Similarly, the second character of this instruction always remains unchanged, since the address of the free block is always stored in memory 4.
This is because the data are recorded in the same element portion of the two. Thus, the central unit 5 supplies the address of the first free recordable block and controls the line-by-line recording of the text, and the address of the next data block and the line itself are recorded in that block as it is printed. It is obvious to insert into each data block a code of the type of operation to be performed on the print line to be printed, and to update the value of the indication information after each recording.

Additionally, it should be noted that when the operator notices a typing error during the printing of a line, the operator activates the "one step back" key.

The character of the command associated with this key is verified by the central baggage controller 5 and the interrupt associated with this command inhibits the address from being incremented by the central unit as described above, so that the character entered after replaces the characters recorded in the storage device 42. When the operator proposes to underline one or more words in one print, the operator activates the "1 step back" key after printing the address corresponding to this line and then the corresponding symbol S. Activate the key.

The operator then records the text of the line, and when the operator reaches the word to be underlined, the operator activates the underline key instead of the space key. The worker then records the words to be underlined. At the end of this word, the worker again activates the underline key instead of the space key.
Therefore, the code for this underline key is recorded in the element section of the storage device 42 in such a manner as to identify the beginning and end of the line to be underlined. Text Correction The printer is capable of correcting text content, such as by adding or removing one or more lines.

When the worker wishes to insert one or more lines of previously printed text, the operator presses the keyboard 2 of the typewriter 6.
70 enters the label REGI. This label is verified by central unit 5 and forwards a set of "record" commands from tape storage layer 7 to core storage 42 in the manner described above with respect to FIG. These operations are collectively indicated by block &25 (FIG. 22). The line or group of lines to be inserted into the text is then recorded in the storage device 7 in a manner similar to the recording of text as described above. The operator enters the label MODI on the keyboard 270 to insert the line that can now be inserted at any point in the text that has already been recorded.

More specifically, this label causes the transfer in the tape storage bag layer to the core storage 42 of the central unit 5 of a group of instructions called "modify" or correction instructions in the manner described above (block 426). This change signal acts to change the order of the addresses of the data blocks so that during the drafting and printing phases (these are described below) they are retrieved from the storage device 7 in a different order than they were recorded. Do it like this. It has been stated that in fact each data block contains the address of the next data block in the first and second characters.

Modifying instructions operate on the contents of these instructions to change the address of the next data block. To accomplish this, after inserting the label MODI and returning the carriage of the typewriter 6 to its initial position, the operator activates the keyboard 270' alphanumeric key, for example the key for the symbol "1"; Four labels can be inserted. The first of these labels represents the address corresponding to the line of text that is printed on the paper during the discussion of the text and becomes the original text when the operator enters new text. The second label represents the address of the first line of insertion; these are also printed on the paper.

The third and fourth labels are respectively the address of the last line of insertion and the address at which printing of the previously recorded text should restart (this is usually the address of the line following the line into which the new line is inserted) represents.

These four addresses are recorded in the corresponding element portions of the core storage device 42 using the method described above. The central device 5 verifies the command code 1 entered here (block 427
).

Since this code is insert code 1 in this case, the central layer uses instruction CFR to execute a jump instruction to the predetermined storage element associated with code 1 (block 43).
8). The first instruction of the group of change signals associated with code 1 is recorded in this element. This first command is a select command COP, which places the controller 10 of the tape storage device 7 in an addressing state (block 428). In this way, a selection is made of the data block corresponding to the first of the four addresses entered, which is the desired point of insertion, i.e. the point of the address of the data block (see FIG. 22). Block 429). Using the subsequent instruction CDP, this first block is transferred to the corresponding group of elements of the core memory 42 as described above.

Using the command TRA, the central unit 5 now uses the second address entered, ie the address of the first line of insertion, to identify the address of the next data block in the selected and just storage device 42. storage device 42 in which the second character of the data block transferred to is recorded.
(block 430 in FIG. 22).

Of course, the address of the first line of insertion is the same track P1 where the address of the selected block is recorded...
When the PNI does not belong, the central unit 5 further issues an instruction to select the track whose address belongs to the first line of insertion into the first character of this data block. Transfer COP. These transfer operations are symbolically indicated by block 430. The element section of the storage device 42 in which the address following code 1 is recorded is predetermined, just as the element section in which the selected block of the first address is recorded is fixed. . For this purpose, two of the commands TRA just explained.
The 3rd and 3rd characters always have the same shape insofar as they relate precisely to the address of these elements. Thereafter, using another selection command COP, the central unit 5
again places the controller 10 of the tape storage device 7 in the address reading state (block 431).

Therefore, the data block associated with the third address entered, the address of the last row of the insert, is selected (block 432). By the same operation as described above, other instructions TRA are executed at the end and second of the selected block.
Controls the transfer of the fourth address entered after code 1, the address at which printing of the old text is desired to be restarted, to the storage element where the th character is stored. When the operator wishes to remove from tape 310 a line or group of lines of writing recorded thereon, the operator activates key B after the label MODI.

The operator then enters two labels corresponding respectively to the address of the preceding line and the address of the line following the group of lines that the operator wishes to remove. Central unit 5 now identifies code B in the manner described above and performs a jump to the corresponding storage element containing the first of the instructions associated with code E (block 439). This command is the selection command COP, which places the controller 10 of the tape storage 7 in the addressing state (block 435).
). Therefore, the data block corresponding to the address of the row preceding the first row of the group of rows to be removed is selected. The central unit 5 then transfers to the first and second characters of this block the address corresponding to the line following the last line of the group of lines to be removed. In this way, the data block corresponding to the row preceding the group to be removed has recorded the address of the data block corresponding to the row following the group.

As a result, when these blocks are retrieved from tape storage 7, central unit 5 skips only the group of rows that the operator previously removed. When the operator wishes to append a previously recorded group of lines to the end of the text, the operator enters the label MODI and then activates the key T, which includes the address of the last line of the text and the operator's input to the text. Followed by the submission of the address of the first line of the group of lines that you want to end.

The central unit 5 identifies the code T and proceeds to the storage element containing the first of the corresponding instructions (block 443).
). In the manner described above, the central unit 5 inserts the second address into the first two characters of the data block identified by the first address. The facility provided by the Honchoji device is for example the end of a group of different personal letters or circulars which have a standard format and are recorded individually once for every letter. It is particularly useful for It is therefore clear that text may be altered or corrected by acting exclusively on the addressing characters of a data block without changing the location at which the data block is recorded on tape 310'. As will be explained below, these blocks are removed from the tape storage 7 and introduced into the central unit, whereupon they are printed by the typewriter 6 in the order desired by the operator. The order of the addresses of the data blocks corresponding to the lines within the group of lines to be inserted or appended is not changed, so that these lines are printed in the order in which they were previously entered. It is noteworthy. Finally, when the operator wishes to replace one line with another previously recorded line, he activates key S after entering the label MODI, which contains the address of the printed line to be replaced and The sending of the address of the new print line continues.The central unit 5 recognizes the code S and executes a jump to the memory element in which the first of the corresponding commands is recorded (block 444).First The instruction is the selection instruction CO
P, and using this instruction the central unit 5 selects the track in which the beginning of the data block corresponding to the print line to be replaced or replaced is recorded (block 44).
0). The central unit 5 then issues successive commands C in the manner described above.
The OP transfers this data to the storage device 42 (block 441). In the same way, the central device 5 transfers the data block corresponding to the new print line to the storage device 42.
The central unit 5 now executes a series of instructions TRA by which it transfers all the characters of the second block to the elements of the storage device 42 in which the characters of the first block were recorded. In this way, the replacement of the characters of the line to be replaced by the characters of the new line takes place. Since the elements of the storage device 42 in which these two blocks are recorded are fixed, the central unit 5 can use the same instruction TRA to perform the replacement, where the change signal is Increases the address of one operand by one unit.
In this way, all the characters constituting the data block of a new line can be called up in sequence, and at the same time these characters can be transferred in sequence to the elements occupied by the characters to be replaced. These operations are illustrated schematically at block 442. Therefore,
The operations described above allow the operator to process text on demand, provided that the processing operations relate to the total number of lines.

Word Correction When the operator detects bad words when rereading the recorded text, the operator can condition the central unit 5 to correct these errors.

More specifically, the worker presses the start key on the activation keyboard 8, which, as mentioned above, is labeled JOB? This causes printing. After this, the operator enters the label FAST from the keyboard 27, which is confirmed by the central unit 5 and eventually places a group of so-called "correction" commands into a predetermined element of the storage device 42 (block 445 in FIG. 23). ).
Thereafter, the operator inserts a label corresponding to the address of the 0th line of printing that he wishes to correct. This address is recorded in a predetermined memory device element section using the method described above. The first of the correction commands is the selection command COP, which puts the control unit 10 of the tape storage device 7 in the address presentation state (
Block 446).

When the entered address has been verified, the data block identified thereby is transferred to the predetermined element of the storage device 42 in the same manner as described above for text correction (books 447 and 448). ). The central unit 5 is then pre-adjusted to exit the data block starting from the sixth character, i.e. by skipping over the five function characters of the data block (block 449).
). This pre-adjustment is accomplished by a jump command to the storage element where the sixth character of the data block is recorded. When the first word in the line is correct (logical decision 4
50), the employee now activates the interrupt key on the keyboard, which causes the reading of the contents of the next storage element as described above (block 451) and causes the central unit to begin reading characters. Let it be.

After the display of each character, the central unit 5 checks with the command CFR whether this character is a space character. Here the two operands are the space character and the expelled character (
Logical decision 452). If the read character is not a space character, the central device 5 controls the control device 9 of the typewriter 6.
A storage device 42 in which a command COP directed to is recorded.
Executes a jump command to the element section. As previously mentioned,
The command COP causes the printing of the characters read, resulting in the printing of the first word of the line in which the collusion was detected.
When the read character is a space character, the central device 5 sends a command COP to the control device 9 of the typewriter 6, and this command COP acts on the control device 12' (FIG. 14) to print in the manner described above. Stop (block 454). When the word following what is printed is the correct word, the operator again activates the interrupt key on the keyboard 8, which causes the entry of the element following the element in which the space character is recorded and the central unit 5 returns to the state represented by block 451. In this way, the words forming the selected line are printed individually. When the worker realizes that the word following the printed word is a contrived word (logic decision 450), he does not activate the interrupt key, but instead enters the correct word on the 'keyboard' and this is a command. The word is sent to the central unit 5 by the COP, and is recorded in the element section of the storage device C2 in which the planned word was recorded (block 455).

If the number of letters forming the correct word is greater than that of the contrived word, the operator must enter not only the correct word but all other words from the keyboard 2701 until the line is complete. When the last character of the line is reached (logical decision 466), i.e. when the last free element of the data block has been occupied, the central unit 5 stores the thus corrected line description in the tape storage. The start also moves.

For this purpose, the element section following the element section occupied by the last character of the data block contains a selection command COP, which puts the control device 10 into a receiving state. Thereafter, the corrected data block is transferred to the same location in the storage device 7 where it was previously recorded in a manner similar to that described for the case of text recording with respect to FIG. Thus, provided the operator does not introduce more characters than the maximum number of characters that can be recorded in the block, the operator can make any corrections to the text by the operations just described.

Printing of Corrected Text After the operator has made all corrections or changes to the content of the text and has made any associated corrections, the operator prints this corrected text on the “correct copy”. can be commanded.

To accomplish this, the operator activates the start key on the activation keyboard 8, which as previously described is labeled or inscribed with OB? This causes printing. The operator then enters the label EDIT via the keyboard 270 (FIG. 14), which is confirmed by the central unit 5. As a result, a group of instructions called "print" instructions are transferred from tape storage to core storage 42. These operations are illustrated schematically by block 460 (Figure 24). After label EDIT, the operator enters from keyboard 270' the label corresponding to the address of the first line of the first page of text to be printed. This operation is symbolically represented by block 460' (Figure 24). The first command of the group of print commands is the control unit 1 of the active keyboard 8.
This is the command COP directed to.

This command COP has a second character formed from the 8 bits in bell 1 and lights up the indicator lamp of keyboard 8 as described above. The operator is thus alerted that the printing paper must be changed. The operator now inserts the "correct copy" into the platen of the typewriter 6 and activates the interrupt key. The interrupt thus introduced causes the central unit 5 to extinguish the lamp and execute a jump command to the storage element associated with the keyboard 8. In this element section, a command COP for selection directed to the control device 10 of the storage device 7 is recorded. This selection command COP is the keyboard 27
The address entered with 0 is sent to a predetermined element section of the storage device 42, and the central unit 10 is placed in an address setting state. When the address thus recorded in storage device 42 is verified (block 462), the data block thus identified is transferred from tape 310 to a predetermined group of elements of storage device 42 (block 462). 46
3). Command CFR causes central unit 5 to issue the sixth character of the block transferred to storage 42, which indicates the particular operation to be performed on that line (logical decision 464).

If the sixth character is 0, the central unit 5 performs a so-called "legal copy" of the line (block 46) in the manner described below.
5).

After that, the characters are written to the typewriter 6 by successive commands CAP.
(block 466), which takes care of printing the line itself in the manner described above. block 6
If the th character is not 0, the central unit 5 stores this character, together with a group of ``print'' commands, in association with the various operations to be performed on that line and in a predetermined element of the memory 42. (block 46)
7).

If the action to be performed is centering or underlining characters in a line, center hawk 5 performs these functions in the manner described below (blocks 468 and 469). After these processing operations, successive instructions CA
P sends the character to the control device 9 of the typewriter 6 as being to be printed. At the end of each line, central unit 5 checks whether the next block contains an end-of-text character E (block 469).

If this character is not verified, it is determined whether the line printed in central unit 5 via storage 42 is the last one on the page (block 467). If it is not the last row, the central unit 5 repeats the same operations as described from block 461 for the next data block whose address is identified by the first three characters of the previous block; The central unit 5 sequentially performs the printing of all lines of the recorded tribute. The element of the storage device 42 in which the first three characters of each block are recorded is always the same, since all blocks are sequentially recorded in the same element occupied by the preceding block. It should be noted that there is. In this manner, the operation of addressing each block is always performed with the same instruction in the manner described with respect to FIG. On the other hand, when the last line of the page has been printed, the storage device 42 signals the central device 5 that the contribution is complete (logical decision 475).

The central unit 5 enters a standby state (block 468) and issues the command COP directed to the control unit 11 of the keyboard 8.
The indicator lamp will be lit again. The operator is thus warned that the paper must be changed. Furthermore, the central unit 5 enters the address of the first line of the new page into the memory 42 as an input (block 460''). After changing the printing paper, the operator again depresses the interrupt key, thereby printing the new page. When the central device 5 finally sees the end-of-text character E (logical decision 469), it causes the stoppage of the typewriter 6, with the result that the device returns to a stopped or inactive state (block 476).

To justify the lines, it is stated that each block contains a character whose function is related to the length of the printed line.

More specifically, the fourth character indicates the number of characters that the block, hereinafter referred to as NI, may contain, and the fifth character indicates the number NE of characters actually contained in the block. When the data block is transferred to the central unit 5 (block 463 of FIG. 24) and the sixth character of the data block is 0 (block 464), the central unit 5 receives the command C
The fourth and fifth characters of the block are compared by FR (logical decision 470 in FIG. 25). When these characters are equal, printing of the block begins from the seventh character upwards, so that no function character is printed (block 466). This is typewriter 6
This is achieved by the command COP directed to the control device 9 of the typewriter 6 (which command puts the control device 9 of the typewriter 6 in the receiving state) and the command CAP which transfers the characters from the storage device 42 to the control device 9 of the typewriter 6. In fact, the second character of the instruction CAP points to the address in storage 42 that corresponds to the seventh character of each block. If the result of the comparison between the 4th and 5th characters of the block is negative (bit E=0), the central unit 5 uses the instruction CDC to start from the 7th character of the block and Test that the character is not a single space character (logical decision 471).

If this character is not a single space character, i.e. it is a printing character or is followed by another space (bit E=0), the central unit 5 uses the command TRA
executes a jump instruction TRA to the element portion of the memory device 42 in which the character is recorded, and with this instruction it transfers the examined character to a predetermined element portion of the memory device 42 (block 4).
72). If this character is a space character, the central unit 5, after transferring the space character, executes a jump command to the storage element section in which another command TRA is recorded.

This other instruction TRA causes the transfer of another space character to the storage element following the element to which the first space character was transferred (block 473).
Transfer of the characters completing this data block to subsequent elements then occurs as described above for block 472. After completing the data transfer, the central unit 5 transfers the characters of the function to the corresponding element. In particular, the character NE is incremented by one unit amount and transferred (block 474). These operations therefore cause the central unit 5 to transfer a data block from the first register of the storage device to its second register, but insert another space character after the first space character.

In this way, the print line is lengthened by a length corresponding to one space. After this, the central unit 5 again compares the characters NI and NE (block 470).

When these characters are not equal, it transfers the block from the second register to the second register, while the first
Insert another space character in the position following the second confirmed space character that is a single space. Central device 5
repeats this operation over and over until the character NE is equal to the character NI. When this occurs, the lines are printed right-aligned (block 466). For example, when the capacity of the data block is 60 characters (N1i60) and it contains 57 characters (NI=57), the central unit 5 performs the validation in three stages as shown in the table below. .

Here, ND is the difference between NI and NE, and SI...
・・・・・・・・・・・・・ S5 is between the first word and second word of the line, between the second word and third word, respectively.・It is the number of spaces.
If after inserting one space character after all the space characters present in the printed line, the difference ND is still different from 0, the central unit 5 performs a comparison term for the spaces between the words so that the two inheritances are identified. increase.

In this way, it inserts one space character between the words forming the line, repeating the same action as described above with respect to FIG. Therefore, by these operations, each line is printed with the right end aligned to a predetermined position. When the line length is not reached even if two spaces are added to the spaces between words, for example at the end of a sentence where the text leaves a long section before reaching the end of the line, the justification process stops.

As mentioned above, the line end position can be changed by changing the character NI. By suitably changing the character NI, one can, for example, leave space in the text to insert numbers, or the text can be printed in several parallel columns.If the sixth character of the block is 0, then the center The device 5 compares this character with the possible function character by the command CFR (block 4 in FIG. 24).
67) was stated. When the central unit 5 recognizes the centering character, for example represented by the signal "C", it compares the characters NI and NE under the control of appropriate commands, as in the case of justification. When they are different, it transfers the data block from the first register to the second register of the storage device 42 in a similar manner, inserting two space characters in between, where one space character is the data Before the seventh character of the block, insert another space character after the last character occupied by information. After each transfer it increments the character NE by an amount of 2 units. When the difference between NI and NE eventually becomes zero, it commands printing of the contents of the block being centered. When the central unit 5 sees the underlined character represented by the signal "S", it commands the printing of the line recorded in the block. With the command COP it then sends a command to the control device 9 of the typewriter 6 ordering the carriage return without line basting, so that the carriage is moved to the position at the beginning of the line. Thereafter, the central unit 5 checks whether an underlined character is recorded in the element of the storage device 42 corresponding to the first part of the line according to the command CDC.

When this character is recorded, the central device 5 instructs the printing of an underlined character by a command COP sent to the control device 9 of the typewriter 6, and this printing is carried out by the central device 5 after printing each underlined character. Successive instructions CDC are used to continue until the underlined character recorded at the end of the word to be underlined is identified. When the central unit 5 confirms this last character, it sends a space character one after another to the control unit 9, which causes the carriage to move until it confirms the next underlined character.

When this occurs, central unit 5 performs the same operations as described above for underlining subsequent words.
Of course, when one underline character is recorded at the beginning of a block and one underline character is recorded at the end of a block, the central unit 5 underlines the entire corresponding line in the manner described above. When the carriage reaches the end of the line, carriage return with line basing is automatically commanded in the manner previously described. According to a variant of the invention, the command S
can be combined into the command corresponding to the label REGI before recording the print line. In this case, the underline character is used only to indicate the end of the word to be underlined,
It is not used as a lower-class character that exists by itself. In this case printing is carried out under the conditions described for the previous case. According to another modification of the present invention, the underlined characters are
For example, by using the 8th bit of each bit, it is possible to condition the printing of a character to be underlined in such a way that the character is assigned a code different from the code of this character without being underlined. .

In this case, during the printing of the correct copy, the central device 5 decodes these characters in a known manner, printing an underline symbol for each character in sequence, reversing one step and commanding the next character. When the underline symbol is associated with a so-called "ted key", ie, a print month key that does not command sbasing, the command to go back one step after each underline character is suppressed. According to another variant of the invention, the address of the print line can be formed of two characters instead of four.

In this case, the central unit 5 automatically supplies a number identifying the text to which the line belongs. More specifically, when the operator inserts the label "REGI", the central device 5
Command the printing of numbers identifying the first free block of 10. Subsequent blocks are then numbered progressively until the end of the text to be recorded is reached.
In this manner, when the operator wishes to select a line to print, the operator first enters a character identifying the text and then enters two characters identifying the line within the limits of that text.

According to a further variant of the invention, the various programs of the printing device can be selected by the operator simply by actuating the command keyboard 8.

In this case, neither the label "JOB?" nor various labels (REG1, MODI, etc.) for identifying the corresponding program are printed by the typewriter 6. According to a further variant of this automatic printing device, the characters of the aforementioned functions, such as the characters "L" (line length), "S" (underline), "B" (end of text), etc. May be modified to facilitate use by personnel.

As mentioned above, the present invention can be used as an automatic information recording and retrieval device.

To accomplish this, the operator must select through the typewriter 6 or the command keyboard 8 a group of commands that relate to the automatic search for information. More specifically, there are four sets of instructions that are used to determine the type of file, document, correct, and search for a document, respectively. The operation of the device when used to search for documents will now be described in detail.

Recording of file type (format) When a worker wants to record a file in the recording device 7, the worker must first determine the file type, that is, determine the set of keywords that define the same document in the file. be.

For example, if you wanted to record a file for a purchasing office, the file type would include the following keywords: namely, document number, case number, document date, deadline, store, and materials. Of course, the format can vary depending on the requirements, but must always remain the same for all documents recorded in the same file. To record the type of file, the operator either enters the label FORM on the keyboard 6 (block 250 of FIG. 26) or depresses the key on the keyboard 8 that corresponds to the command FORM, and then the operator selects the type of the file. I can do it.

The bag layer according to the invention comes in two types. That is, one type consists of 43 characters and the other type consists of 60 characters. To select the 43-character model, the operator depresses the key on the typewriter 6 that corresponds to the number 1.

This number is sent to the central unit 5 by the "Character from peripheral device" command, and therefore the central unit 5 is sent to the logic decision unit 521.
is given. As a result, central unit 5 generates a code corresponding to an address in tape storage 7 that relates to a type of 43 characters (block 522). On the other hand, when the worker wants to select a 60-character model, the worker selects the number 2.
depresses the key on the typewriter 6 corresponding to the 60-character format of the tape storage 7
The addressing of the first character of the group M occurs (block 523). After these operations, central unit 5 engages in the transfer of the thus selected instruction FORM to core storage 42 in the manner described above (block 524). After entering the command FORM as input, the central unit 5 receives the command CO
P commands the return of the carriage of the typewriter 6 (
block 525). The device then enters a standby state (block 526) and the operator therefore begins entering the model on the typewriter 6, starting with the first keyword of the model itself. Each character entered by the typewriter 6 is recorded in a corresponding element of the storage device 42, which is then compared by the central unit 5 with the character associated with the carriage return using a comparison command (CFR) (logical decision 527). If the entered character is a carriage return character, the central unit 5 returns to the standby state after performing carriage return. Obviously, the operator only engages the carriage return when he has entered the type at the end of a print line. After checking that the entered character is not a carriage return, central unit 5 similarly checks that the character is not a tabulation character (logical decision 528).

If the entered character is a tabulation character, the central unit 5 also checks that it is not the first tabulation character entered for the print line during the feed process (logical decision 529).
). This check is done because in the device according to the invention up to ten keywords can be entered for each file. In fact, the operator acts on the tabulation bar of the typewriter 6 in order to also move from the first keyword to the second keyword. In this manner, the carriage is moved to a position corresponding to the second key W, so that the operator can enter the characters of the second keyword from the keypad. When the worker reaches the Cape mite keyword ', the central device 5 does not accept any further characters, the central device 5 confirms that the entered tabulation character is the 1 mite row, and waits. Return to state. In order to be able to count the number of tabulations entered by workers,
Central unit 5 increments the contents of certain elements of storage 42 based on the tests performed by logic decision 528.

For each tabulation character entered, the central unit 5 issues a constant comparison command (
CDC) is used to check whether the contents of this element section exceed several 10. If the tabulated character is not of the 1st block, the central device 5 stores it in the storage device 42 in a position following other previously entered characters (block 53).
0).

On the other hand, when the tabulation character is the tenth one, central diamond 5 performs a carriage return (block 525) and does not accept subsequent characters. If the characters entered by the operator are not tabulation characters, the central unit 5 determines in a manner similar to that described above that the characters entered do not exceed the maximum number of characters allowed for the selected file type. (logical judgment 531). More specifically, when the operator selects the 4-year character model, the central unit 5 checks that the character entered is not the 44th one, and when the operator selects the 60-character model, it is Check that the character is not the 61st one. The operation just described is performed by the central unit 5 for each character until the operator acts on a pushbutton on the console 8 called the "interrupt pushbutton".
is repeated by

This pushbutton interrupts the operation of the device as described above and causes a jump command (
command the central unit 5 to perform SAL).

In this case, this instruction is a comparison instruction, with which the central unit 5 checks, as described above, that the last character entered does not exceed the number of characters of the selected type (
Logical decision 535). In fact, the operator can actuate the interrupt pushbutton before a print line is completed and after it is completed. If the last character entered is not the 44th one, central unit 5 performs a carriage return (block 525), resulting in the entire entered line being erased from storage 42. This, of course, occurs when the worker realizes that he has made a mistake and wants to rewrite the erroneous line. When the last character entered is the 44th one, the central device 5 puts the control device 10 of the tape storage device 7 into the recording state with the command COP (
Block 536).

In this state, the control device 10 of the tape storage device 7 selects block 0 of the first track of the recording tape and stores therein the type recorded on the storage device 42.

After this, the central unit 5 commands the resolution of this flock and compares its contents with the characters recorded in the storage device 42 and corresponding to the type entered (block 537). This comparison is made in order to avoid the possibility of any confusion occurring during the recording of the type in the storage device 7. If the character read from the storage device 7 is equal to the one entered (logical decision 538), the central unit 5 commands the typewriter 6 to print the label "OK" (block 539), indicating that the characters are not equal. Sometimes it commands the printing of the label "ERROR" (block 540).
.

In this way, the operator prevents the type from being incorrectly recorded on the tape storage device 7. After these operations, the result is that the operator has recorded in block 0 of the first track of the tape the type of file that the operator later wishes to record.

File Initiation (FILE) After the operator has recorded the type of file, the operator can begin recording the file itself.

To do this, the worker either enters the label FILE on the keyboard of the typewriter 6 or depresses the key on the console 8 associated with recording the file (No. 27).
(block 546 of the diagram). As previously discussed, this causes the instructions associated with label FILE to be transferred from tape storage 7 to core storage 42 (block 547). The central unit 5 then begins executing the first instruction of the group FILE recorded in the memory 42.

This command is a selection command COP directed to the control device 10, which commands the selection of block ◯ on track 1, in which the file type is recorded as described above. This type is then transferred to a predetermined register in storage 42 (block 648). After the type has been transferred to the storage device 42, the central unit 5 sends a command COP to the typewriter 6, with which it issues commands to devices not shown in the drawing, is adapted to clear all tabulation stop signals previously selected by the operator in a known manner (block 549).

When all tabulation stop signals have been cleared and the carriage has been returned to the beginning of the line, the central unit 5 sends the typewriter 6 the characters of that type by successive "Character to Peripheral" commands (CAP). send (block 550)
. At the same time, central unit 5 compares the number of characters sent by command CFR with the number of characters forming the first keyword (logical decision 551). If the result of the comparison is equal (if a positive result is obtained), then "i.e. when the first keyword has been printed, the central unit 5 commands to send two spaces, and then by the command COP A command is issued to the device to set a tabulation stop signal for the typewriter 6 (block 552). After this, the central unit 5 begins printing the second keyword, then the third keyword, and so on. Print up to the last keyword. When the central unit 5 commands the printing of the last keyword in the model (logic decision 555), it sends a carriage return command and enters the wait state (block 556).
).

In this way, a printout of the entire model is obtained, as well as the setting of the tabulation stop signal that belongs to the model itself.
At this point, the worker can begin recording the keywords for the file by entering individual letters on the keyboard of the typewriter 6.

From time to time, characters are sent to the central device 5 by command CDP, and the central device 5 performs a series of checks on them. Normally, these checks are accomplished by the command CFR, ie, by comparing the individual characters entered with the characters contained in the group of commands FILE and recorded in the predetermined elements of the storage device 42. Therefore, central unit 5 tests whether the entered character is a carriage return character (logical decision 557).

If the result of the comparison is positive, it returns to the state represented by block 556. Central unit 5 then tests whether the entered character is a tabulation character (block 558). This tabulation character was entered by the worker when the worker used only the part of the character assigned the keyword 'ko'. More specifically, when the keyword during the input process is, for example, "store name", i.e., it consists of 9 characters, the worker can input this keyword while using only 8 of the 9 characters of the keyword. Insert the word "OLIVETTI" correspondingly. In this case, after the symbol "1" the operator acts on the tabulation bar and thus sends the tabulation character to the central device 5. In this case, the central unit 6 introduces a space character in the element part of the storage device 42 following the element part occupied by the symbol "1". Of course, assuming the operator had entered a five letter word, central unit 5 would have introduced four spaces. To do this, the central unit 5 compares each character entered with a tabulation character. If the result of the comparison is positive, the central device 5 sends the same number of spaces as the letters that are missing for the completion of the word following the tabulation letter entered by the worker (block 55).
9). Finally, the central unit 5 checks whether the entered character is a "one step back" character (logical decision 5
60).

If the result of the comparison is positive, it is transferred to the storage device 4 in which the next character entered by the operator is to be recorded.
It is possible to reduce the address of element part 2 by one unit amount, thereby correcting the incorrectly inserted character (block 561). The characters entered by the worker are “
Carriage return'', “tabulation” and “one step back”
If it is different, it is recorded in a particular element portion of storage device 42 (block 565).

Central unit 5 then tests whether the entered character is the last character of the keyword (logical decision 566).
If the result of the comparison is positive, the central device 5 sends a tabulation code to the typewriter 6 (block 567);
As a result, the carriage moves to the position that matches the beginning of the next keyword. In this way, the operator cannot introduce extra characters in terms of the number of characters forming one keyword. The central counterfeiter 5 then checks that the entered character is not the last character in the line (logical decision 568).
).

If the result of the comparison is negative, the central unit 5 returns to the waiting state, and the result of the test is positive and the operator does not communicate in the manner described above that the character is the last one in the file. Sometimes (logical decision 569), the central unit 5 sends a selection command to the tape storage device 7 with a selection command COP (block 570). Controller 10 selects the first free block and stores the entered character therein (block 671). It should be noted that while the entry line is being recorded, the central unit 5 returns to the state represented by block 556, so that the operator can enter the next print line.

Simultaneity of the two operations is achieved using alternating interruptions by tape storage 7 and typewriter 6. Briefly, each time the operator enters a new character, an interrupt is automatically sent to the central unit 5, so that the recording of the previously entered line in the memory 7 is interrupted.

The central unit 5 can therefore accept newly entered characters. The same operation is repeated for subsequent rows so that they are recorded in respective corresponding data blocks. Data block addressing is accomplished by recording the address of the next data block in each block in the manner described above. When the employee has finished recording the file, he activates a predetermined key on the typewriter 6, such as a key corresponding to the symbol "!".

The central unit 5 then sends a selection command COP, which places the controller 10 of the tape storage 7 in the data block submission state (block 575). Each bu. During the block decoding period, the central unit 5 performs a parity check on the characters of the block and compares the parity check characters thus obtained with the parity check characters recorded in the block. Logical decision 576). This last character has already been recorded in the block when the entire block was transferred from the core storage device 42 to the tape storage bag layer 7. If the result of the comparison is negative, this means that a reading error has been issued, and the central device 5 then commands the printing of the entire block (block 571), ``the resulting work The member can learn of the plot and eventually make the change in the manner described below.If the result of the comparison is positive, the central unit checks that the block read is not the last one in the file. (Logic decision 578), and the symbol “! ” is not recorded.

If the result of this test is negative, the central unit moves on to the next block; if the result of this test is positive, the central unit 5 moves to block 0 of the control unit 1 and track 1. Sends a command COP instructing the selection of .

When this block is selected, the central device 5 transfers to it the address of the last block of the storage device 7 occupied by the line corresponding to the previously recorded file (block 579).

After this, the central device 5 commands the printing of the label "OK" (block 580). In this way, the operator is visually informed that the entire file has been successfully read. File Correction (COOR) After the worker corrects the file, the worker performs an inspection of the file itself while rereading the previously printed paper.

If the operator misses something or detects an error during the recording phase, he inserts a new sheet of paper into the typewriter 6 and inserts the label COIR or activates the pushbutton on the console 8 associated with the command CRIR (see FIG. 28). block 585), causing the transfer of the instruction COOR from the tape storage 7 to the core storage 42 (block 586)
. The central unit 5 then begins executing the command C○m. The first command is a selection command COP directed to the control unit 101 of the storage device 7. This instruction selects block 0 of track 1, which contains the type of file as described above. The type is thus transferred to core storage 42 and printed on the paper (block 587), and at the same time the tabulation stop signal is again set in the manner previously described. When a worker wants to replace a line with a plot with a new line, he enters the symbol M on the typewriter keyboard (No. 28).
(block 588 of the diagram). The operator then enters the line to be corrected in a deliberate manner on the keyboard, which is thus recorded in the register of the storage device 42. When the operator has finished printing a line of print or font, the central unit 5 begins to read out successive blocks of track 1 and at the same time compares it with the block entered by the operator. The blocks recorded on the tape are retrieved and compared in this manner one after the other until the central unit detects that the input block and the recorded block are equal (block 590). At this point, the central unit 5 commands the tape to stop and signals to the operator, such as by lighting a lamp, that a new print line can be entered. The operator then enters a new line in the correct form and this is thus recorded replacing the intended line (block 591). If the operator wishes to erase all of the documents from the beginning of the file within a range of sequential numbers, the operator enters the symbol ``A'' (block 592) and then deletes all documents from the beginning of the file that the operator wishes to keep. (block 593). The central unit 5 then commands the selection of the block associated with the entered document and stores the address of this block in the storage device 42. As previously described, , each data block also records the address of the next data block. Therefore, when this address is changed, reading the file can start from the block defined by this new address. After this, the central unit 5 commands the selection of block 0 of track 1 and transfers to it the address relating to the block entered by the operator as replacing the previously recorded one (block 595). Only documents following the one selected by the worker during the search period are taken into account. When the worker wants to remove all documents following a certain document up to the end of the file, the worker can select the symbol Enter a "1" (block 596) followed by the keyword associated with the last document the worker wishes to retain (block 597).

Central unit 5 then selects the data block corresponding to the entered document (block 598) and records the address associated therewith in storage 42. After this, the central unit 5 selects block 0 of track 1, which block contains the address of the last block of the file as described above. After this, it enters a new address selected by the worker to replace the address of the last block of the file (block 599). In this way, during successive searches only addresses between the beginning of the file and the end of the new file entered by the worker can be taken into account. Document Search (hOOK) When a worker wants to search for a document in a previously recorded file, the worker should use all of the same keywords that were used when inserting the document into the file to identify the document itself. I can do it.

In this case, the printing device provides the reference number of the document being searched for in a manner described below. However, if the worker does not know all the keywords related to the document correctly, the worker can only communicate some keywords to the device, and eventually the device will write the file corresponding to the communicated keywords. Give details of all documents inside. Furthermore, the worker does not have to be sure about a single keyword. For example, when the keyword is "issue date", the worker may not be sure whether the document was issued in May or June. In this case, the worker can enter multiple alternative plans, up to a maximum of three.
Naturally, the document number given by the device at the end of the search will be less accurate the more accurate the item of information given by the operator is about the document to be searched. At the beginning of a search, the worker inserts into the tape storage device 7 a reel for the file in which the document to be searched is presumed to be recorded.

The worker then writes the instruction FORM from the tape storage 7 to the core storage 42 by entering the label hook on the typewriter 6 or by activating the button on the keyboard 8 associated with the instruction LOOK (block 600 in FIG. 29). Send sick. When all instructions have been recorded in memory 42, central unit 5 begins executing the first of these instructions. This first command is a selection command COP directed to the control device 10 of the tape storage device 7. This command causes the selection of block 0 of the blocks of track 1 in which the file type is recorded as described above. When block 0 is selected, central unit 5 transfers the type to core storage 42. In this case, it is the command FIL
As explained in connection with E, a command is issued to clear tabulation stop information existing in the typewriter 6, and at the same time a command is issued to set tabulation stop information related to the type recorded in the storage device 42. After this, the central device 5 commands the printing of the model number, and then commands the return of the carriage. At this point, the worker begins to introduce keywords related to the document or documents being searched.

After entering each character, the central unit 5 compares the number of characters entered with the number of characters making up the corresponding keyword of the type recorded in the storage device 42, and determines whether it is the last character of the keyword. It is checked whether it is a character (logical judgment 603). If this character is not the last of the keyword, central unit 5 enables the keyboard of typewriter 6 so that the operator can enter the next character (block 604). The central unit 5 then performs a series of tests on the characters entered by successive commands CFR.

The central unit first verifies that the entered character is not a tabulation character (logical decision 605). There are two cases in which a worker may enter tabulation characters. That is, there are cases in which a keyword is entered whose number of characters is less than the number of characters constituting the keyword corresponding to the type, and cases in which the keyword is not intended to be used for searching. The latter case obviously occurs when a worker forgets or misses information related to a keyword during the submission process. For example, when the keyword is "issue date", the worker will not know the date on which the document to be searched was issued.
When the central unit 5 verifies the tabulation card, it sends as many spaces to the typewriter 6 as the number of characters needed to complete the keyword (block 606) and simultaneously sends an equal number of space characters to the storage device 42.

After this, central unit 5 tests whether the entered character is a carriage return character (logical decision 607).

If the result of this test is positive, it simultaneously commands the return of the carriage of the typewriter 6 and the erasure of all previously entered characters and recorded in the storage device 42 (block 608). In this way, the operator can erase one complete line of print when he realizes that he has made a mistake in his input. When central unit 5 determines that the entered character is neither a tabulation character nor a carriage return character, it records it outside a particular register in storage 42 (block 609).
. When the central device 5 confirms that the entered character is the last character of the keyword (logical decision 603),
It checks that the previously entered keyword is not the last one in the type (logical decision 610).

This is naturally achieved by a successive command CFR, by means of which the central device 5 compares the entered print line with the type of line recorded in the memory 42. If the keyword entered is not the last one, the central unit 5 sends a tabulation character to the typewriter 6 (block 61 1);
As a result, the carriage is moved to the position corresponding to the next keyword. When the carriage is positioned at the end of the line, central unit 5 automatically sends a carriage return command (block 612). At this point, the keyword corresponding to the document to be searched has been stored in a register of storage device 42', not shown in the drawings but indicated generally by the reference symbol R'.

The addresses of the elements of the register R' are predetermined, so that the characters recorded therein can be placed under the control of the central unit 5 during the search period, as will be explained below. The operator also has the possibility of introducing up to three alternative keywords to those previously entered (logical decision 613).

To do this, in the next line, the worker re-inserts the keyword for which he does not wish to give an alternative, and during this time he inserts this new keyword into the section in which he intended to insert the alternative. In this way, for example, if the worker does not know the publication date of the document being searched for, the worker can select an earlier date that is an alternative to the date entered under the keyword "issue date". line. The same action is performed when the worker wants to put in a third fist. In the same manner as described above, separate keywords are recorded in two further registers R'' and R''' of the storage device 42, which are then placed under the control of the central unit 5 during the search operation. .

After this, the central unit 5 commands the locking of the keyboard of the typewriter 6 (block 614) and the lighting of the lamps on the console (block 615).

At this point, the keyword input phase is over and these keywords are placed in storage in the storage 42 of the central unit 5 in predetermined registers R', R'', R... When the operator wishes to command the start of a search, the operator depresses the interrupt key on console 8, which starts the tape (block 620).

At this moment the tape is positioned such that block 0 of track 1 is aligned with the read head, so that central unit 5 commands the first address of the file (block 621), as described above. so track 1
Blocks of rivers are recorded. After this, the central device 5 starts deleting the characters of the block thus selected (block 622) and stores them in the storage device 42, not shown in the drawings and indicated by the reference symbol M. Transfer outside of Regis.

Central unit 5 then checks that the character entered by the operator and recorded in register R' is not a space character (logical decision 623). When the character entered by the worker is a space, the central device 5 determines that the comparison with the corresponding character recorded in the register M of the storage device 42 is positive. In fact, when the worker does not use all the letters of a keyword, or does not use a keyword at all, the central unit 5 behaves as if the worker had entered exactly the same keyword in the corresponding keyword of the file. This is necessary because the comparison must be made only for the keywords actually entered by the operator. If this character is not a space character, the central unit 5 stores it in register M
(logical decision 624).

If the result of the comparison is positive, the central unit continues to compare the next character; if the result of the comparison is negative, the central unit 5 stores a character in one element of the memory 42 that signals the mismatch. record (block 625) and then continue comparing subsequent characters. When the last character of this block is reached (logical test 627), the central unit 6 determines whether the block of the file is recorded in one element part of the storage device 42 outside this register and is equal to the block entered by the working block. record. 3 during the sending-in phase of the search.
When entering two separate jobs, the central unit 5 compares each block of the file, or the contents of register M, first with the first block entered by the worker and recorded in register R', and then with register R''. , and finally register R
Compare with ′′′. In this way, at least one of the three blocks of the file entered by the worker
The result of the comparison is considered positive when it is confirmed that the two are equal. If this block of the file is not equal to one of those entered by the worker, then the central unit checks whether the end of the file has been reached (logical decision 628).

If the result of this test is positive, the symbol “F”
is ordered, so that the operator is informed that the searched document is not recorded on the cartridge inserted into the storage device 7 and that it can be replaced by another. If the result of the comparison is positive, the central unit 5 commands the address of the next block to be presented (logical decision 630). If this block is adjacent to the one previously read, central unit 5 returns to the state represented by block 622 and begins addressing this character without stopping the tape. If this block is not adjacent to the retrieved one, the central unit 5 commands the selection of the block to be read (block 631), thereby positioning the tape such that this block coincides with the retrieved head. These operations are repeated until central unit 5 verifies that the block of the file is equal to one of those entered by the worker and recorded in registers R, R'' and R''' of storage device 42.

When this occurs, a stop of the tape is commanded (block 632). The central device 5 then compares the number of printed lines with the maximum number of printable lines to check that the end of the paper has not been reached. This comparison is performed by instruction CFR, where the first operand is the number of lines printed and the second operand is the maximum number of lines that can be printed (logical decision 633). If the result of this comparison is negative, the central processor 5 commands the printing of a block of files so that the operator can read out all the keywords of the searched document (block 634).
). Thereafter, central unit 5 returns to the state represented by block 622 while continuing to issue subsequent blocks. If the result of the comparison is positive, the central unit 5 commands the printing to stop (block 635) so that the operator can replace the paper. After this, the operator depresses the interrupt key, which causes the interrupted printing to resume on a new paper. When all documents corresponding to the entered keyword have been printed, the central device 5 commands the printing of the label "END", so that the operator is prevented from completing the search. The information retrieval system may also be used to automate the delivery of office correspondence.

In fact, the need often arises to send a certain number of the same letter to a certain number of addressees. This occurs, for example, when starting a promotional campaign by sending a letter to a certain range of users. To accomplish this, the worker records a file in which the user is identified by suitable keywords, such as ``customer type'', ``response due date'', etc. After that, the above-mentioned instructions are executed. Using groups, a worker records a standard letter in a particular block of tape storage.
When it is desired to select the addressees of a group, the worker enters a keyword by which this group is to be identified in the manner described above and then selects the block of the storage device 7 in which the first line of the letter to be printed is recorded in the manner described above. Select.

After this, the device searches for the addressees based on the keywords entered by the worker and transfers them to the storage device 42, after which the letter to be printed is based on the address entered by the worker. It is also transferred to the storage device 42.

After this, the operator introduces the first sheet of paper into the typewriter 6 and commands the printing of the first letter, which therefore contains the selected first address.

When the printing of the first letter is completed, the worker introduces new printing paper into the typewriter 6, then commands the printing of the second letter, and so on until the addressee is printed.
In this way, correspondence can be sent in a completely automatic manner, and considerable time is saved. Furthermore, the type of file can be recorded in a different way than described above, for example by suitably encoding keywords.

A factual addressee table may be recorded by associating each customer with a particular combination of letters, with each letter representing one keyword. In this case, addressee selection is performed by commanding a search for all addressees to whom the same letter has been assigned. It will be understood that various changes or modifications may be made within the scope of the invention.

For example, instead of recording all of the machine's operating instructions on tape 310', they can be stored in a static readout memory (ROM).
can be recorded. This storage device can be of any type, for example made using integrated circuit technology, and can be included in the central device 5. This naturally shortens the program call time, but
And in the end, it is done to speed up the execution of necessary services. Second Embodiment According to another embodiment, the device 5 can be connected to two magnetic tape storage devices 7 and 7' (FIG. 30).

Tape storage devices 7 and 7' are of the same type and equivalent as described above. As a result, controller 1, its output channel 340 and input channel 343 are not just one storage device, but tape storage devices 7 and 7'.
It differs from the corresponding control device described above only in that it is connected to both. In terms of operation, this does not make any difference to the operation described above, since the control device 10 is not connected to the two storage devices 7 and 7' at the same time, but to one or the other. This is because it will be done. To achieve this, two storage devices 7 and 7'
each is identified by an address, so that
When the central device 5 confirms the address of the storage device 7, a connection with the storage device 7 is established. On the other hand, when it confirms the address of the storage device 7', a connection is made with the storage device 7'. When the operator desires to record text or a certain number of passages, the operator inserts the cartridge into the storage device 7 and selects via the command keyboard 8 the area of the tape in which the text is to be recorded.

As mentioned above, the central unit 5 automatically combines the address of the block in which the print line or the writing entered by the operator by means of the keyboard of the typewriter 6 is to be recorded and automatically transfers the tape storage 7 to the typewriter 6. Connect the keyboard. In this way, the operator can recognize the addresses corresponding to various passages in the copy and then command the prompting of those passages themselves when desired to print them later. The worker can also keep track of the addresses of the people he wants to send letters to. In this way, the worker prepares a file in which both the standard decoration and the address of a certain celebrity are recorded. When the operator wishes to print a series of similar letters to multiple addressees, the operator introduces a cartridge previously recorded on the tape storage device 7'.

Via the function keyboard 8 and typewriter 6, the worker then sequentially selects the passages to be included in the letter in the manner described above. The operator introduces a piece of paper into typewriter 6 and enters the label REGI via the keyboard of typewriter 6 (block 650 in Figure 31). As previously mentioned, this causes the transfer of the instruction to be recorded to the storage unit 42 and at the same time causes the return of the carriage with line basing. The worker then activates the key corresponding to the letter K (block 651), and the central unit 5 confirms the corresponding code and issues the command K.
A jump command (SAL) is executed to the element section of the storage device 42 in which the first of the commands associated with the first command is recorded. The first of these instructions is the instruction COP directed to the typewriter 6, which is a line based code (
At block 652) carriage return occurs.

After this, the worker can enter the first and last addresses of the first clause to be included in the letter (block 653). The central unit 5 then transfers the passages selected in this way from the storage device 7' to the core storage device 42. At the same time, this passage is typewriter 6 (block 65
4) is printed. If the worker does not wish to print the phrase, the worker presses the interrupt key on the command keyboard 8 (logical decision 655). This conditions central unit 5 not to send characters read from the tape to typewriter 6. Simultaneously with the printing of this phrase, the transfer of this phrase from storage 42 to tape storage 7 (block 656) occurs in the following manner. That is, the central unit 5 transfers the first row from the storage device 7' to the storage device 42. When the entire line has been transferred, it starts printing that line and transfers it to the storage device 7 at the same time. At the same time as the first line is printed, the central device 5 transfers the second line from the storage device 7'. Ru. Synchronization between the various operations is provided by the interrupt mechanism described above. After the transfer of the selected phrase is completed, the central unit 5 moves to a standby state (block 659).

There are two possibilities here for the worker. That is, either the transfer of another phrase from the storage device 7' to the storage device 7 is selected, or the new phrase is inserted. In the first case the same operations as described above are repeated, i.e. a return is made to block 653, and in the second case the central unit 5
attempts to connect the storage device 7 with the typewriter 6 and to record in the storage device 7 the phrases entered by the worker via the keyboard of the typewriter 6 (block 661). This phrase is recorded and recorded in the memory device 7 following the phrase previously read out from the memory device 7'. In this way, the worker can retrieve the permanent passage from the storage device 7' and insert the new passage directly into the typewriter 6.
The complete text of the letter to be printed can be recorded in the storage device 7 by inputting it using the keyboard. When the worker has completed entering the text (logic decision 662), the worker uses the keyboard of the typewriter 6 to record the address and residence location and name of the first recipient to whom the letter is to be sent (block 663). The address is then taken from the copy previously recorded by the worker. as a result,
The central unit 5 selects the address entered in this way and enters a waiting state. The operator then changes the printing paper and presses down the interrupt key on the function keyboard 8. As previously discussed, this results in the printing of the name and address of the first addressee (block 664).
When the central counterfeiter 5 confirms the end of the address, it continues to issue the first line of the letter recorded in the storage device 7 (block 665) in the manner described below. A code is recorded at the end of each address. When the Chuohishinao 5 confirms this code, it executes a jump instruction (SAL) to a predetermined element section of the memory device 42. A selection command COP directed to the tape storage device 7 is recorded in this element section. This command COP causes a connection between the central unit 5 and the tape storage 7. Once this connection has been made, the central unit 5 selects the address in the memory bag 7 in which the first line of the standard letter to be printed is recorded, using the same selection command COP. Once this line has been selected, the central device 5 instructs the transfer of the characters of this line to the storage device 42 by successive commands CDP, and at the same time instructs the typewriter 6 to print. The same operation is performed for subsequent rows. Simultaneously with printing the letter, the central device 5 commands the selection of the second address in the tape storage 7'.

The interrupt mechanism provides concurrency of the two operations. For this reason, by the time the typewriter 6 has finished printing the standard characters, the second addressee's address has already been selected and is ready to be displayed by the central unit 5. When the central device 5 confirms the standard letter end code, it stops printing;
As a result, the operator can introduce a second sheet of paper into the typewriter 6. When the worker depresses the interrupt key again, the central device 5 commands the printing of the second address in the manner described above, and at the same time acts on the storage device 7 so that the first line of the letter to be printed is read out onto the magnetic tape. As a result, after printing the address, the central unit 5 commands the printing of the letter in the manner described above. The same operation is repeated for other addresses until the end of the table is reached. When central unit 5 verifies the last address (logical decision 666), it returns to the waiting state (block 667). From what was mentioned above,
It will be appreciated that the use of two tape storage devices 7 and 7' speeds up the printing of documents.

In fact, in this way all the passages of the text, both fixed and variable, are recorded one after another in the storage device 7, as a result of which the loss of time due to searching for individual passages is eliminated. Furthermore, in the case of repetitive printing of letters designated for multiple addressees, the reloading according to the invention allows the body of the letter to be automatically brought to the starting position while the addresses are being printed, or Conversely, while the text of the letter is being printed, the address is automatically brought to the starting position;
Therefore, the printing speed is increased.

Another advantage of a device with two tape storages lies in the fact that recordings made on one cartridge can be reproduced on the other cartridge.

This is particularly useful for use in offices that have become equipped with multiple printing devices that use multiple identical cartridges simultaneously. To accomplish this, the worker activates key K without specifying any address. As previously mentioned, this causes the contents of the cartridge contained in the storage device 7' to be transferred to the cartridge contained in the storage device 7.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a printing device according to the present invention. FIG. 2 is a block diagram of the central unit of the apparatus of FIG. FIG. 3 is a block diagram of the timing circuit of the central unit of FIG. FIG. 4 is a diagram of timing signals generated by the circuit of FIG. 3. FIG. 5 shows a circuit for generating the operating states of the central unit of FIG. 6-12 show command circuits corresponding to an equal number of operating states of the apparatus of FIG. FIG. 13 shows the input circuit of the central unit of FIG. FIG. 14 is a block diagram of a control system for the input and output devices of the apparatus of FIG. FIG. 15 shows the length of the magnetic tape for the device of FIG. FIG. 16 shows details of the tape of FIG. 15. FIG. 17 is a block diagram of a control device for the apparatus shown in FIG. 1 for recording and outputting magnetic tape. FIG. 18 is a flowchart of the operation of the control device of FIG. 17. 19 and 20 are flowcharts of writing instructions to the device of FIG. 1. FIG. 21 is a flowchart relating to recording text. FIG. 22 is a flowchart relating to changing the format of text. FIG. 23 is a flowchart relating to the correction of lines of text. FIG. 24 is a flowchart relating to printing text. FIG. 25 is a flowchart relating to justifying lines of text. FIG. 26 is a flowchart relating to the recording of file formats. FIG. 27 is a flowchart relating to recording a file. FIG. 28 is a flowchart relating to file correction. FIG. 29 is a flowchart relating to searching for documents. FIG. 30 is a block diagram of another embodiment of the apparatus according to the invention. 31st
The figure is a flowchart of the function of FIG. 30. 5: Central device, 6
: typewriter in peripheral device, 7: magnetic tape storage device, 8: keyboard, 9: typewriter control device, 10
: Control device for magnetic tape storage device, 11: Control device, 1
2: Input/output device, 39: Processing device, 42: Core storage device, 20: Timer, 21: Oscillator, 22: Shift register, 23: Inverter, 24: AND gate circuit, 30
: register, 44, 88: counting circuit, 45, 62: decoding circuit, 47: storage device input logic circuit, 63: command logic device, 90: switching circuit, 98: comparison circuit. Figure 1 Figure 3 Figure 2 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11 Figure 12 Figure 15 Figure 16 Figure 13 Figure 14 Figure 17 Figure 18Figure 19Figure 20Figure 25Figure 21Figure 22Figure 23Figure 24Figure 26Figure 28Figure 27Figure 30Figure 29Figure 31

Claims (1)

[Claims] 1. Manual input device 8 including a device for inputting text information
, 12, storage devices 42 and 7 for storing the input text information, a serial printing device 6 for printing the read text information on separate lines, and a starting point and an ending point thereof are independent of the word space. a device 5, 9 for automatically underlining a portion of the text defined by two underlining signals input by the input device;
Said two underlining signals are stored in said storage device 42, 7 and cause all said portions of said text to be printed during one scan of said printing device 6 and said stored underlining signals A text processing device, comprising a device for causing said portion to be underlined during every other scan of said portion to be printed under the control of a signal. 2. A text processing device according to claim 1, wherein a complete print line containing the portion of text is printed before scanning the portion for underlining the portion, and wherein the complete line of print containing the portion of text is printed before scanning the portion for underlining the portion; Both scans of the printing device 6 are scans of one complete line, and the two underline signals are an underline start signal and an underline end signal stored corresponding to the start and end points of the section, respectively. text processing device. 3. In the text processing device according to claim 1, the storage devices 42, 7 include the first recording medium 42 and the second recording medium 7, and the storage devices 42, 7 include the first recording medium 42 and the second recording medium 7.
The recording medium 42 is selectively connectable to the printing device 6 and the input devices 8, 12, and a transfer device is provided to selectively transfer characters from the first recording medium 42 to the second recording medium 7. The text processing device is configured such that characters inputted by the input devices 8 and 12 and characters selectively transferred from the first recording medium 42 are recorded on the second recording medium 7. 4. In the text processing device according to claim 1, the storage device 42.7 includes the first recording medium 42 and the second recording medium 7, and the first recording medium 42 is connected to the printing device 6. A transfer device is provided which is selectively connectable to the input devices 8, 12 and for selectively transferring characters from the first recording medium 42 to the second recording medium 7. The medium 7 records characters input by an input device and characters selectively transferred from the first recording medium 42, and the first and second recording media 42, 7 are each identified by one address. It is divided into multiple blocks, each storing one line of text information.
The transfer device is operated by the input devices 8 and 12 to select a predetermined address from the first recording medium 42 and record the block identified by the address on the second recording medium 7. Text processing device.