JPS60142387A - Random number mixing circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a random number mixing circuit, especially one used with a cryptographic random number generator, which performs compression deformation and compression in order to make random number analysis difficult. This invention relates to a random number mixing circuit that performs transposition using random numbers that are discarded during conversion.

CB) Technical Background and Problems Random number generation methods include, for example, [Mathematical Science No. 203
(May', 1980), p. 77~, there are many types, but chained random numbers are most often used in cryptographic machines. Chain random numbers include those based on the central square method,
Joint method, mixed joint method, Feedb
There are some by ack 5hift &gister, etc., and even though these are sufficient as random numbers for general use, when looking at them as random numbers for cryptography, there is a risk that the random number generation algorithm may be analyzed from a part of the random number sequence. , cannot be used as is.Therefore, it is being considered to make random number analysis difficult by using a device that compresses and transforms the random numbers.

As an example of compression conversion and transposition, an example of the Data Encryption System (DE8) encryption established by the American Bureau of Standards will be shown.

FIG. 1 is a diagram for explaining an example of compression conversion.
It compresses and converts a bit random number into a 4-bit random number. 2 bits (0 to 3) of the 6-bit input
The vertical columns shown in the figure are selected, and the horizontal columns are selected using the remaining 4 bits (0 to 15), and a 4-bit random number from 0 to 15 at the intersection is output.

FIG. 2 is a diagram for explaining an example of transposition.

In the case of transposition, you replace the location of a number, so to speak. for example,
Numbers O to 31 are given to the 32 signal lines. and,
When one input line is expressed in quaternary x octal, it is connected to the output line shown in FIG. In this way, from 32 to the other 3
Perform transposition into two lines.

Compression conversion and transposition as described above are extremely complex, but if a large amount of data is handled with the logic fixed, there is a risk that it will be statistically deciphered. Furthermore, if the cipher machine itself is stolen, or if it is made public as in the case of DBS, the amount of work for the cryptanalyst will only increase somewhat.

(C1 Purpose and Structure of the Invention The present invention solves the above problems by performing a transformation that changes each time it is used, instead of a fixed panther transformation as in the past, and statistically estimating the transformation algorithm. The purpose of this paper is to provide a random number mixing circuit that not only makes it impossible to perform a random number mixing circuit, but also prevents it from being able to be used in a cryptographic machine, for example, even if the cryptographic machine is stolen and the conversion algorithm is known. The random number mixing circuit of the invention is used together with a random number generator and performs compression conversion and/or transposition of the random numbers generated by the random number generator, in which a random number 1c memory consisting of 0 digits supplied from the random number generator is provided. a means for extracting 0-digit data from the corresponding number of buffer memories; and a means for outputting a part of the 0-digit data and sending a part to the address of the buffer memory to be selected next. The present invention is characterized in that it has a means for use.Hereinafter, an explanation will be given according to an embodiment with reference to the drawings.

(D1 Embodiment of the Invention FIG. 3 shows the configuration of an embodiment of the invention, and FIG. 4 is a diagram for explaining the operation of the embodiment shown in FIG. 3.

In the figure, BO and BO are buffer memories, 1 is a random number generator, 2 is an address register, 3 is a decoder, and AO to A19 are AND circuits.

The random number mixing circuit according to the present invention is based on the following principle.

The random numbers generated by the random number generator are divided into certain digits and a part of them is output. This itself can be considered to be similar to simple compression conversion. Then, using the random numbers that were not output during the compression transformation, the next division point to be used is selected 6, that is, a process equivalent to transposition is performed using the random numbers discarded during the compression transformation.

When part of a random number sequence is discarded, codebreakers have to guess the discarded random numbers and search for an algorithm to generate random numbers, which increases the amount of work they do. The more eyelids that are discarded, the more work is required. Next, a random number (two υ
Even if the transposed random numbers are restored under the assumption that they are random numbers, there are still four clues that show that the assumption is correct. By combining the two, not only can random numbers with high analysis strength be obtained, but also a random number mixing circuit can be obtained with good usage efficiency between input random numbers and output random numbers.

As shown in FIG. 3, the random number generator 1 generates random numbers in a chain by, for example, the mixed congruence method or the FAR method. Random numbers generated by random number generator I are stored in buffer memory BO-89 via AND circuit AO-A9. Address register 2 is a register that specifies one of the buffer memories BO-89. The address specified by address φ register 2 is sent to decoder 3.
It is decoded by the buffer memory and becomes the output and input selection signal for the buffer memory.

For example, address register 2 is buffer memory B
6, buffer memory B6 is selected by the output of decoder 3, and buffer memory B6 is selected by the output of decoder 3.
The contents of are extracted through the AND circuit A16. At the same time, the random numbers generated by the random number generator 1 are set by the number of digits in the buffer memory B6 via the AND circuit A6.

A part of the data taken out from buffer memory B6 is used as an output random number, and the rest is set in address register 2 for selection of the next buffer memory BO-89. Random numbers are then repeatedly output in the same way.

Next, referring to FIG. 4, an example of random number mixing using the circuit shown in FIG. 3 will be described.

The random number sequence shown in FIG. 4(A) is generated by the random number generator 1, and is generated based on the following equation.

Xi+1 3581Xj+781 (mod 1000
) When the random numbers obtained by this formula are divided into three digits and arranged horizontally in 10 terms as shown in Figure 4 (a), the sequence of the last digits in the upper and lower columns is r3,6°9.2, 5.・
...'', and a regularity is found. Furthermore, the middle digit in the lower column is the sum of 3 added to the middle digit in the upper column, and there is clearly a regularity in this point as well. In order to remove this regularity and make analysis difficult, the following circuits are used (see Figures 2 and 3).

First, the random numbers generated by the random number generator 1 are initialized into the buffer memory IJBOB 9 two digits at a time. As shown in FIG. 4 (b), the buffer memory BO contains r
"72" of 723J is stored in buffer memory B1, "37" is a combination of the last digit of r723J and the most significant digit of r786J, and "86" of r786J is stored in buffer memory B2. Thus, values are sequentially set up to buffer memory B9 in two-digit increments. Here, if address register 2 is initialized to "0", first the buffer memory B O
is selected, and the data "72" is taken out via the AND circuit AIO. Then, for example, the left digit "7" is set as the output random number, and the right digit "2" is set in the address e register 2 to be used for the next address. Note that when extracting data from the buffer memory BO, the next random number "15" supplied from the random number generator 1 is sent to the AND circuit AO.
It is newly set in the buffer memory BO via t.

The next output shows the value held by address register 2 as “
2'', buffer memory B2 is selected, and similarly, the left digit ``8'' is set as the output random number, and the right digit ``6'' is set as the next address.

At this time, the next two-digit random number "04" is newly set in the buffer memory B2. Subsequently, buffer memory B6 is selected and output is repeated in the same manner. That is, as shown in Figure 4 (b), ■, ■, ■, ■
, . . . , they often operate in the order of 0.

The result of the output random numbers obtained in this way is as shown in FIG. 4, and has no regularity.

In the above embodiment, it has been explained that taking out a random number from the buffer memory and replenishing the next random number are performed at the same time, but this may be provided as a separate circuit, and the order of replenishing the random numbers may also be determined by the random numbers.

Further, the number of random number extraction digits and the number of replenishment digits may be changed. Furthermore, it is possible to arbitrarily allocate which part of the random numbers taken out from the buffer memory should be used as output random numbers, which part should be used as addresses, and which part should be completely discarded. The random number to be supplied is not limited to one random number generator, and it is also possible to supply outputs from two or more random number generators.

(As described in detail, according to the present invention, a random number sequence with high analysis strength can be obtained even from a relatively simple random number sequence.

Even if the mixed algorithm is known, it is almost impossible to analyze the original random number generation algorithm from the resulting random number sequence, and this is particularly effective when applied to cryptographic machines, for example. The circuit is very simple, requires only a small number of elements, and can be designed economically.

[Brief explanation of the drawing]

Fig. 1 is a diagram for explaining an example of compression conversion, Fig. 2 is a diagram for explaining an example of transposition, Fig. 3 is a configuration of an embodiment of the present invention, and Fig. 4 is a diagram of 31yJ diagram u1. A diagram for explaining the entire operation of the example is shown. In the figure, 1 represents a random number generator, 2 represents an address register, 3 represents a decoder, and LB9 hub 7 arm memory without BO. Patent applicant Fujitsu Limited

Claims (1)

[Claims] A random number mixing circuit that is used together with a random number generator and performs compression conversion and/or transposition of random numbers generated by the random number generator, includes b buffer memories that store random numbers consisting of 0 digits supplied from the random number generator; , means for retrieving 0-digit data from the corresponding buffer memories;
1. A random number mixing circuit comprising means for outputting part of the digit data and using the part as an address of a buffer memory to be selected next.