JPS6013767U - ラインサ−マルヘツドにおける電極構造 - Google Patents

ラインサ−マルヘツドにおける電極構造

Info

Publication number
JPS6013767U
JPS6013767U JP1983105203U JP10520383U JPS6013767U JP S6013767 U JPS6013767 U JP S6013767U JP 1983105203 U JP1983105203 U JP 1983105203U JP 10520383 U JP10520383 U JP 10520383U JP S6013767 U JPS6013767 U JP S6013767U
Authority
JP
Japan
Prior art keywords
thermal head
electrode structure
line thermal
electrode
line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1983105203U
Other languages
English (en)
Inventor
栗原　一雄
Original Assignee
セイコーインスツルメンツ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by セイコーインスツルメンツ株式会社 filed Critical セイコーインスツルメンツ株式会社
Priority to JP1983105203U priority Critical patent/JPS6013767U/ja
Publication of JPS6013767U publication Critical patent/JPS6013767U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electronic Switches (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Structure Of Printed Boards (AREA)
  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
第１図は、ラインサーマルヘッドにおけるマトリックス
駆動の概念図、第２図は、現行電極構造の平面図、第３
図、第４図はそれぞれ本考案の実施例で、電極構造の平
面図を示す。２　−１・・・・・・共通電極、２・・・
・・・ドツト選択電極、３・・・・・・発熱抵抗体、４
・・・・・・逆電流防止素子、６・・・・・・ダイポン
ディングパターン、７・・・・・・−次側電極、８・・
・・・・二次側Ｗｉ、９・・・・・・ワイヤー。

Claims (1)

    【実用新案登録請求の範囲】
  1. 複数のホンディング又は検査電極の結合部にキリカケを
    設けたことを特徴とするラインサーマルヘッドにおける
    電極構造。
JP1983105203U 1983-07-06 1983-07-06 ラインサ−マルヘツドにおける電極構造 Pending JPS6013767U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1983105203U JPS6013767U (ja) 1983-07-06 1983-07-06 ラインサ−マルヘツドにおける電極構造

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1983105203U JPS6013767U (ja) 1983-07-06 1983-07-06 ラインサ−マルヘツドにおける電極構造

Publications (1)

Publication Number Publication Date
JPS6013767U true JPS6013767U (ja) 1985-01-30

Family

ID=30246699

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1983105203U Pending JPS6013767U (ja) 1983-07-06 1983-07-06 ラインサ−マルヘツドにおける電極構造

Country Status (1)

Country Link
JP (1) JPS6013767U (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0582550U (ja) * 1992-04-14 1993-11-09 セイコー電子工業株式会社 サーマルヘッド基板
JP2017043013A (ja) * 2015-08-27 2017-03-02 京セラ株式会社 サーマルヘッドおよびサーマルプリンタ
JPWO2020196078A1 (ja) * 2019-03-26 2020-10-01

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5542355B2 (ja) * 1973-09-28 1980-10-30

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5542355B2 (ja) * 1973-09-28 1980-10-30

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0582550U (ja) * 1992-04-14 1993-11-09 セイコー電子工業株式会社 サーマルヘッド基板
JP2017043013A (ja) * 2015-08-27 2017-03-02 京セラ株式会社 サーマルヘッドおよびサーマルプリンタ
JPWO2020196078A1 (ja) * 2019-03-26 2020-10-01
WO2020196078A1 (ja) * 2019-03-26 2020-10-01 京セラ株式会社 サーマルヘッドおよびサーマルプリンタ

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