JPS60134580A - Character multiplex receiver - Google Patents

Abstract

PURPOSE:To reproduce completely a character multiplex signal by detecting a clock line signal and converting the signal into a DC voltage while taking the duty ratio of this signal is taken as 0.5, superposing this signal on an AFT signal so as to control the local oscillation frequency. CONSTITUTION:An extraction signal generating circuit 6 forms an extracting pulse of a clock run-in signal by using a character multiplex signal from a video IF amplifier/detecting section. An extraction circuit 7 extracts a pattern signal of ''1010101010101010'' of the clock run-in signal in the character multiplex signal by using the extracted pulse. The signal extracted by the circuit 7 is detected by a comparison detection circuit 9 so that the duty is 0.5, its output is converted into a DC signal through a sample and hold circuit 8, superposed on the AFT signal, fed to a channel selection circuit so as to change the local oscillation frequency. Thus, the character multiplex signal is reproduced completely.

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Description of the field to which the invention pertains The present invention relates to a TV receiver that receives a character multiplex signal that is time-division multiplexed during the vertical blanking period of a TV video signal.

(2) Detailed Description of the Invention Conventionally, a circuit for receiving a character multiplex signal multiplexed during the vertical blanking period of a TV video signal has been separated into a single station selection and video IF amplification/detection section and a character signal processing circuit. Ta. Therefore, no matter how well the character signal processing unit attempts to reproduce the digital code string, which is a character signal, if the tuning is out of tune, the character signal cannot be reproduced.

(3) Purpose of the Invention In order to eliminate such drawbacks, the purpose of the present invention is to provide a television receiver for teletext broadcasting that automatically corrects tuning detuning and always reproduces character signals correctly. grow old

(4) Structure of the Invention According to the present invention, there is provided a tuning circuit that receives a transmission signal, a detection section that detects the tuned signal, a character signal processing circuit that extracts a character information signal from the detected signal, and a character signal processing circuit that extracts a character information signal from the detected signal. A smoothing circuit converts the pulse signal with character information in the processing circuit into a direct current, and a fine adjustment circuit which returns the output of the smoothing circuit to the tuning circuit and increases the pulse signal with character information in the tuned signal. A character multiplex image receiving device is obtained.

Next, the present invention will be explained in more detail with reference to the drawings.

(5) Description of conventional technology FIG. 1 is a general block diagram of a character multiplex receiver.

The signal received by the antenna 10 is tuned by the tuning circuit 1, intermediate frequency amplified and detected by the video IP amplification/detection section 2, and then sent to the character signal processing circuit 3 and the chroma video circuit 4. A part of the output of the IP amplification/detection section 2 is used to adjust the tuning of the tuning circuit 1 through the automatic fine tuning circuit 5.

That is, the video detection output of the video IP amplification and detection unit 2 is fed back to the tuning circuit 1 by an automatic fine tuning circuit (hereinafter abbreviated as AFT) 5 so that the optimum reception signal flK is automatically obtained. On the other hand, the character signal processing circuit 3 extracts the character code from this video detection output, and synchronizes the phase with the clock signal of 5.73 MHz, which is the clock signal of the character multiplexed signal, using the first 16-bit clock run-in signal.・Create a 280-bit capture timing pulse that follows the 280-bit character code, and use this timing pulse to extract the subsequent character code.

However, at this time, unless the eye opening of the video detection is sufficiently open and the reception is completely consistent, the 296-bit signal cannot be read correctly. This is AP
T times: When the loop through path 5 brings the reception to the optimal reception state, they do not necessarily match. Because the detection of AFT signal is the center carrier 5 7.25M
It is made of an LC circuit resonator that maximizes the frequency of Hz (in Japan), and this controls the oscillation station mantissa of the tuner in the channel selection circuit, so it is not necessarily the case that the character multiplex signal after video detection is This is because it cannot be said that the frequency missed by the tuner is obtained in a manner that is optimally obtained.

(6) Description of an embodiment of the invention FIG. 2 shows an embodiment of the present invention, in which a clock run-in signal is received inside the conventional character signal processing circuit 3' and outside the conventional character signal processing circuit 3. The clock fin signal obtained here is converted into DC,
This direct current signal is added to the output of the AFT circuit 5 and the resultant signal is returned to the channel selection circuit 1.

The part related to the present invention of the character processing circuit 3' is extracted from FIG. 3, and this timing is shown in FIG.
In the figure, following this, the sampling signal generation circuit 6 generates a clock run-in signal of "1010101010" for 16 pits in the character multiplex signal.
A pattern signal of 101010'' is extracted through extraction port path 7.

The output extracted by the extraction circuit 7 is shown in the figure. The extracted output passed through the comparison detection circuit 9 which detects whether the duty of the output is half is superimposed on the Ali"i" signal through the sample hold circuit 8, and the local oscillation frequency of the tuning circuit 10 is changed.

The character multiplex signal is now being correctly received and transmitted, and the duty is now halved. However, if channel selection is not performed correctly and the APT pull-in center frequency is different from the optimum state of this signal, this clock run-in signal will not be reproduced correctly and this duty will not be 50 channels. Therefore, by passing this signal through the comparison detection circuit 9 so that it becomes a factor of 50, a signal indicating which K is shifted can be extracted from the output of the comparison detection circuit 9. The sample and hold circuit 8 converts this signal into a DC signal by passing it through a circuit that holds it for the next sampling period, and by combining this signal with the AFT signal, the υ character multiplex signal is completely reproduced. It is possible to construct a loop.

As explained above, by using the present invention, it is possible to solve the conventional problem of character multiplexed signals not being completely reproduced due to imperfection in the channel selection state. It is an object of the present invention to provide a character multiplex receiver capable of optimally receiving a character multiplex signal.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a conventional character multiplex image receiving device;
3 is a block diagram of a character multiplex image receiving device according to an embodiment of the present invention, FIG. 3 is a circuit block diagram of a portion related to the present invention in the character signal processing circuit of FIG. 2, and FIG. 4 is a block diagram of a character signal processing circuit of FIG. It is an explanatory diagram of the timing. 1...Tuition selection circuit, 2...Video IP amplification and detection section, 3.3'...Character signal processing circuit, 4
...Chroma video circuit, 5 ... Automatic fine tuning circuit, 6 ... Clock run-in signal sampling signal generation circuit, 7 ... Clock run-in signal sampling Circuit, 8... Sample hold circuit, 9...
... Comparison detection circuit, 10 ... Antenna.

Claims (1)

[Claims] It has a circuit that detects the clock run-in signal of the character multiplex signal, detects the high-low ratio of the logical waveform of this output, and converts it to a DC voltage, and changes the local oscillation frequency of υ tune according to this signal. Character multiplex receiver.