JPS60128877A - Rotation controller of motor - Google Patents

Abstract

PURPOSE:To always shift a motor stably to a phase control operation by accurately controlling the motor by reliably detecting the longest period information even in any signal pattern. CONSTITUTION:When a clock extractor 6 is in the state for disabling to extract like the rising rotation time of a motor, a switch 9 is shifted by an operation state discrimination signal (s) to a side to form a speed control loop, the motor 2 is roughly controlled to approach the rotating speed to the normal speed. As a result, when the extractor 6 starts extracting, the switch 9 is shifted to a b side by the signal (s) to switch a control system to a phase control system, with the result that the motor 2 is controlled to be rotated synchronously with the external phase reference frequency fs.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a motor rotation control device that can be used mainly in compact disc players, video disc players, and the like.

Conventional configuration and its problems Normally, in a compact disc player, etc., the rotational phase information of the motor recorded in the D3 page file is compared with a rotational reference phase signal to obtain a rotational error signal and perform phase control. In order to detect the rotational phase information recorded on the disk, it is first necessary to keep the rotational speed of the motor within a predetermined range. However, the range of rotational speeds in which the rotational phase information of the disk can usually be detected is relatively narrow, at most 10% of the normal rotational speed. That is, it is necessary to control the rotational speed of the disk by another means until the rotational speed reaches a rotational speed at which rotational phase information can be detected. Normally, the number of polarity inversions of the signal recorded on the disk is detected, converted to voltage, and used as speed information to roughly control the rotation speed. In the EFM system, which is a signal system for %
There are also cases where the number of polarity reversals is reduced. In the case of such conventional methods, there is a problem that the rotation speed during coarse control deviates by a wide range and does not reach a rotation speed at which rotational phase information can be detected at any time, so that regular information cannot be detected. there were.

OBJECTS OF THE INVENTION An object of the present invention is to improve the rotation accuracy during the rough control described above, and to have the excellent feature of stably transitioning to the final phase control operation.

Composition of the Invention The motor rotation control device of the present invention includes a motor that fully drives a disk on which information is recorded on parallel lines, a pickup means for detecting information recorded on the disk, and a polarity reversal of a detection signal of the pickup means. constant-width pulse generation means for generating constant-width pulses using information as a trigger; clock extraction means for extracting all motor rotation synchronized clock signals included in the detection signal of the pickup means; and an output signal of the clock extraction means. a phase comparison means for generating a phase comparison error by comparing the phase with a rotation reference clock signal of the motor; and converting the output signal of the constant width pulse generation means or the phase comparison means into a voltage or current to supply power to the motor. When the clock extracting means does not extract a correct clock signal, a speed control loop consisting of the motor 1 pickup means, constant width pulse generation means, and motor drive means is activated. and when the clock extraction means extracts all correct clocks, the motor rotation control device constitutes a phase control loop consisting of the motor, pickup means, clock extraction means, phase comparison means, and motor drive means. , the output pulse width of the constant width pulse generating means is set to a range between the longest periodic signal and the second longest periodic signal among the signals recorded on the disk; It has the excellent feature of increasing rotational accuracy during rough control and quickly transitioning to the final phase control operation.

DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention, in which 2 is a motor that drives the disk 1, 3 is a pickup that detects digital information from page 1 of the disk 6, and outputs digital pulses; 4 is the pickup 3; A constant width pulse generation circuit is triggered by both the rising edge (9) and the falling edge of the output signal, and is composed of a retriggerable one-shot multivibrator, etc., and 6 smoothes the output of the constant width pulse generation circuit 4. It is a low pass filter. 6 is a clock extraction circuit for extracting the clock pulse for the rotation period included in the output signal of the pickup 3;
It consists of LL circuit etc. Further, the clock extraction circuit 6 operates to output an operation state determination signal s2 indicating two states: whether or not the clock extraction operation is being performed. 7
is a phase comparison circuit which compares the phase of the extracted clock frequency of the clock extraction circuit and the reference frequency fs to generate a phase error. A motor drive circuit 8 selects and amplifies the output signal of the low-pass filter 6 or the phase comparator circuit 7 using a loop changeover switch 9, and supplies power to the motor 2.

In Figure 1, as when the motor starts rotating, etc.
When the clock extraction circuit 6 executes the extraction operation and is in a state where the clock cannot be detected, the switch 9 outputs the operating state determination signal S.
is controlled by the controller and connected to the a side, as a result, disk 1
, the pickup 3, the constant width pulse generation circuit 4, the low-pass filter 6, the motor drive circuit 8, and the motor 2 constitute a speed control loop, and the motor 2 is roughly controlled to try to bring the rotational speed close to the normal rotational speed. As a result of this speed control operation, the motor 2 approaches the normal rotation speed, and as a result, the clock extraction circuit 6 starts the extraction operation, the switch 9 is switched to the b side by the operation state determination signal S, and the control system is activated to control the disk 1, pickup 3, etc. , the clock extraction circuit 6, the phase comparison circuit 7, the motor drive circuit 8, and the motor 2. As a result, the rotation of the motor 2 is controlled in synchronization with the external phase reference frequency fs.

In the EFM signal recorded on a compact disc, its longest period component (H” level or II L L
The width of the continuous rubel is 11τ (τkiQ, 232
μs) width. Furthermore, according to the compact disc signal format, it is defined that this longest cycle information is always recorded as a synchronization signal with a cycle of 135 μs.

Figure 2 is a time chart showing the output state of the speed error when the rotational speed of the motor 2 is variously changed when the one-shot pulse of the constant width pulse generation circuit 4 is set to a medium tone of 11τ. In (1), the rotation is very slow. (2) indicates that the rotation speed is slightly lower than the normal rotation speed, and (3) indicates that the rotation speed has reached the normal rotation speed.

11T in FIG. 2 means a pulse width having a period of 11τ width when the disk 1 is rotating normally. When the rotation is very slow as shown in Fig. 2 (1), the pulse interval becomes very wide and the constant width pulse generation circuit 4 produces
The average voltage E1 is output from the low-pass filter 5 as an error signal to the motor 2. Figure 2 (
2) The motor 2 is accelerated by the error voltage E1,
This is a state in which the rotational speed of the motor 2 reaches approximately 90% of the normal speed, and an error signal is generated only at the 11T pulse. At this time, the error voltage of 1 becomes small as R2, and as shown in Fig. 2 (3), when the period of the 11T pulse matches 11τ and 19p, the error voltage becomes Eo:O and an acceleration command is issued to motor 2. will disappear. Actually, the clock extraction circuit 6 starts the clock extraction operation and switches to the phase control loop before the transition from the state (2) to the state (3) above, so the normal pull-in operation is performed in this phase control loop. .

Figure 3 (a) is a diagram showing the relationship between the rotation speed of motor 2 and the speed error detection gain, where No is the normal rotation speed and N1 is about 10
The rotation speed is about % low. The reason why a certain range of part M in the figure is shown is that the combinations of short-cycle pulse groups other than the synchronization signal pattern (11T period) recorded every 136 μs in the EFM signal change variously, from N1 to No.
The reason why the distance between the two is almost a straight line is because the one-shot multivibrator constituting the constant width pulse generation circuit 4 has a retriggerable configuration, so the constant width pulse generation circuit 4 outputs a pulse only in response to a pulse edge with a period of 11T. .

FIG. 3(b) similarly shows the relationship between the rotational speed and the speed error voltage level.

10 Be-1 Figure 4 shows a specific configuration example of the constant width pulse generation circuit 4.
is an N-ary counter, and the input clock count is 0KfN.
When counting, it operates so that the Q output becomes ゝ°H'' level. 11 is an edge detection circuit which detects the edge 1ltH'' level of the input EFM signal and triggers the R87 lip 70 and the RS flip-flop 12. The input of is connected to the Q output of H-ary counter 1o, and the output RO is N
Connected to the reset input OL of the forward counter. Fig. 6 is a time chart for explaining the operation of the constant width pulse generation circuit shown in Fig. 4, and shows the error output pulse Px when the period of the clock GK and the width of one pulse of the EFM input are Ti(Ti)Nt). Indicates a situation in which this occurs. By selecting the values of N and t so that Nt=11τ, the constant width pulse generating circuit 4fc described in FIG. 1 can be constructed.

In the example described above, the output pulse width of the constant width pulse generation circuit 4 is the longest period component (“H” level or I
The width was made to match the width of the time period during which the I L level continues, but
A similar operation can also be achieved by setting this value to an intermediate value between the 11 Be-2 value of the next longest periodic component and the width of the longest periodic component. FIG. 6 is a diagram showing the relationship between the rotational speed and the speed error voltage at that time, and in the case of FIG. 3, only the position of the regular synchronous pull-in rotational speed No. changes.

At this time, when the output pulse width of the constant width pulse generation circuit 4 is set to a value shorter than this, that is, to a value shorter than the value of the second longest period component, the operating point moves to the position N2, and the speed error The voltage does not output an output completely proportional to the rotation speed, but rather outputs an output proportional to the number of edges of the EFM signal 9, the number of average edge information decreases, and when reproducing all non-signal patterns, it becomes inaccurate. The error output will be output.

Effects of the Invention As described above, the motor rotation control device of the present invention detects the number of times the polarity of the pickup detection signal is reversed, converts it into voltage, and uses it as speed information to control rotation. Unlike the coarse control method, this method has the excellent feature that it can reliably detect the longest cycle information in any signal pattern and accurately control the motor, so it can always shift to phase control operation stably.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing one embodiment of the present invention, Fig. 2 is a time chart showing the operation of the constant width pulse generation circuit used in the present invention, and Figs. 3 (a) and (b) are motor rotational speeds. Figures 4 and 6 are diagrams showing the relationship between speed error detection gain and speed error voltage, Figures 4 and 6 are time charts showing a specific configuration example of a constant width pulse generation circuit and its operation, and Figure 6 is a diagram showing the motor rotation speed and speed. FIG. 3 is a diagram showing the relationship between error voltages. 1...disc, 2...motor, 3.
A: Pickup, 4: Constant width pulse generation circuit, 6: Low pass filter, 6:...
Clock extraction circuit, 7...Group phase comparison circuit, 8...
...Motor drive circuit, 9...Switch.

Claims (1)

[Scope of Claims] 0) A motor for driving a disk on which information is recorded on a line, a pickup means for detecting the information recorded on the disk, and a fixed width as a trigger for polarity inversion information of a detection signal of the pickup means. constant-width pulse generation means for generating pulses; clock extraction means for extracting a motor rotation synchronized clock signal included in the detection signal of the pickup means; and an output signal of the clock extraction means and a motor rotation reference. A phase comparison means that compares the phase with a clock signal to generate a phase comparison error, and a motor that converts the output signal of the constant width pulse generation means or the phase comparison means into a voltage or current and supplies power to the motor. and when the clock extracting means does not extract the correct clock signal, the motor, the pickup means,
A speed control loop consisting of a constant width pulse generation means, a motor drive means, and a page driving means, in which the clock extraction means extracts the correct clock, consists of the motor, the pickup means, the clock extraction means, the phase comparison means, and the motor. A rotation control device for a motor constituting a phase control loop consisting of a driving means, in which the output pulse width of the constant width pulse generating means □ is the longest cycle signal and the second longest among the signals recorded on the disk. A motor rotation control device characterized in that ξ is set within a period range of a periodic signal. (2) An overnight rotation control device according to claim 0, characterized in that the constant width pulse generating means is constructed using a digital counter.