JPS60124975A - Thin film transistor - Google Patents
Thin film transistorInfo
- Publication number
- JPS60124975A JPS60124975A JP23472883A JP23472883A JPS60124975A JP S60124975 A JPS60124975 A JP S60124975A JP 23472883 A JP23472883 A JP 23472883A JP 23472883 A JP23472883 A JP 23472883A JP S60124975 A JPS60124975 A JP S60124975A
- Authority
- JP
- Japan
- Prior art keywords
- film
- light
- thin film
- electrode
- shielding film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000010409 thin film Substances 0.000 title claims description 18
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 21
- 239000004065 semiconductor Substances 0.000 claims abstract description 16
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims abstract description 10
- 239000000758 substrate Substances 0.000 claims abstract description 9
- 239000010408 film Substances 0.000 claims description 60
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 1
- 229910052710 silicon Inorganic materials 0.000 claims 1
- 239000010703 silicon Substances 0.000 claims 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 13
- 229910052782 aluminium Inorganic materials 0.000 abstract description 7
- 229910052804 chromium Inorganic materials 0.000 abstract description 7
- 239000011521 glass Substances 0.000 abstract description 7
- 229910052751 metal Inorganic materials 0.000 abstract description 7
- 239000002184 metal Substances 0.000 abstract description 7
- 238000000034 method Methods 0.000 abstract description 7
- 235000012239 silicon dioxide Nutrition 0.000 abstract description 7
- 239000000377 silicon dioxide Substances 0.000 abstract description 6
- 238000009413 insulation Methods 0.000 abstract description 4
- 229910052681 coesite Inorganic materials 0.000 abstract 2
- 229910052906 cristobalite Inorganic materials 0.000 abstract 2
- 229910052682 stishovite Inorganic materials 0.000 abstract 2
- 229910052905 tridymite Inorganic materials 0.000 abstract 2
- 230000006866 deterioration Effects 0.000 abstract 1
- 238000010521 absorption reaction Methods 0.000 description 6
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 5
- 239000011651 chromium Substances 0.000 description 5
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- 230000003287 optical effect Effects 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 230000000903 blocking effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 241000860832 Yoda Species 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 239000012788 optical film Substances 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 238000001228 spectrum Methods 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Thin Film Transistor (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、形成が容易な遮光膜をMし、外部光が入射し
ても特性の変化しない絶縁ゲート電界効果畿薄膜トラン
ジスlに関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an insulated gate field-effect thin film transistor that includes a light-shielding film that is easy to form and whose characteristics do not change even when external light is incident.
近年、ガラスなどの絶縁性基板上に形成できる薄膜トラ
ンジスタの開発が各所で盛んである。絶縁性基板上に、
薄膜トランジスタからなるスイッチ素子をアレイ状に設
けたマトリクス液晶表示装置は、TV画像などの表示全
可能にする。薄膜トランジスタに用いる半導体膜として
は、プラズマOYD法によって、ガラスなどの基板上に
大面積かつ安価に形成できる水素化非晶質シリコンが有
望とされている。しかし、水素化非晶質シリコンは、大
きな光導電性を有するので、表示装置への応用の場合、
必ず遮光を行なって使用しなければならない。In recent years, development of thin film transistors that can be formed on insulating substrates such as glass has been active in various places. on an insulating substrate,
A matrix liquid crystal display device in which switch elements made of thin film transistors are arranged in an array is capable of displaying TV images and the like. Hydrogenated amorphous silicon, which can be formed over a large area and at low cost on a substrate such as glass by the plasma OYD method, is considered to be a promising semiconductor film for use in thin film transistors. However, hydrogenated amorphous silicon has high photoconductivity, so for display applications,
Must be used while shielding from light.
第1図に、従来の遮光をした薄膜トランジスタの断面構
造図金示す。第1図で、1はガラス、石英などよりなる
絶縁性基板、2はゲート電極で、アルミニウム、クロム
などの金属よりなる。3はゲート絶縁膜で、二酸化シリ
コン、窒化シリコンなどよりなる。4は水素化非晶質シ
リコノなど力・らなる半導体膜、5及び6は、それぞ扛
ンース及びト°レイン′電極で、アルミニウム、クロム
などの金属よりなる。7及び8は絶縁膜で、二酸化シリ
コン、窒化シリコンなどよシなる。9′に膓光膜で、ア
ルミニウム、クロムなどの金属よりなり。第1図で示し
た薄膜トランジスタは、ゲート電極2に加えゐ′底圧(
(よシ、ソース電極5とト”レイン電極6の間の、半導
体膜4と、ゲート絶縁膜3の界面にチャネル全形成し、
絶縁ゲート電界効果型トランジスタの動作音すゐ。また
、第1図の薄膜トランジスタのチャ2−ル酋6は、邂ツ
仁膜91Cより上からの入射光を、′またゲート電極2
により下刃・らの入射光を遮らn6ので、ソース、ドレ
インM5:& 5 。FIG. 1 shows a cross-sectional structure diagram of a conventional light-shielded thin film transistor. In FIG. 1, 1 is an insulating substrate made of glass, quartz, etc., and 2 is a gate electrode, which is made of metal such as aluminum or chromium. 3 is a gate insulating film made of silicon dioxide, silicon nitride, or the like. 4 is a semiconductor film made of hydrogenated amorphous silicon or the like, and 5 and 6 are source and train electrodes, respectively, made of metal such as aluminum or chromium. 7 and 8 are insulating films made of silicon dioxide, silicon nitride, or the like. 9' is a reflective film made of metal such as aluminum or chromium. The thin film transistor shown in FIG.
(The entire channel is formed at the interface between the semiconductor film 4 and the gate insulating film 3 between the source electrode 5 and the drain electrode 6,
The operating noise of an insulated gate field effect transistor. Further, the channel electrode 6 of the thin film transistor shown in FIG.
The source and drain M5:&5 block the incident light from the lower blade and n6.
6間に光亀流が流れず、明るい場所で、パッケージなし
でも正常なトランジスタ動作kfゐ。The transistor operates normally even without a package in a bright place with no optical current flowing between the two.
し〃)シ、第1図の薄膜トランジスタは、す、下に示す
欠点ケ有する。(b) The thin film transistor shown in FIG. 1 has the following drawbacks.
1 s光膜9と絶縁膜8を形成すめフォトプロセスが、
通常のN膜トランジスタより2回多くなる。1 s After forming the optical film 9 and the insulating film 8, a photo process is performed.
This is two times more than a normal N-film transistor.
2 遮光膜9と、半導体膜4の容量結合のため、トラン
ジスタの動作速度が小さくなる。2. Due to the capacitive coupling between the light shielding film 9 and the semiconductor film 4, the operating speed of the transistor is reduced.
6、 遮光膜9と、ソース・ドレイン電極5.6ととの
ショートによる製造歩留りの低下を招く。6. A short circuit between the light shielding film 9 and the source/drain electrodes 5.6 causes a decrease in manufacturing yield.
本発明の目的に、上記のごとき従来の欠点を除き、容易
なプロセスで形成でき、遮光膜によって電気特性の劣化
しない薄膜トランジスタを提供することにある。SUMMARY OF THE INVENTION An object of the present invention is to provide a thin film transistor which can be formed by an easy process and whose electrical characteristics are not deteriorated by a light-shielding film, while eliminating the above-mentioned conventional drawbacks.
以下実施例に基づいて、図面によυ本発明全説明する。The present invention will be fully explained below based on embodiments and with reference to the drawings.
第2図は、本発明の遮光をした薄膜トランジスタの断面
構造を示す図である。10は、ガラス等よりなる絶縁性
基板、11はゲート電極で、アルミニウム、クロム等の
金属よりなる。12はゲート絶縁膜で、二酸化シリコン
、窒化シリコン等よ#)なる。13は水素化非晶質シリ
コン等よシなる半導体膜である。14及び15は、それ
ぞtLソース及びドレイン電極で、アルミニウム、クロ
ム等の金属よりなる。16は錦町含む非晶質シリコンよ
りlる遮光膜、17は絶縁膜で、二酸化シリコン、窒化
シリコン等よシなる。トランジスタとしての動作は、第
1図で説明した従来の薄膜トランジスタと同様である。FIG. 2 is a diagram showing a cross-sectional structure of a light-shielded thin film transistor of the present invention. 10 is an insulating substrate made of glass or the like, and 11 is a gate electrode made of metal such as aluminum or chromium. 12 is a gate insulating film made of silicon dioxide, silicon nitride, etc. 13 is a semiconductor film such as hydrogenated amorphous silicon. 14 and 15 are tL source and drain electrodes, respectively, and are made of metal such as aluminum or chromium. 16 is a light-shielding film made of amorphous silicon including Nishikicho, and 17 is an insulating film made of silicon dioxide, silicon nitride, or the like. The operation as a transistor is similar to the conventional thin film transistor explained in FIG.
遮光膜16はSn (0H3)4とンンン・リノラ、ズ
マUVD法によめグロー放電分解によって形IJZされ
る。連光膜16の拐料となる、錫を含む非晶質シリコン
は、第311+−ζ示すような光伝導特性ケボヂ。第6
図で縦軸は暗導電率および元導既率を表わし、横軸はg
n(CH3)4の、全ガス流社中pこH!IJi・)/
)利含金表わ−jo第6図刀為し、SH(c町)4が全
ガス流tk中の豹1饅を占めろとき、光導電率が10
Ω atr と、jQi常の非晶質シリコンのIj莫ど
比べ、10−51蛭1“まと小さ’v)値をボす。The light-shielding film 16 is formed by glow discharge decomposition using Sn (0H3)4 and Nnn-Rinola-Zuma UVD method. The tin-containing amorphous silicon, which is the material for the light-transmitting film 16, has photoconductive properties as shown in 311+-ζ. 6th
In the figure, the vertical axis represents dark conductivity and original conductivity, and the horizontal axis represents g.
p of n(CH3)4 in the entire gas flow! IJi・)/
) Interest and interest table - jo Figure 6 When SH (c town) 4 occupies 1 cup of the total gas flow tk, the photoconductivity is 10
Compared to Ω atr and Ij of ordinary amorphous silicon, the value of Ω atr is much smaller than 10-51.
また錫全73む非晶質シリコンの光学吸収係数は、第4
図G′ご7.’1e−1−通りである。第41g1で、
イ芦軸は光子エネルギー、縦軸は、その吸収係数である
。実線の1.2.54′J、それぞれ非晶質シリコン対
錫の比が0.88:0.12,0.92:0.08,1
:Oである場合に対応している。第4図の、どのスペ
クトルに対しても、錫を含む非晶質シリコンは、単なる
非晶質シリコ/に比べ、大きな吸収係数を示す。Also, the optical absorption coefficient of amorphous silicon containing all 73 tin is the fourth
Figure G'7. '1e-1- way. In the 41st g1,
The axis shows the photon energy, and the vertical axis shows its absorption coefficient. Solid line 1.2.54'J, the ratio of amorphous silicon to tin is 0.88:0.12, 0.92:0.08, 1, respectively.
:O corresponds to the case. For every spectrum in FIG. 4, amorphous silicon containing tin exhibits a larger absorption coefficient than simple amorphous silicon.
第3図及び第4図から錫を含む非晶質シリコンは、光照
射下でも1(+10Ωmの大きな′電気抵抗を有し、非
晶質シリコンが光音吸収する領域で 6×104〜4X
10’tTn’ と、大きな光学吸収係数全示す。これ
により厚さ1oooX〜2μmの錫を含む非晶質シリコ
ンは、市内方向に対しては実質的に絶縁膜で、かつ厚さ
方向に対しては遮光膜として働く(光導電率10−9Ω
−’crn−’、吸収係数10”cmのとき、厚さ0,
5μm、長さ10μm、幅10μ4の膜のシート抵抗は
10+Ωm、光透過率は5x10−5)。From Figures 3 and 4, amorphous silicon containing tin has a large electrical resistance of 1 (+10 Ωm) even under light irradiation, and in the region where amorphous silicon absorbs optical sound, it has a resistance of 6 × 104 to 4 ×
10'tTn', indicating a large optical absorption coefficient. As a result, the amorphous silicon containing tin with a thickness of 100X to 2 μm acts as an insulating film in the inner direction and as a light shielding film in the thickness direction (photoconductivity 10-9Ω
-'crn-', when the absorption coefficient is 10"cm, the thickness is 0,
The sheet resistance of a film of 5 μm, length 10 μm, and width 10 μ4 is 10+Ωm, and the light transmittance is 5×10−5).
この様にして錫を含む非晶質シリコンは薄膜トランジス
タの遮光膜として充分な特性を有する。In this way, amorphous silicon containing tin has sufficient characteristics as a light shielding film for thin film transistors.
また第2図でゲート絶縁膜12、半導体膜16、遮光膜
16、絶縁膜17の各膜は、いずれもプラズマOVD法
あるいはスパック法などで形成できることが知られてい
るので、同一の装置内で連続形成がfiJ能である。1
だ連光膜のパターンは絶縁膜と同一で良いので遮光膜形
成のための余分なフォトプロセスを必要としない。更に
、第2図のごとく、遮光膜16上に絶縁E@17全形成
すると、遮光膜16の膜厚方向に対する絶縁性も充分な
ものとなる。Furthermore, it is known that the gate insulating film 12, semiconductor film 16, light shielding film 16, and insulating film 17 in FIG. Continuous formation is fiJ ability. 1
Since the pattern of the light blocking film can be the same as that of the insulating film, no extra photo process is required for forming the light blocking film. Furthermore, as shown in FIG. 2, when the insulation E@17 is entirely formed on the light shielding film 16, the insulation in the thickness direction of the light shielding film 16 becomes sufficient.
以上に記した本発明の、遮光膜を有する薄膜トランジス
タは、
1、遮光膜’k nするトランジスタの形成プロセスが
容易である。The thin film transistor having a light shielding film according to the present invention described above has the following features: 1. The process of forming the transistor including the light shielding film is easy.
2 遮光11Mは絶縁性なのでトランジスタの浮遊容1
遣が1曽えない。2 Since the light shielding 11M is insulating, the stray capacitance of the transistor 1
I don't have a lot of money.
64光膜は絶縁性なので、遮光膜ショートによ、6トラ
ンジスメ不良が起きない。Since the 64-light film is insulating, 6-transistor failures do not occur due to short-circuiting of the light-shielding film.
などの特徴ケ有して、光照射のもとて使用できる。It has the following characteristics and can be used under light irradiation.
以上の説明は半導体膜としては非晶質シリコンとしたか
、鱈光膜よp大きなバンドギャップを持った半導体膜を
有する薄膜トランジスタにも、本発明が適用できること
は明ら刀・である。From the above explanation, it is clear that the present invention can be applied to thin film transistors having a semiconductor film of amorphous silicon or a semiconductor film having a band gap larger than that of a cod film.
第1図は、従来の遮光膜を有する薄膜・トランジスタの
断面図、第2図は本発明の遮光膜全有する薄膜トランジ
スタの断面図である。第6図は暗導゛曲率と光導′曲率
との関係を示′1−図、第4図は冗学吸収係数を示す図
である。
1・・・ガラス基板、2・・・ゲート電極、ゲート、絶
縁膜、4−・・半導体膜、5・・・ソース電極、6・・
・ドレイン電極、7.8・・・絶縁膜、9・・・遮光膜
、10・・・ガラス基板、11・・・ゲート電極、12
・・・ゲート絶縁膜、15・・・半導体膜、14・・・
ソース電極、15・・・ドレイン電極、16・・・遮光
膜、17・・・絶縁膜以上
出願人 工業技術院長用田裕部
出願人 セイコー電子工業株式会社
指定代理人工業技術院電子技術総合研究所長等々力 達
代理人 弁理士 最 上 務
第2図
// II /l
第3図
Sn (CHs、)4/(5rHa+3n(CHs〕a
)(>≦)元士工不ル至−(eV)FIG. 1 is a cross-sectional view of a thin film transistor having a conventional light-shielding film, and FIG. 2 is a cross-sectional view of a thin-film transistor completely having a light-shielding film according to the present invention. FIG. 6 shows the relationship between the dark guide curvature and the light guide curvature, and FIG. 4 shows the redundancy absorption coefficient. DESCRIPTION OF SYMBOLS 1... Glass substrate, 2... Gate electrode, gate, insulating film, 4-... Semiconductor film, 5... Source electrode, 6...
- Drain electrode, 7.8... Insulating film, 9... Light shielding film, 10... Glass substrate, 11... Gate electrode, 12
...Gate insulating film, 15...Semiconductor film, 14...
Source electrode, 15...Drain electrode, 16...Light shielding film, 17...Insulating film Applicant: Hirobu Yoda, Director of the Agency of Industrial Science and Technology Applicant: Seiko Electronics Co., Ltd. Designated Representative Director, Institute of Electronics Technology, Agency of Industrial Science and Technology Todoroki Agent Patent Attorney Mogami Figure 2 // II /l Figure 3 Sn (CHs,)4/(5rHa+3n(CHs)a
) (>≦) Former Master Engineer Fuji - (eV)
Claims (2)
をおおうように設けたゲート絶縁膜と、ゲート絶縁膜上
に設けたシリコンを含む非晶質半導体膜と、非晶質半導
体膜上に設けた少なくとも一層の錫を含む非晶質シリコ
ンよりなる遮光膜と、遮光膜上たら非晶質半導体膜上に
かけて間隔をおいて設けられたソース電極とドレイン電
極とから成るトランジスタ。(1) A gate electrode provided on an insulating substrate, a gate insulating film provided to cover the gate electrode, an amorphous semiconductor film containing silicon provided on the gate insulating film, and an amorphous semiconductor film provided on the amorphous semiconductor film. A transistor comprising: a light-shielding film made of amorphous silicon containing at least one layer of tin; and a source electrode and a drain electrode spaced apart from each other over the light-shielding film and over the amorphous semiconductor film.
とを特徴とする特許請求の範囲第1項記載の薄膜トラン
ジスタ。(2) The thin film transistor according to claim 1, further comprising at least one insulating film on the light shielding film.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23472883A JPS60124975A (en) | 1983-12-12 | 1983-12-12 | Thin film transistor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23472883A JPS60124975A (en) | 1983-12-12 | 1983-12-12 | Thin film transistor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60124975A true JPS60124975A (en) | 1985-07-04 |
Family
ID=16975434
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP23472883A Pending JPS60124975A (en) | 1983-12-12 | 1983-12-12 | Thin film transistor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60124975A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007000497A (en) * | 2005-06-27 | 2007-01-11 | Daiichi Shokai Co Ltd | Game machine |
JP2007000500A (en) * | 2005-06-27 | 2007-01-11 | Daiichi Shokai Co Ltd | Game machine |
CN107017242A (en) * | 2015-11-18 | 2017-08-04 | 英飞凌科技股份有限公司 | For the semiconductor devices and its module integrated with luminescence chip |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5890783A (en) * | 1981-11-25 | 1983-05-30 | Mitsubishi Electric Corp | Semiconductor device |
-
1983
- 1983-12-12 JP JP23472883A patent/JPS60124975A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5890783A (en) * | 1981-11-25 | 1983-05-30 | Mitsubishi Electric Corp | Semiconductor device |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007000497A (en) * | 2005-06-27 | 2007-01-11 | Daiichi Shokai Co Ltd | Game machine |
JP2007000500A (en) * | 2005-06-27 | 2007-01-11 | Daiichi Shokai Co Ltd | Game machine |
CN107017242A (en) * | 2015-11-18 | 2017-08-04 | 英飞凌科技股份有限公司 | For the semiconductor devices and its module integrated with luminescence chip |
CN107017242B (en) * | 2015-11-18 | 2019-07-12 | 英飞凌科技股份有限公司 | Semiconductor devices and its module for being integrated with luminescence chip |
US10607972B2 (en) | 2015-11-18 | 2020-03-31 | Infineon Technologies Ag | Semiconductor devices for integration with light emitting chips and modules thereof |
DE102016122141B4 (en) | 2015-11-18 | 2022-01-20 | Infineon Technologies Ag | Semiconductor devices for integration with light-emitting chips and method of forming the same |
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