JPS60182773A - Thin film transistor - Google Patents
Thin film transistorInfo
- Publication number
- JPS60182773A JPS60182773A JP3813084A JP3813084A JPS60182773A JP S60182773 A JPS60182773 A JP S60182773A JP 3813084 A JP3813084 A JP 3813084A JP 3813084 A JP3813084 A JP 3813084A JP S60182773 A JPS60182773 A JP S60182773A
- Authority
- JP
- Japan
- Prior art keywords
- film
- amorphous
- light shielding
- light
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000010409 thin film Substances 0.000 title claims abstract description 27
- 239000010408 film Substances 0.000 claims abstract description 73
- 239000000758 substrate Substances 0.000 claims abstract description 14
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 18
- 229910052732 germanium Inorganic materials 0.000 claims description 17
- 239000004065 semiconductor Substances 0.000 claims description 7
- 229910052710 silicon Inorganic materials 0.000 claims description 5
- 239000010703 silicon Substances 0.000 claims description 5
- 230000005669 field effect Effects 0.000 claims description 2
- 231100000241 scar Toxicity 0.000 claims 1
- 229910021417 amorphous silicon Inorganic materials 0.000 abstract description 33
- 238000000034 method Methods 0.000 abstract description 12
- 239000011521 glass Substances 0.000 abstract description 7
- 238000009413 insulation Methods 0.000 abstract description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 10
- 238000010586 diagram Methods 0.000 description 7
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 5
- 229910052782 aluminium Inorganic materials 0.000 description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 5
- 229910052804 chromium Inorganic materials 0.000 description 5
- 239000011651 chromium Substances 0.000 description 5
- 239000007769 metal material Substances 0.000 description 5
- 235000012239 silicon dioxide Nutrition 0.000 description 5
- 239000000377 silicon dioxide Substances 0.000 description 5
- 238000010521 absorption reaction Methods 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 230000031700 light absorption Effects 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- 229910000927 Ge alloy Inorganic materials 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 239000002689 soil Substances 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910000808 amorphous metal alloy Inorganic materials 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005401 electroluminescence Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 230000003595 spectral effect Effects 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、形、成が容易な遮光膜を有し、外部光が入射
しても、特性の変化しない薄膜トランジスタの実現に関
する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to the realization of a thin film transistor that has a light shielding film that is easy to form and produce, and whose characteristics do not change even when external light is incident.
近年、ガラスなどの絶縁性基板上に形成できる薄膜トラ
ンジスタの冊発が各所で盛んである。絶縁性基板上に、
薄膜トランジスタからなるスイッチ素子を７レイ状に設
けたマトリクス状の液晶、エレクトロルミネッセンス、
エレクトロクロミッタなどの表示装置は、ＴＶ画像など
の、高速、重積細度の表示を可能にする。薄膜トランジ
スタの活性領域に用いる半導体膜としては、プラズマＯ
ＶＤ法、ヌバツタ法などによって、ガラスなどの基板上
に、大面猜かつ安価に形成できる水素化非晶質シリコン
嘆が有望とさ２ｔている。しかし、水素化非晶質シリコ
ンは太陽電池への応用で知ら詐ているように、大きな光
導電性を有するので、表示装置などの明かるい場所で使
う応用の場合、必ず遮光を行って使用する必要がある。In recent years, publications on thin film transistors that can be formed on insulating substrates such as glass have been popular in various places. on an insulating substrate,
A matrix-like liquid crystal with 7 arrays of switching elements consisting of thin film transistors, electroluminescence,
Display devices such as electrochromitters enable high speed, superimposed detail display of TV images and the like. As a semiconductor film used in the active region of a thin film transistor, plasma O
Hydrogenated amorphous silicon, which can be formed over a large area and at low cost, on a substrate such as glass by the VD method or the Nubatsuta method is promising. However, hydrogenated amorphous silicon has high photoconductivity, as is widely known through its application to solar cells, so if it is used in a bright place such as a display device, it must be shielded from light. There is a need.
第１図に、従来の遮光をした薄膜トランジスタの断面構
造図を示す。第１図で１はガラス基板、２はアルミニウ
ム、クロム等の金属材料よりなるゲート電極、３は二酸
化シリコン、チツ化シリコン等よりなるゲート絶縁膜、
４は水素化非晶質シリコン１１吃よジなる非晶質半導体
膜、５および６はそｎぞｎアルミニウム、クロム等の金
属材料よりなるソースおよびドレイン電極、７および８
は二酸化シリコン、チッ化シリコン等よりなる箱縁７嗅
、９はアルミニウム、クロム等の金目材料よりなる遮光
膜であ８゜尚、ソース、ドレイン電極５．６と非晶質シ
リコン、暎４の界面には、トランジスタのキャリアーを
電子または正孔の一方に定める為、ｎｉｌ’ｉまたはＰ
型の非晶質シリコン層１ｏを設ける。）第１図で示した
薄、模トランジスタは、ゲート電極２に加える電圧によ
り、ソース電極５とドレイン電極６の間の、非晶質シリ
コン、嘆４とゲート絶縁膜３の界面にチャンネルを形成
し１．１′８縁ゲート電界効果型トランジスタの動作を
する。また第１図の薄膜トランジスタのチャンネル部は
遮光膜７によｐ上からの入射光を、ゲート電極２によυ
下からの入射光を遮らしるので、ソース、ドレイ／電極
５，６０間に光電流が流ｎず、明かるい場所でも正常な
トランジスタ動作をする。FIG. 1 shows a cross-sectional structural diagram of a conventional light-shielded thin film transistor. In FIG. 1, 1 is a glass substrate, 2 is a gate electrode made of a metal material such as aluminum or chromium, and 3 is a gate insulating film made of silicon dioxide, silicon dioxide, etc.
4 is an amorphous semiconductor film made of hydrogenated amorphous silicon 11; 5 and 6 are source and drain electrodes each made of a metal material such as aluminum or chromium; 7 and 8
is a box edge 7 made of silicon dioxide, silicon nitride, etc.; 9 is a light-shielding film made of metal material such as aluminum, chromium, etc.; At the interface, nil'i or P is present to determine carriers of the transistor as either electrons or holes.
A mold amorphous silicon layer 1o is provided. ) The thin, simulated transistor shown in FIG. It operates as a 1.1'8 edge gate field effect transistor. In addition, in the channel part of the thin film transistor shown in FIG.
Since incident light from below is blocked, no photocurrent flows between the source and drain/electrodes 5 and 60, allowing normal transistor operation even in bright places.
しかし、第１図の薄膜トランジスタは以下に記す欠点を
有する。However, the thin film transistor shown in FIG. 1 has the following drawbacks.
１゜遮光、膜９と絶縁、嘆８を形成するフォトブロセヌ
が通常の薄ｊＩλトラ／ジヌタと比べ２回多くなる。1° light shielding, insulation with the film 9, and photobrosene forming the groove 8 are increased by 2 times compared to the normal thin jIλ tra/jinuta.
２゜遮ブｅ７ｍ９と、非晶質シリコン、１１３４の容量
結合のため、トランジスタの動作速度が小さくなる３゜
机光、ＩＥ１９と、ソース、ドレイン電極５，６とのシ
ョートによる製造歩留りの低下を招く。Due to the capacitive coupling between the 2° shielding e7m9 and the amorphous silicon 1134, the operating speed of the transistor decreases. invite
以上に記した従来の欠点を除く為、発明者は従来、ニ１
″５２図に示すごとき薄膜トランジスタを提案してきた
。即ち、第２図は、筆者らの従来の発明による遮光をし
た薄、嘆トランジスタの実施例の断面構造を示す図であ
る。１９はガラス基板、１１はアルミニウム、クロム等
の金属材料よりなるゲート電極、［２は二酸化シリコン
、チツ化シリコン等よりなるゲート絶縁膜、１３は水素
化非晶質シリコンよりなる非晶質半導体肢、１４および
］５はそｎぞｎ１クロム、アルミニウム等の金属材料よ
りなるソースおよびドレイン電極、１６は非晶質ゲルマ
ニウム膜よシなる遮光膜、１７は絶縁膜で、二酸化シリ
コン、チツ化シリコン等よりなる。ソース、トレイン電
極１４ 、１５と非晶質シリコン膜１３の界面には、ト
ランジスタのキャリアーを電子または正孔の一方に定め
′る為、ｎ型またはＤ型の非晶質′シリコン層１８を設
ける。トランジスタとしての動作は、第１図で説すクし
た従来の薄膜トランジスタと同様である。遮光。％’３
１６はゲルマニウム系の非晶質、膜で形成さしている。In order to eliminate the conventional drawbacks described above, the inventor has
We have proposed a thin film transistor as shown in Fig. 52. That is, Fig. 2 is a diagram showing a cross-sectional structure of an embodiment of a light-shielding thin film transistor according to the authors' prior invention. 19 is a glass substrate; 11 is a gate electrode made of a metal material such as aluminum or chromium; [2 is a gate insulating film made of silicon dioxide, silicon nitride, etc.; 13 is an amorphous semiconductor limb made of hydrogenated amorphous silicon; 14 and] 5 1 is a source and drain electrode made of a metal material such as chromium or aluminum; 16 is a light-shielding film such as an amorphous germanium film; 17 is an insulating film made of silicon dioxide, silicon nitride, etc. source; An n-type or D-type amorphous silicon layer 18 is provided at the interface between the train electrodes 14 and 15 and the amorphous silicon film 13 in order to set carriers of the transistor to either electrons or holes. The operation as shown in Fig. 1 is the same as that of the conventional thin film transistor described in Fig. 1. Light shielding.%'3
16 is formed of a germanium-based amorphous film.
プラズマＯＶＤ法などで形成した、シリコン及びゲルマ
ニウムの合金の非晶質は、第３図に示す様な光伝導特性
を示す。第３図で横軸はＧ、原子数の（Ｇｅ＋ｓｉ）原
子数の割合、タテ軸は光伝導度である。即ちゲルマニウ
ムとシリコンの比が１：１の付近でｉｏ”−’ｃΩ、
ｃｒｎ） −’と最小の光伝専度の値を示し、シリコン
を含まない喚でも１０−’（Ω、ｏｎ）−”台の小さな
光伝否度でちる。また非晶質ゲルマニウムの光吸収係数
ｆ：第４図に示す。第４図で横軸はフォトンのエネルギ
ー、タテ軸は光の吸収係数である。非晶質シリコンにつ
いては実線で、非晶質ゲルマニウムについては破線で示
しである。第４図の全スペクトル範囲で非晶ダニゲルマ
ニウムは非晶質シリコンよりも１０２〜１０３大きな吸
収係数を示す。第３図及びＥ９４図から、非晶質ゲルマ
ニウム系の合金は、光照射下でもＬｏｇ ０ｍ Ｃｍ台
の大きな電気抵抗を有し、非晶質シリコンが光を吸収す
る領域で、１０４〜１０６ふ１と大きな吸収係数を示す
。こしにより厚さ１ （Ｊ ００ Ａ〜２μｍの非晶質
ゲルマニウム、瞑は面内方向に対しては実質的に絶縁ｌ
良でかつ、厚さ方向に対しては、逅ブＣ１膜として働く
。（光伝導度１０−０Ω−’Ｈ（、Ｉｎ−”、吸収係８
１０５− のとき、ｎ
厚さ０．５ｐｍ、長さ１０ ｐ ｍ 、巾１０μ怖の、
ＬＡのシート抵抗ｒＪ： １０ ’４Ω、ｃｍ、光透過
ボは５Ｘ１０″″５〕。この様にして、非晶質でゲルマ
ニウムを含む股は、非晶質シリコン系の半導体膜よりな
る薄膜トランジスタの遮光Ｉｎ？とじて充分な特性を有
する。また、第２図で、ゲート絶縁膜１２、非晶質シリ
コン膜１３、遮光１ｑ ｉ６ ％絶縁膜１７の各嘆は、
いずｎもプラズマＯＶＤ法、あるいはヌノ（ツタ法など
で形成できることが知らｎているので、同一の装置内で
連続形成が可能である。また遮光膜のパターンは絶縁膜
と同一で良いので痕光膜形成の為の余分なフォトプロセ
スを必要としない。更に、第２図のごとく、遮光、「τ
１６上に絶縁膜１７を形成すると、遮光、膜１６の慎厚
方向に対するわ（裟性も充分なものとなる。An amorphous alloy of silicon and germanium formed by a plasma OVD method or the like exhibits photoconductive characteristics as shown in FIG. In FIG. 3, the horizontal axis is G, the ratio of the number of atoms (Ge+si) to the number of atoms, and the vertical axis is the photoconductivity. That is, when the ratio of germanium to silicon is around 1:1, io''-'cΩ,
crn) -', which shows the minimum phototransmission efficiency, and even in cases that do not contain silicon, the phototransmission efficiency is as small as 10-'(Ω, on)-'.Also, the light absorption of amorphous germanium Coefficient f: Shown in Figure 4. In Figure 4, the horizontal axis is the photon energy and the vertical axis is the light absorption coefficient.Amorphous silicon is shown as a solid line, and amorphous germanium is shown as a broken line. .Amorphous germanium exhibits an absorption coefficient 102 to 103 larger than that of amorphous silicon in the entire spectral range shown in Figure 4.From Figure 3 and Figure E94, amorphous germanium-based alloys exhibit high absorption coefficients even under light irradiation. It has a large electrical resistance on the order of Log 0m Cm, and exhibits a large absorption coefficient of 104 to 106 F1 in the region where amorphous silicon absorbs light. Germanium is virtually insulating in the in-plane direction.
It has a good film thickness and acts as a film C1 in the thickness direction. (Photoconductivity 10-0Ω-'H(, In-", absorption coefficient 8
105-, when n is 0.5 pm thick, 10 pm long, and 10 μm wide,
Sheet resistance rJ of LA: 10'4Ω, cm, light transmission area is 5X10''5]. In this way, the amorphous and germanium-containing portions of the thin film transistor made of the amorphous silicon-based semiconductor film are made of light-shielding In? It has sufficient properties. In addition, in FIG. 2, each of the gate insulating film 12, amorphous silicon film 13, and light shielding 1q i6% insulating film 17 is as follows.
Since it is known that it can be formed using the plasma OVD method or the Nuno(vine) method, it is possible to form it continuously in the same device.Also, the pattern of the light shielding film can be the same as that of the insulating film, so there is no trace. No extra photo process is required for forming a light film.Furthermore, as shown in Figure 2, light shielding and
When the insulating film 17 is formed on the insulating film 16, the light shielding and the thickness direction of the film 16 are also sufficient.
以上に記した、ゲルマニウム系の遮光膜を有する従来の
薄膜トランジスタは
１゜遮光膜の形成プロセスが容易である。In the conventional thin film transistor having a germanium-based light-shielding film described above, the process of forming a 1° light-shielding film is easy.
２゜遮光Ｋｇ算は絶爪濠性なのでトランジスタの浮遊容
量が増えない
３゜遮光、１良は絶縁性なので、遮光膜ショートによる
トラ／ジメタ不良が起きないなどの特徴金有していて、
光照射のもとて使用できる。しかし、発明者は、上記ゲ
ルマニウム系遮光膜を有する薄、嘆トランジスタを製作
する過程で以下に述べる重大な欠点を見い出した。即ち
、非晶質ゲルマニウムするいは非晶質シリコン、ゲルマ
ニウム合金の、１漠をプラズマＣｖＤ法、スパッタ法な
どで製作すると、内部歪が大きく、基板との密着性が悪
く、非常に剥離しやすい。この為上記トランジスタの製
造歩留り、信顆性は著ぢるしぐ劣ったものであった。2゜ light shielding Kg calculation is extremely moat, so the stray capacitance of the transistor does not increase. 3゜ light shielding, and 1 good is insulating, so it has features such as no tra/metal failure due to shorting of the light shielding film.
Can be used under light irradiation. However, the inventor discovered the following serious drawbacks in the process of manufacturing a thin transistor having the germanium-based light-shielding film. In other words, when amorphous germanium, amorphous silicon, or germanium alloys are manufactured by plasma CVD, sputtering, etc., internal distortion is large, adhesion with the substrate is poor, and peeling occurs very easily. . For this reason, the manufacturing yield and reliability of the above-mentioned transistors were significantly inferior.
本発明の目的は、上記のごとき従来の欠点を除き、容易
なプロセスで形成できる、密焉性の良い遮光膜によって
、電気特性が良好で、明かるい光照射のもとて正常に動
作する薄膜トランジスタを提供することにある。An object of the present invention is to eliminate the above-mentioned drawbacks of the conventional art, and to provide a thin film transistor that has good electrical characteristics and operates normally under bright light irradiation by using a light-shielding film that can be formed by an easy process and has good tightness. Our goal is to provide the following.
くＦ者らは実験の結果、基鈑とゲルマニウム系非晶質Ｌ
１の界面に、早さ３ＯＡ以上の非晶質シリコン層を形成
すると、密焉性が著ぢるしく改壱さｎる。ことを見い出
した。この結果に基づいて実現さｎたのが、８，１５図
および第６図に示す本発明の実施例である。As a result of experiments, researchers found that the basic plate and germanium-based amorphous L
If an amorphous silicon layer with a thickness of 3 OA or more is quickly formed on the interface of 1, the tightness will be significantly improved. I discovered that. The embodiments of the present invention shown in FIGS. 8 and 15 and FIG. 6 were realized based on this result.
以下、実施例に基づいて、図面によυ本発明を説明する
。第５図は、本発明の遮光をした薄膜トランジスタの一
実施例の断面構造を示す図でおる。旬はガラス基板、２
１はゲート電極、ｎはゲート絶縁、’ｆｉＸｓ ２３は
非晶質シリコン、嘆、賢および５はソースおよびドレイ
ン電極、２６は非晶質ゲルマニウムよりなる遮光Ｂ茅、
２７は厚さ３０〜３００Ａの非晶質シリコンじｘ１側は
絶（デ膜、２９はｎ十型非晶質シリコン層である。第５
図の薄膜トランジスタを構成する材料、材質は、名称が
同一であ２Ｌば、第１図、第２図と同様である。またト
ランジスタとしての電気的動作特性も同様に説明できる
。本発明では、非晶質シリコン層２７を設けることにょ
Ｑ１遮光膜？６と絶縁、嘆２８の蟹着性が向上し、ゲル
マニウムを主成分とする非晶質ＩＵを遮光膜として用い
た薄膜トランジスタを実現できた。ここで、非晶質、シ
リコ／層２７の厚さが５００Ａ以下であｊＬば、光が照
射しても、光電流によるソース、ドレイン２４ 、２５
の間のリーク電流は無視できる。Hereinafter, the present invention will be explained with reference to the drawings based on examples. FIG. 5 is a diagram showing a cross-sectional structure of an embodiment of a light-shielded thin film transistor of the present invention. The season is glass substrate, 2
1 is a gate electrode;
27 is an amorphous silicon layer with a thickness of 30 to 300A, and 29 is an n-type amorphous silicon layer.
The materials constituting the thin film transistor in the figure are the same as those in FIGS. 1 and 2 if the names are the same. Furthermore, the electrical operating characteristics as a transistor can be similarly explained. In the present invention, is it necessary to provide the amorphous silicon layer 27? 6 and 28 were improved in insulation, and a thin film transistor using amorphous IU containing germanium as a main component as a light-shielding film was realized. Here, if the thickness of the amorphous silicon/layer 27 is 500A or less, even if light is irradiated, the sources and drains 24 and 25 due to photocurrent
The leakage current during this period is negligible.
第６図は、本発明の遮光をした薄、膜トランジスタの他
の一実施例の断面構造を示す図である。３０はガラス基
板、３１はゲート電極、３２はゲート絶縁膜、３３は非
晶質シリコンＪＫ！、 ３４および３５はソースおよび
ドレイン電極、３６は絶縁、膜、３７は厚さ３０〜３０
０又の非晶質シリコ／、嘆、３８は非晶質ゲルマ−ラム
からなるで光１１Ｒ１３９はｎ十型非晶質シリコン層で
ある。第６図の薄膜トランジスタを構成する材料、利ｒ
６も名称が同一であｎば第１図、第２図色同様、動作特
性も同様でちる。本実施例では、非晶質シリコン層３７
を設けることにより遮光膜３８と絶ＲＦ！ ３Ｇの密着
性が向上し、ゲルマニウムを主成分とする非晶質膜を遮
光膜として用いた薄Ｊ［コトランジヌクを実現できた。FIG. 6 is a diagram showing a cross-sectional structure of another embodiment of a light-shielded thin film transistor of the present invention. 30 is a glass substrate, 31 is a gate electrode, 32 is a gate insulating film, and 33 is an amorphous silicon JK! , 34 and 35 are source and drain electrodes, 36 is an insulating film, 37 is a thickness of 30 to 30
38 is made of amorphous germanium, and the light 11R139 is an n0-type amorphous silicon layer. Materials constituting the thin film transistor shown in Figure 6, interest rate r
6 has the same name and the operating characteristics are the same as in the colors shown in FIGS. 1 and 2. In this embodiment, the amorphous silicon layer 37
By providing the light shielding film 38, there is absolutely no RF! The adhesion of 3G was improved, and we were able to realize a thin film using an amorphous film containing germanium as a main component as a light-shielding film.
第１図、第２図、第５図、第６図の各トランジスタの非
晶質膜、絶縁膜はい−Ｐｔ−ＬもプラズマＯＶＤ法、ス
パッタ法などで形成することができる。また金属膜は、
真空蒸着、スパッタなどの方法で形成できる。各層の厚
さは、お丸・よそ５００八〜１μｍが用いらする。The amorphous film and insulating film of each transistor in FIGS. 1, 2, 5, and 6 can also be formed by plasma OVD, sputtering, or the like. In addition, the metal film is
It can be formed by methods such as vacuum evaporation and sputtering. The thickness of each layer is approximately 5008 to 1 μm.
また以上の説明では、半導体層としては、非晶質シリコ
ンを用いるとしたが、遮光膜よりも大きなバンドギャッ
プを有する半導体層を活性領域とする薄膜トランジスタ
にも本発明が適用できることは明らかである。Further, in the above description, amorphous silicon is used as the semiconductor layer, but it is clear that the present invention can also be applied to a thin film transistor whose active region is a semiconductor layer having a larger band gap than the light-shielding film.
以上に記した本発明の遮光膜を有する薄膜トランジスタ
は
１、形成ブロセヌが容易である。The thin film transistor having the light shielding film of the present invention described above is easy to form.
２、遮光膜によるトランジスタの浮遊容量が増えない。2. The stray capacitance of the transistor does not increase due to the light shielding film.
３、遮光膜は絶縁性なので、遮光膜ショートによるトラ
ンジスタネ良が起きない。3. Since the light-shielding film is insulating, transistor failure due to short-circuiting of the light-shielding film does not occur.
４、遮光膜の密着性が良好で信頼性のあるトランジスタ
とできる。4. The light-shielding film has good adhesion and a reliable transistor can be obtained.
などの優れた特徴を有する。It has excellent characteristics such as
第１図、第２図は従来の遮光膜に有する薄膜トランジス
タの断面図、第３図は光伝導度、第４図は光吸収係数を
示す図である。第５図及び第６図は本発明の実施例を示
す図でおる。
１０．ガラヌ基板、２１．ゲート電極、３０．ゲート絶
縁膜、４ 、 、非晶質シリコン膜、５８．ソース電極
、６１．ドレイン電極、”７ 、８ 、 、絶縁膜％９
０．遮光膜、１０ 、 ｅ ％土層、１１０．ゲート電
極、１２０．ゲート絶縁膜、１３０．非晶質シリコン１
０．１４．、ソーヌ電極、１５．．ドレイン１！極、１
６０．遮光膜、１７９．絶ｎ朦、１８ 、 、 ｎ土層
、１９０．ガラヌ基板、２００．ガラヌ基板、２１６．
ゲート電極、２２０．ゲート絶縁膜、２３０．非晶質シ
リコン膜、冴。、ソーヌ電極、５０．ドレイン電極、２
６゜、１光１日、２７ 、 、非晶質シリコン厄、ア。
、絶Ｐ１．Ｉｐ７５．２９．、ｓ＋ｆｆｌ、側１．ガラ
ヌ基板、３１１．ゲート電極、３２０．ゲートｖ３ね膜
、３３．。非晶質シリコン膜、３４．、ソーヌ寛４Ｌ
３５ 、 、ドレイン電極、 ３Ｇ 、 、絶縁膜、３
７ 、 、非晶質シリコン膜、３８６．遮光膜、３９．
。九土層
以上
出願人 セイコー電子工業株式会社
第１図
第２図
１Ｂ 、ｔｚ ／／ １ｄ１３ ／デ
第３１１
Ｑ：； ４１ぽ］1 and 2 are cross-sectional views of a thin film transistor included in a conventional light-shielding film, FIG. 3 is a diagram showing photoconductivity, and FIG. 4 is a diagram showing a light absorption coefficient. FIG. 5 and FIG. 6 are diagrams showing an embodiment of the present invention. 10. Galanu substrate, 21. gate electrode, 30. Gate insulating film, 4., Amorphous silicon film, 58. source electrode, 61. Drain electrode, "7, 8, , insulation film%9
0. Light shielding film, 10, e% soil layer, 110. gate electrode, 120. Gate insulating film, 130. Amorphous silicon 1
0.14. , Saone electrode, 15. ．． Drain 1! pole, 1
60. Light shielding film, 179. Zetsun, 18, , n soil layer, 190. Galanu substrate, 200. Galanu substrate, 216.
gate electrode, 220. Gate insulating film, 230. Amorphous silicon film, Sae. , Saone electrode, 50. drain electrode, 2
6°, 1 light 1 day, 27, , Amorphous silicon disaster, a. , Zettai P1. Ip75.29. , s+ffl, side 1. Galanu substrate, 311. gate electrode, 320. Gate v3 membrane, 33. . Amorphous silicon film, 34. , Saone Hiroshi 4L
35, ,Drain electrode, 3G, ,Insulating film, 3
7. , Amorphous silicon film, 386. Light shielding film, 39.
. Applicant for Kudo layer and above Seiko Electronics Co., Ltd. Figure 1 Figure 2 Figure 1B, tz // 1d13 /De No. 311 Q:; 41po]
Claims (1)
緑痕、シリコンを主成分とした非晶質半導体膜およびソ
ーヌ、ドレインｔ！２極を有し、少なくとも一居の、ゲ
ルマニウムを原子ｎ度で３０チ以上含む非晶質膜よりな
る遮光膜を有する、絶縁ゲート鳳界効果型の薄膜トラン
ジスタにおいて、上記遮光膜の少なくとも一方の界面の
全面に、厚さ３Ｑ Ａ〜５００Ａの、シリコンを主成分
とした非晶質膜を有することを特徴とした薄膜トランジ
スタ。(1) Gate electrode, gate tl provided on an insulating substrate
Green scar, amorphous semiconductor film mainly composed of silicon, and drain t! In an insulated gate field effect thin film transistor having two poles and at least one light shielding film made of an amorphous film containing germanium at n degrees or more, at least one interface of the light shielding film. A thin film transistor characterized by having an amorphous film mainly composed of silicon and having a thickness of 3QA to 500A over the entire surface of the transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3813084A JPS60182773A (en) | 1984-02-29 | 1984-02-29 | Thin film transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3813084A JPS60182773A (en) | 1984-02-29 | 1984-02-29 | Thin film transistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60182773A true JPS60182773A (en) | 1985-09-18 |
Family
ID=12516861
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3813084A Pending JPS60182773A (en) | 1984-02-29 | 1984-02-29 | Thin film transistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60182773A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0333208A2 (en) * | 1988-03-18 | 1989-09-20 | Nokia (Deutschland) GmbH | Thin film transistor with an amorphous carbon light protection and method to make this light protection |
| US4958205A (en) * | 1985-03-29 | 1990-09-18 | Matsushita Electric Industrial Co., Ltd. | Thin film transistor array and method of manufacturing the same |
| US5166086A (en) * | 1985-03-29 | 1992-11-24 | Matsushita Electric Industrial Co., Ltd. | Thin film transistor array and method of manufacturing same |
| US5674497A (en) * | 1994-06-01 | 1997-10-07 | Fuji Sangyo Co., Ltd. | Hair growth promoter comprising extract of mulberry root bark and persimmon and/or paulownia, or extract of persimmon and paulownia |
-
1984
- 1984-02-29 JP JP3813084A patent/JPS60182773A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4958205A (en) * | 1985-03-29 | 1990-09-18 | Matsushita Electric Industrial Co., Ltd. | Thin film transistor array and method of manufacturing the same |
| US5137841A (en) * | 1985-03-29 | 1992-08-11 | Matsushita Electric Industrial Co., Ltd. | Method of manufacturing a thin film transistor using positive and negative photoresists |
| US5166086A (en) * | 1985-03-29 | 1992-11-24 | Matsushita Electric Industrial Co., Ltd. | Thin film transistor array and method of manufacturing same |
| EP0333208A2 (en) * | 1988-03-18 | 1989-09-20 | Nokia (Deutschland) GmbH | Thin film transistor with an amorphous carbon light protection and method to make this light protection |
| US5674497A (en) * | 1994-06-01 | 1997-10-07 | Fuji Sangyo Co., Ltd. | Hair growth promoter comprising extract of mulberry root bark and persimmon and/or paulownia, or extract of persimmon and paulownia |
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