JPS60124144U - Tuner interstage double tuning circuit - Google Patents
Tuner interstage double tuning circuitInfo
- Publication number
- JPS60124144U JPS60124144U JP1010284U JP1010284U JPS60124144U JP S60124144 U JPS60124144 U JP S60124144U JP 1010284 U JP1010284 U JP 1010284U JP 1010284 U JP1010284 U JP 1010284U JP S60124144 U JPS60124144 U JP S60124144U
- Authority
- JP
- Japan
- Prior art keywords
- tuner
- tuning circuit
- circuit
- double tuning
- interstage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Superheterodyne Receivers (AREA)
- Noise Elimination (AREA)
- Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は、テレビジョン受像機のチューナを示すブ冶ツ
ク図、第2図は従来の段間複同調回路を示す回路図、第
3図は第2図のローパッド受信時の等価回路図、第4図
は第2図のハイバンド受信時の等価回路図、第5図は従
来回路と本考案による回路について受信チャンネル対イ
メージ周波数妨害比の関係を示すグラフ、第6図は本考
案に係る段間複同調回路を示す回路図、第7図は第6図
のハイバンド受信時の等価回路図、第8図はコンデンサ
容量の変化による受信チャンネル対イメージ周波数妨害
比の関係を示すグラフである。
10.11・・・バラクタダイオード、12,13.1
4,15・・・コイル、16,17,18・・・スイッ
チグダイオード、SW・・・バンド切換用電圧印加端子
。Fig. 1 is a block diagram showing a tuner of a television receiver, Fig. 2 is a circuit diagram showing a conventional inter-stage double tuning circuit, Fig. 3 is an equivalent circuit diagram when receiving the low pad of Fig. 2, Fig. 4 is an equivalent circuit diagram for high-band reception in Fig. 2, Fig. 5 is a graph showing the relationship between the receiving channel and the image frequency interference ratio for the conventional circuit and the circuit according to the present invention, and Fig. 6 is the diagram according to the present invention. A circuit diagram showing an interstage double-tuned circuit, Fig. 7 is an equivalent circuit diagram during high band reception in Fig. 6, and Fig. 8 is a graph showing the relationship between the receiving channel and the image frequency interference ratio due to changes in capacitance of the capacitor. . 10.11... Varactor diode, 12, 13.1
4, 15... Coil, 16, 17, 18... Switching diode, SW... Voltage application terminal for band switching.
Claims (1)
複同調回路の一次側と二次側をダイオードとコンデンサ
の直列回路で接続した構成とする一方、前記ダイオード
にバンド切換用電圧を印加するようにし、ハイバンド受
信時前記ダイオードを導通させて一次側、二次側回路間
にイメージ周波数妨害排除用のトラップ回路を形成せし
めることを特徴とするチューナの股間複同調回路。The primary side and the secondary side tuned circuit are mutually inductively coupled, and the primary side and the secondary side of the interstage double tuned circuit are connected by a series circuit of a diode and a capacitor. , and the diode is made conductive during high band reception to form a trap circuit for eliminating image frequency interference between the primary side and secondary side circuits.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1010284U JPS60124144U (en) | 1984-01-30 | 1984-01-30 | Tuner interstage double tuning circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1010284U JPS60124144U (en) | 1984-01-30 | 1984-01-30 | Tuner interstage double tuning circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60124144U true JPS60124144U (en) | 1985-08-21 |
Family
ID=30490975
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1010284U Pending JPS60124144U (en) | 1984-01-30 | 1984-01-30 | Tuner interstage double tuning circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60124144U (en) |
-
1984
- 1984-01-30 JP JP1010284U patent/JPS60124144U/en active Pending
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