JPS60119181A - Solid-state image pickup device - Google Patents

Solid-state image pickup device

Info

Publication number
JPS60119181A
JPS60119181A JP58227156A JP22715683A JPS60119181A JP S60119181 A JPS60119181 A JP S60119181A JP 58227156 A JP58227156 A JP 58227156A JP 22715683 A JP22715683 A JP 22715683A JP S60119181 A JPS60119181 A JP S60119181A
Authority
JP
Japan
Prior art keywords
photodiode
electrode
shift register
transfer
transfer gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58227156A
Other languages
Japanese (ja)
Inventor
Tadahiro Miwatari
忠浩 見渡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP58227156A priority Critical patent/JPS60119181A/en
Publication of JPS60119181A publication Critical patent/JPS60119181A/en
Pending legal-status Critical Current

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  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

PURPOSE:To prevent a solid-state image pickup device provided with a signal reading part consisting of the 2nd conductive type area and having density higher than the 2nd conductive type area between a photoelectric conversion element part and a charge transfer device from a residual image phenomenon by contacting the 2nd conductive type area having a high density in said signal reading part with the charge transfer device and separating the area from the photoelectric conversion element. CONSTITUTION:A curve 11' is potential distribution under an electrode 9 at the OFF state of a transfer gate and a curve 12'a is potential distribution under the electrode 9 at the ON state of the transfer gate. If a photodiode is set up so as to be depleted with low potential by reducing the concentration of an impurity in the n type area 1 of the photodiode, the signal charge of the photodiode is completely transferred to a vertical shift register. Since the electrode 9 is formed by polysilicon and an area under a part obtained by oxidizing the polysilicon electrode 9 is p<-> type area 6 even if the side of the polysilicon electrode 9 is oxidized, the electrode 9 is depleted at the ON state of the transfer gate and the potential distribution shown by the curve 12'b is supposed. Consequently, complete charge transfer from the photodiode to the vertical shift register takes place.

Description

【発明の詳細な説明】 本発明は固体撮像装置にかかり、とくに電荷転送方式の
固体撮像装置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a solid-state imaging device, and particularly to a charge transfer type solid-state imaging device.

従来のインターライン転送方式による電荷転送装置は、
第1図に示すように、電荷転送′−′極群で駆動する複
数列の垂直シフトレジスタ2と、各垂直シフトレジスタ
の−(111に5のトランスファゲートを介U7て接続
[2、月つ互いに電気的に分離された光M]、変換部l
と垂直シフトレジスタ2の一端に電気的接合[〜六′串
、荷転送水平シフトレジスタ3と、水平ソフトレジスタ
の一端に信号型、荷を検出する装置P+−4が設けられ
ている。このようなインターライン転送方式による撮像
装置は、光勺1.変換部lで入射光量に応じて蓄積した
電荷を、トランスファゲート5を介してそれぞれ対応す
る垂直シフトレジスタ2へ転送する。垂直シヘトレジス
タヘfl電荷を転送し、*a、トランスファゲートが閉
じられ、光電変換部1は、次の周期の信号霜、荷を蓄積
する。一方、垂直シフトレジスタ2へ転送さカ、た信号
fi]、荷は並列に垂直方向に転送し、各垂直シフトレ
ジスタ2へ転送された信号電荷は並列に垂直方向に転送
し、各垂直シフトレジスタの一水平うイン4ひに、水平
シフトレジスタ3に転送さ扛る。
A charge transfer device using the conventional interline transfer method is
As shown in FIG. 1, there are multiple columns of vertical shift registers 2 driven by charge transfer ′-′ pole groups, and the −(111) of each vertical shift register is connected through U7 through a transfer gate 5. mutually electrically separated light M], conversion unit l
At one end of the vertical shift register 2 there is provided an electrical connection [~6', a load transfer horizontal shift register 3, and at one end of the horizontal soft register a signal type, load detecting device P+-4 is provided. An imaging device using such an interline transfer method is optical 1. The charges accumulated in the converter l according to the amount of incident light are transferred to the corresponding vertical shift registers 2 via the transfer gates 5. The fl charge is transferred to the vertical shift register, *a, the transfer gate is closed, and the photoelectric conversion unit 1 accumulates the signal charge for the next cycle. On the other hand, the signal charges transferred to the vertical shift register 2 are transferred in parallel in the vertical direction, and the signal charges transferred to each vertical shift register 2 are transferred in parallel in the vertical direction, and the signal charges transferred to each vertical shift register 2 are transferred in parallel in the vertical direction, The data is transferred to the horizontal shift register 3 in the fourth horizontal row.

水平シントレジスぞへ送られた電荷は次の垂直シフトレ
ジスタから信号が鴫い送されてくる間に水平方向に信号
1トイ、lrを転送し′1j荷検出称14から信号と1
、て外円′に取り出される。第2図1(a)は、第1し
;に示すI−7組」二における断面を模式的に示したも
のである。i i%ll基板7の表面には、低旋度P2
11す領域から取る接@頓域6が形成されており、さら
にP型領域6の内には、フォトダイオードのn型領域】
と垂t41ンフトレジスタのn [’l領域2が形成さ
tている。基イt<の表面には絶縁層8を介[、て′山
The charges sent to the horizontal shift register are transferred horizontally as signals 1 and lr while the signals are being sent from the next vertical shift register, and are transferred from signal 1 to signal 1 to
, and is taken out to the outer circle'. FIG. 2(a) schematically shows a cross section of the I-7 set shown in the first section. i i%ll On the surface of the substrate 7, there is a low rotation P2
A contact region 6 is formed from the 11th region, and further within the P-type region 6 is an n-type region of the photodiode.
A vertical region 2 of the nft register is formed. An insulating layer 8 is provided on the surface of the substrate t.

抄9が設けられており、電極9は粗面シフトレジスタに
おいて垂直方向への電荷転送をおこムうとともに光?1
1.71!、、<換部1から垂面シフトレジスタ2への
信号′岨荷転送fIli省(Iする。lin型領域1と
n型領域2の間には市深度P型不純物領域5が形成さV
でいる。
The electrode 9 performs charge transfer in the vertical direction in the rough-surfaced shift register and also transmits light. 1
1.71! ,,<The signal from the converter 1 to the vertical shift register 2 is transferred fIli (I). A depth P-type impurity region 5 is formed between the lin-type region 1 and the n-type region 2.
I'm here.

この様な電倚転迭耕)像装置?]では、光電変換部Jか
ら垂直シフトレジスタ2へ信号電荷を転送する旨に、転
送114n間内で完全ム蓄積市荷が垂直シフトレジスタ
へ移動[ないために残像」、象をひき起こす。こわ、を
第2図(b)に17たがって6騎・明する。第2図(b
)は、第2図(a)に示す構造の水平方向の電位分布を
模式的に示し、ている。曲線11は、トランスファゲー
トがオフ状態のときの電極9の下の乳、位分布、曲線1
2は、トランスファゲートがオン状態のときの市;極9
の下の′電位分布である。
An image device like this? ], when the signal charge is transferred from the photoelectric conversion unit J to the vertical shift register 2, the complete accumulated charge is transferred to the vertical shift register within the transfer interval 114n, causing an afterimage. The fear is shown in Figure 2(b) as follows. Figure 2 (b
) schematically shows the horizontal potential distribution of the structure shown in FIG. 2(a). Curve 11 shows the position distribution under the electrode 9 when the transfer gate is in the off state.Curve 1
2 is the city when the transfer gate is on; pole 9
is the ′potential distribution under .

トランスファゲートが閉じら1ている時、つ1リドラン
スフアゲートがオフ状態のときフォトダイオード1に入
射[また光は、光%1変換さね、信号箱。
When the transfer gate is closed 1, the light incident on the photodiode 1 is converted into light%1 when the transfer gate is in the off state, and the signal box.

荷が7オトタイオードに蓄積さ才j5る。この時のフォ
トダイオードの霜4位をW線]3で示す。トランスファ
ケート箱極がオン状態になると、フォトダイオードに蓄
A′青さね、た電M Irs 、垂mシフトレジスタへ
移動する。このため、フォトダイオードの11L位は上
昇する。フォトダイオードに蓄積さバーた霜、荷ば、最
初速やかに7オトタイオードから垂直シフトレジスタへ
転送されるが、トランスファゲート5の知7位とフォト
ダイオード1の電位の差が0印つまりトランスファゲー
ト領域のフェルミ準位より小をくスL/−1と、フォト
クイオードから垂直シフトレジスタへの信号電荷の移動
は、ザブスレッシュホルド′i’ij、随によるものと
ムリ信号電荷の転送は遅くなる。第2図(illの曲線
11ユ、フォトダイオードとトランスファケートの′電
位差がp印のときのフォトタイオードの電位であり、フ
ォトダイオードの111.位がここまでC5くなると、
fj’:記に示し六組4由によりフォトダイオードから
垂直シフトレジスタへの11、号Lj、荷の移動は遅く
なり、信号′61゜荷の「4〔み出し−XI IH’:
1つ−fリトランスンアケートがオン4犬シ1のル1間
中に、フォトダイオードの信号IJ。
The load is accumulated in the 7 otodes. The fourth level of frost on the photodiode at this time is shown by the W line]3. When the transfer box pole is turned on, the voltage A' stored in the photodiode is transferred to the M shift register. For this reason, the value of about 11L of the photodiode increases. The bar frost accumulated on the photodiode is first immediately transferred from the 7th photodiode to the vertical shift register, but when the difference in potential between the 7th position of the transfer gate 5 and the photodiode 1 is 0, that is, in the transfer gate area. When L/-1 is smaller than the Fermi level, the transfer of the signal charge from the photodiode to the vertical shift register is due to the threshold 'i'ij, and the transfer of the signal charge becomes slow. Figure 2 (ill curve 11U) is the potential of the photodiode when the potential difference between the photodiode and the transferate is p mark, and when the 111. point of the photodiode reaches C5,
fj': The movement of the load from the photodiode to the vertical shift register becomes slow due to the six sets 4 shown in the figure, and the signal '61° of the load is delayed.
The photodiode signal IJ is turned on during the 1-f retransmission period.

荷が全て、iJl、iY1シフトレジスタに転送するこ
とができないでフォトクイオードに残ってし甘う。この
フォトタイオードに残った′シト荷は次の信号電荷の読
み出しJIJt ij、tl vc残1す・′としてa
J+7み出され、る。
All of the load cannot be transferred to the iJl and iY1 shift registers and remains in the photodiode. The charge remaining in this photodiode is used to read out the next signal charge.
J+7 is exposed.

このような欠点を1宛〈ためCcげ、第21ン+ (a
)に示した構コf1に寂いて、1のフォトダイオードの
不ボ11(物濃I9−を適度に下61で、第2図(C)
の市5位分布図に示すj二うに、面線15に示さ7j、
るフォトタイオードの最も深くなる電位が、i61訴1
4に示をわ。
Such shortcomings should be addressed to 1.
2 (C)
7j shown on the surface line 15,
The deepest potential of the photodiode is i61 complaint 1.
I'll show you 4.

る「フォトタイオードとトランスファケートの1北位差
がρ印になるm位」よりも浅くなるようにすv5はよい
。つ1す、フォトダイ刊−ドの1にλドすn型領域の#
度を・下けることにより、フォトダイオードは低い電位
で空乏化するようになる。フォトタイオード娃完全に空
乏化するとそワー旬上1−t 。
v5 is good if it is shallower than ``about m where the 1 north difference between the photodiode and the transferate becomes ρ''. 1, # of the n-type region of the photodiode is λ.
By lowering the power, the photodiode becomes depleted at a lower potential. When the photodiode becomes completely depleted, the temperature rises to 1-t.

電位か深く々らない。L、たがって、この完全に芹・乏
化する霜:位が面線15に示されるフォトダイオードの
最も深くなる電位となる。このフォトダイオードが完全
に空乏化するr、に、位とトランスファゲートの電位差
がΩ印よりも犬−@rj;n、は、フォトダイオードか
ら垂力シフ)・レジスタへ速やかに′電荷転送がおこな
わオフる斤め、フォトダイオードに信号電荷が取り残さ
jることけ汗くなる。フォトタイオードのn型領域の不
純物況゛!一度を残像がなくなるように、且つ最イ1(
充分な信月?11.荷が得られるように適度に設定すれ
は第2図(a)のよう々構造でも、残像のない固体撮像
製置市が実現するはすである。ところが第2図(aJの
ように1つの′帛頓19によって垂直シフトレジスタの
垂直方向への電荷転送とフォトダイオード1から垂直シ
フトレジスタ2への信号電荷の制御をおこカう構造では
、垂直シフトレジスタ2の垂直方向へ転送される信号電
荷量を太きくするためにまり、トランスファゲート部5
で発生する暗電流成分をおさえるためにフォトダイオー
ドのn型領域1と垂直シフトレジスタのn型領域2の間
に高漉度のP型領域5を形成する必要がある。第2+9
(a)の構造において、例えば通常の方法に従い電極9
をポリシリコンで形成しフォトダイオード1を電極9を
マスクにしてイオン注入で形成した後、1のフォトダイ
オードのn型領域表面を酸化すれば、電Pl、9の側面
は酸化さj、る。したがって、トランスファゲート5の
P型領域とフォトダイオード1のn型領域が接している
部分上では、電極9が酸化されて存在し万い場合が生じ
る。フォトダイオードのn型領域1の不純物濃度が高い
場合は、短時間のアニールをほどこせは、横方向の拡散
により、”型領域1が実効的に広がるため問題ないが、
フォトダイオードのn型領域1の不純物濃度が低い場合
、アニールをほどこしても高濃度P型領域5存在のため
に、n型領域に、実効的にほとんど広がらない、17′
fcがって、高濃#P型領域5の上にポリシリコン電極
9がない飴域が存在し、】のn型領域から2の垂面レジ
スタ領域への(m号箱荷の転送が充分におこなわれない
Jル°1合が生じる。つまり、第2図(a)のよう7C
tilr造でに、通常法である市、極9をポリシリコン
で形成り2、それをマスクにり、てフォトダイオードの
n型領域1を形成り、′fc堝合、lのフォトダイオー
ドから2の垂直シフトレジスタへの完全な電荷転送がお
きす、残像のない固体撮像装ノ醒を実現するのは難かl
−2い。
The potential doesn't tremble deeply. L, therefore, this completely depleted frost level becomes the deepest potential of the photodiode shown by the plane line 15. When this photodiode is completely depleted, r, the potential difference between the potential and the transfer gate becomes smaller than the Ω mark. When it turns off, the signal charge is left behind in the photodiode, which makes me sweat. Impurity status in the n-type region of the photodiode! At least once so that there is no afterimage, and at least 1 (
Enough Shingetsu? 11. Even if the structure is as shown in FIG. 2(a), a solid-state imaging device without afterimages can be realized if the settings are set appropriately so as to obtain the desired effect. However, in a structure as shown in FIG. In order to increase the amount of signal charge transferred in the vertical direction of the register 2, the transfer gate section 5
In order to suppress the dark current component generated in the photodiode, it is necessary to form a highly concentrated P-type region 5 between the n-type region 1 of the photodiode and the n-type region 2 of the vertical shift register. 2nd + 9th
In the structure of (a), for example, the electrode 9 is
is formed of polysilicon and photodiode 1 is formed by ion implantation using electrode 9 as a mask. If the surface of the n-type region of photodiode 1 is oxidized, the side surfaces of electrode Pl and 9 will be oxidized. Therefore, on the portion where the P type region of the transfer gate 5 and the N type region of the photodiode 1 are in contact, the electrode 9 is likely to be oxidized. If the impurity concentration in the n-type region 1 of the photodiode is high, short-time annealing will not cause any problems because the "type region 1 will effectively expand due to lateral diffusion."
When the impurity concentration in the n-type region 1 of the photodiode is low, even if annealing is performed, the impurity will hardly spread to the n-type region due to the presence of the high concentration p-type region 5.
According to fc, there is a candy area where there is no polysilicon electrode 9 on top of the high density #P type region 5, and the transfer of the (m number box load) from the n type region of ] to the vertical resistor region of 2 is sufficient. There will be a Jru°1 conjunction that is not performed in 7C, as shown in Figure 2 (a).
In the tiller construction, the electrode 9 is formed using polysilicon using the usual method, and using it as a mask, the n-type region 1 of the photodiode is formed. Since complete charge transfer to the vertical shift register occurs, it is difficult to realize solid-state imaging without image retention.
-2.

本発明(ハ)、上記の欠点を顧みて1つのポリシリコン
′串$yVCよって、垂直シフト1/ジスタの垂直方向
への知り白に送とフォトタ”イオードから垂直シフトレ
ジスタへの′出荷転送f1..−こなうことができる残
像のない固4A−撮像蔀1療を提供−するd)のである
In view of the above-mentioned drawbacks, the present invention (c) uses one polysilicon skewer to transfer the vertical shift 1/register to the vertical shift register and the shipping transfer f1 from the photodiode to the vertical shift register. .. - Provides a solid 4A imaging system without afterimages that can be performed d).

不発明の特徴は、第1導M1型の基・(ル表面に、前F
基板と反対の導電ハリをもつ第2導電型の領域を形成し
て外る接合領域に、前記第] 4′tj>HByからな
る光電変工9(素子部とこの光電変換素子部の各素子に
沿って設けられ、前記−&電変捗素子からの信号f¥i
、荷を転送する電荷転送装俯と、前記光電変換各素子都
と前R1″Ff務゛ず転送装俗−との間に、前記第2導
電型領域よりも高濃度の第2導電型領域からなる信号読
み出し5部ケ設rTfcν・1体撮像装baにおいて、
前記信刊d′1「み1f装置2部の高濃度第2専市、^
り領」放が前記電石転送装u6−とはをし前記光′亀亥
換累子には(イしてない!v11体J〕i・・1zj装
置(1にある。
The inventive feature is that the front F
A region of the second conductivity type having a conductivity opposite to that of the substrate is formed, and the photoelectric converter 9 (element part and each element of this photoelectric conversion element part , and the signal f\i from the -& electric variable element
, a second conductivity type region having a higher concentration than the second conductivity type region, between the charge transfer device for transferring charges, and the photoelectric conversion element and the front R1″Ff function transfer device; In the signal readout five-part setup rTfcν and one-body imaging device ba, consisting of
Said Shinkan d'1 "High concentration second specialty market of 1f equipment 2 parts, ^
The light transmission device U6- is separated from the light transmission device U6-, and the light-transfer device U6- is located in the device (1).

次に不臂明の実#I伜1について1シ1面灸−用いて躯
明する。
Next, I will clarify the meaning of the fruit of incontinence #I⼼1 by using moxibustion on one side and one side.

gffi、 3 Isl・(a)娃゛不発明の一実施例
を示すもので、(7[来信1で石P明した第2図(a)
と(L・様に、第1は(に示す電荷、4v込イイJ−イ
ヌ装訃のII線」二の訂1面不−(u式的に示(、f(
ものである。第3図において第2 (yz)と同−機能
を4、つ↑・+1懺t1同一記号で示(、である。この
第317! (a) (r(yl”<す丈M5イ911
と第2 EXI (a)に示した)÷施fi1との清い
は、トランスファゲートの尚濃度P型不純物領域5′か
フォトクイメートのn型不胛物釦域1と+I”i接セー
ノに、6のP−早領域が基板表面に露出していることに
ある。第3図(a)に示す本発明の実施例によれば、フ
ォトダイオードのn型領域1の不純物濃度を適度に下け
ることにより、完全な電荷転送がおこシ、残像現象はな
くなる。
gffi, 3 Isl・(a) This shows an example of non-invention, (7 [Fig. 2 (a)
and (like L., the first is the electric charge shown in (, 4v included).
It is something. In Fig. 3, the same function as the second (yz) is shown by the same symbol as 4, ↑・+1 t1.
The equation (shown in EXI (a))÷fi1 is the equation between the still-concentrated P-type impurity region 5' of the transfer gate or the n-type impurity region 1 of the photoquimate and the +I''i connection. , 6 are exposed on the substrate surface.According to the embodiment of the present invention shown in FIG. Complete charge transfer occurs and the afterimage phenomenon disappears.

第3図(b)は第2図(b)と同様に、第3図(a)に
示す構造の水平方向の電位分布を模式的に示している。
Similar to FIG. 2(b), FIG. 3(b) schematically shows the horizontal potential distribution of the structure shown in FIG. 3(a).

曲線11′はトランスフ1ゲートがオフ状態のときの電
極9の下の電位分布、曲線12’ (a)はトランスフ
ァゲートがオン状態のときの電極9の下の電位分布であ
る。第1図(C)と同様にフォトダイオードのn型領域
1の不純物濃度を下げてフォトダイオードが低い電位で
空乏化するように設定すれば、フォトダイオードの信号
電荷は、完全に垂直シフトレジスタへ転送される。また
電極9をポリシリコンで形成し、このポリシリコン電極
9の側面が酸化されたとしても、ポリシリコン電極が酸
化された部分の下は6のP−型領域であるのでトランス
ファゲートがオン状態のときは、空乏化踵曲線1.2’
 (b)のような電位分布をとることが予想されるので
、フォトダイオードから垂偵シフトレジ7りへの完全な
箱荷転送が起こる。
Curve 11' is the potential distribution under electrode 9 when the transfer gate is in the off state, and curve 12' (a) is the potential distribution under electrode 9 when the transfer gate is in the on state. If the impurity concentration of the n-type region 1 of the photodiode is lowered and the photodiode is set to be depleted at a low potential as in Figure 1(C), the signal charge of the photodiode is completely transferred to the vertical shift register. be transferred. Further, even if the electrode 9 is formed of polysilicon and the side surface of the polysilicon electrode 9 is oxidized, the P- type region 6 exists under the oxidized portion of the polysilicon electrode, so that the transfer gate is in the on state. When, the depletion heel curve is 1.2'
Since a potential distribution as shown in (b) is expected, a complete transfer from the photodiode to the vertical shift register 7 occurs.

以上n費明し5食ように、第3ト“1(a)に17た本
頼明の実施例て″にフォトタイオードからチロシフトレ
ジスタへの完全な信号電荷の転送がおこるので、従来の
インターライン転p一方式の電荷転送撮像装置の欠点で
2・・った残像用象をなく[7に固体搗像装%−?i−
挾供することができる。まfc、この撮像装置は、1つ
の11]仲で耐酔シフトレジスタの伯チ1(l荷転送と
フォトタイオードからi11直シフトレジスタへの4:
< −q +1.荷の制■lI金おこt、うことができ
るので高@、、l秋化に僧り、ている。しかもこの撮像
装゛:h゛は促米の量産お・術であるポリシリコン籐、
枠をマスクにし六イオン注入法で作成できる。
As explained above, complete signal charge transfer from the photodiode to the chiro shift register occurs in the third section ``Example of Yoriaki Moto which is 17 in 1(a)''. One of the disadvantages of interline transfer type charge transfer imaging devices is that they eliminate the afterimage effect [7% -? i-
It can be served. This imaging device has one 11] intermediate shift register function (1 load transfer and 4 transfers from the photodiode to the i11 direct shift register).
< −q +1. The control of the load is high because I can afford it, and I am praying for autumn. What's more, this imaging device is made of polysilicon rattan, which is a mass-produced technology.
It can be created using the six ion implantation method using the frame as a mask.

4.1ン1■1の1)11イ11.攻i5パ明第1し1
け電荷転送、5・シ1ハを用いに撮像装置1′fの平面
トノ(、第21ヌ1従来技術f2]スすもので、第1し
1に示す1−1線上の■II/11模式図、卦よびぞの
白下の電位分布f1.1^−示す図である。第31?目
ユ本発鴫の一夾施例分示す装丁It1のIiミツ而面お
よびその白下の貧し位分布を示すし1である。
4.1 n 1 ■ 1 of 1) 11 i 11. Attack i5 Pa Ming 1st 1
II/11 on the 1-1 line shown in No. 1 and 1. It is a diagram showing a schematic diagram, the potential distribution f1.1^- under the white of the trigram. It shows the position distribution and is 1.

同、1ン1において、1・・・・・・光電袈換索子、2
・・・・・・垂直レジスタ、5.5’・・・・・・トラ
ンスファゲート部、6・・・・・・N型基板表面上に形
成さn、fcP−型領域、8・・・・・・シリコン酸化
膜を示し、1 ]、、11.’・・・・・・トランスフ
ァゲートがオンのときの市、極9直下の1)位分布、]
 2. 12’ (a) 、12’ (b) ・−−−
−−)ランスフ1ケート丁オフのときの正極9r=下の
部位分布、13・・・・・・フォトタイオードに゛電荷
が最大に蓄積した時のフォトダイオードの′j″11位
、】4・・・・・・トランスファゲート8の知7位との
差がω印になった時のフォトダイオードの霜4位、15
・・・・・・フォトダイオードの霜、位がいちはん深く
なった時のフォトダイオードの電位を示す。
In the same, 1-1, 1... photoelectric cable holder, 2
...Vertical register, 5.5'...Transfer gate section, 6...N, fcP-type region formed on the surface of the N-type substrate, 8... ...indicates a silicon oxide film, 1 ], 11. '...The city when the transfer gate is on, 1) position distribution directly below pole 9,]
2. 12' (a), 12' (b) ・---
--)Positive electrode 9r = lower part distribution when the lance is off, 13... 11th position of the photodiode 'j'' when the maximum charge is accumulated in the photodiode, ]4・・・・・・Photodiode frost 4th place, 15 when the difference between transfer gate 8 and knowledge 7th place becomes ω mark
・・・・・・Indicates the potential of the photodiode when the frost on the photodiode becomes the deepest.

う 彫1図 (12) (b) (C) 宇2図cormorant Carving 1 (12) (b) (C) U2 map

Claims (1)

【特許請求の範囲】 第1導電型の基板上に設けられた前記基板と反対の榎箱
1!(すの第2y4−電型の領域内に、前記第1涛。 礼゛型からガる光’M4: *換素子部と、この光′出
変換素子部の各累子に沿って設けら扛、前記光電変換素
子からの(ii号115荷を転送する市、荷転送装置コ
)、前記九′IIIA変拗各素子部と前記電荷転送装置
6−との間に、前記第2導′ii4、型域よりも高濃度
の第26j:ih’、型領域力・・らなる(S号読み出
し部を設けた固体撮像装置において、前記信号読み出し
部の高G度第2導M)2型領域が前ML: ?h、荷転
荷装送装置接し2前記光電変換素子にけ接[7てないこ
とを特徴とする固体撮像装置r′f。
[Claims] Enoki box 1 opposite to the substrate provided on the substrate of the first conductivity type! (In the region of the 2nd y4-electrode type, the first wave. From the photoelectric conversion element (II. ii4, higher concentration than the type region 26j:ih', type region force... (In a solid-state imaging device provided with an S readout section, the high G degree second conductive M of the signal readout section) type 2 A solid-state imaging device r'f characterized in that the region is in front ML: ?h, in contact with the loading/unloading device, and not in direct contact with the photoelectric conversion element [7].
JP58227156A 1983-12-01 1983-12-01 Solid-state image pickup device Pending JPS60119181A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58227156A JPS60119181A (en) 1983-12-01 1983-12-01 Solid-state image pickup device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58227156A JPS60119181A (en) 1983-12-01 1983-12-01 Solid-state image pickup device

Publications (1)

Publication Number Publication Date
JPS60119181A true JPS60119181A (en) 1985-06-26

Family

ID=16856369

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58227156A Pending JPS60119181A (en) 1983-12-01 1983-12-01 Solid-state image pickup device

Country Status (1)

Country Link
JP (1) JPS60119181A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6214462A (en) * 1985-07-12 1987-01-23 Toshiba Corp Solid-state image pickup device
JPH0253386A (en) * 1988-08-17 1990-02-22 Nec Kyushu Ltd Solid image pick-up element
JPH0423359A (en) * 1990-05-14 1992-01-27 Nec Corp Solid image-pick up element

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6214462A (en) * 1985-07-12 1987-01-23 Toshiba Corp Solid-state image pickup device
JPH0253386A (en) * 1988-08-17 1990-02-22 Nec Kyushu Ltd Solid image pick-up element
JPH0423359A (en) * 1990-05-14 1992-01-27 Nec Corp Solid image-pick up element

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