JPS60116716U - mixer circuit - Google Patents
mixer circuitInfo
- Publication number
- JPS60116716U JPS60116716U JP452084U JP452084U JPS60116716U JP S60116716 U JPS60116716 U JP S60116716U JP 452084 U JP452084 U JP 452084U JP 452084 U JP452084 U JP 452084U JP S60116716 U JPS60116716 U JP S60116716U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- mixer circuit
- input end
- mixer
- operational amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)
- Amplifiers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は基本的な演算増幅回路を示し、第2図は従来の
ミキサー回路例を示し、第3図はこの考案のミキサー回
路例を示し、第4図はこの考案のミキサー回路を構成す
る第1および第2のインピーダンス回路の具体例を示す
ものである。
1・・・再生アンプ、2・・・再生アンプの一方の入力
端、7・・・同他方の入力端、6・・・同出力端、3゜
8、 14. 16・・・抵抗、4・・・出力端子、5
・・・選択性帰還回路(第1のインピーダンス回路)、
9゜10.11,17,18,19・・・コンデンサ、
12・・・ミキサーアンプ、13・・・外部信号端子、
15・・・帰還用抵抗、20・・・第2のインピーダン
ス回路、T・・・テープ、H・・・再生ヘッド。Fig. 1 shows a basic operational amplifier circuit, Fig. 2 shows an example of a conventional mixer circuit, Fig. 3 shows an example of a mixer circuit of this invention, and Fig. 4 shows the configuration of a mixer circuit of this invention. A specific example of the first and second impedance circuits is shown. 1... Reproduction amplifier, 2... One input terminal of the reproduction amplifier, 7... The other input terminal of the same, 6... Output terminal of the same, 3°8, 14. 16...Resistor, 4...Output terminal, 5
... selective feedback circuit (first impedance circuit),
9゜10.11, 17, 18, 19... Capacitor,
12...Mixer amplifier, 13...External signal terminal,
15... Feedback resistor, 20... Second impedance circuit, T... Tape, H... Playback head.
Claims (1)
端に一方の信号源が接続され、他方の入力端に出力端か
らの帰還回路を構成する第1のインピーダンス回路が接
続された演算増幅回路と、一端がこの演算増幅回路の他
方の入力端に接続され、他端が他方の信号源に接続され
た第2のインピーダンス回路とて構成されたミキサー回
路。In a mixer circuit used in an electronic device, an operational amplifier circuit has one signal source connected to one input end, and a first impedance circuit forming a feedback circuit from the output end connected to the other input end; A mixer circuit configured as a second impedance circuit having one end connected to the other input end of the operational amplifier circuit and the other end connected to the other signal source.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP452084U JPS60116716U (en) | 1984-01-17 | 1984-01-17 | mixer circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP452084U JPS60116716U (en) | 1984-01-17 | 1984-01-17 | mixer circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60116716U true JPS60116716U (en) | 1985-08-07 |
Family
ID=30480173
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP452084U Pending JPS60116716U (en) | 1984-01-17 | 1984-01-17 | mixer circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60116716U (en) |
-
1984
- 1984-01-17 JP JP452084U patent/JPS60116716U/en active Pending
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