JPS60114058A - Traffic automatic processing device - Google Patents

Abstract

PURPOSE:To measure the traffic capacity automatically by reading, integrating and editing traffic data automatically and storing the data in the external memory device. CONSTITUTION:A level conversion control circuit LVC converts the level with call start information from a measuring lead. A CPU designates a circuit LVC with an address bus AB and scans the said information. Consequently, the said information is fetched in through an input-exclusive port circuit PIP and a data bus DB to the CPU and is stored in the non-stationary memory circuit. The call end information is also operated in the same way. Test item information from respective types of a test operation display circuit JKL is stored through the circuit LVC, a circuit PIP and a bus DB in the non-stationary memory circuit of the CPU. The CPU designates a lamp drive control circuit DRV for display through a bus AB and an output exclusive port circuit POP, and displays the read information on the circuit JKL. Next the CPU stores respective types of information in the non-stationary memory circuit through the bus AB and an external record control circuit ORRC in an external memory device OPRE.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a device for measuring the traffic capacity of various devices installed in a telephone exchange.

Conventionally, to measure this type of traffic, information was received from various devices installed in the telephone exchange and displayed on a frequency meter, and maintenance personnel read the contents and processed the integration of various traffic data. The disadvantage of this method is that it takes time and effort to measure traffic capacity.

SUMMARY OF THE INVENTION In order to solve the above-mentioned drawbacks, an object of the present invention is to provide an automatic traffic processing system capable of automatically reading, integrating and editing traffic data, and automatically measuring the amount of traffic by storing the data in an external storage device. The purpose is to provide a mu device.

In order to achieve the above object, an automatic traffic processing device according to the present invention includes a level conversion control circuit that receives a signal to be measured and performs level conversion, and an input-only port interposed between the level conversion control circuit, an address bus, and a data bus. a test operation display circuit for inputting various test items, displaying measurement item setting confirmation and fault indication; a display lamp drive control circuit for driving and controlling the lamps of the test operation display circuit; and a display lamp drive control circuit for controlling the lamps of the test operation display circuit. control circuit and address bus,
An output-only boat circuit interposed between the data bus, an external storage or recording device for storing measurement results, an external storage control circuit interposed between the external storage or recording device and the address bus and data bus, and a measurement reception A control circuit that scans information and various test information, performs calculations, and performs various controls, a fixed memory circuit, and a central processing circuit having a non-fixed memory circuit, and receives signals to be measured via a data bus and an address bus. The system is configured to obtain various traffic capacity measurements such as the number of operations of various devices installed in the telephone exchange and average holding time by controlling the system.

Hereinafter, the present invention will be explained in more detail with reference to the drawings.

FIG. 1 is a 7072 diagram showing an embodiment of an automatic traffic processing device according to the present invention.

This embodiment is an example in which information about call start and end is read from a device installed in a telephone exchange, such as a known call trunk (device to be measured), and the number of trunk activations and call hold time are measured.

When call start information is received from a measurement lead connected to a device under test (not shown), the level conversion control circuit LVO performs level conversion of the received information. The central processing circuit OPU specifies the level conversion control circuit LVO on the address bus AB by executing the processing of the fixed storage circuit, and scans the level-converted received information. Therefore, when the level conversion control circuit LVO receives call start information as described above, the one level converted information is transferred to the input-only boat circuit PIF data bus D.
The device number and call start time information are taken into the central processing circuit OPU via B and temporarily stored in a non-permanent storage circuit. Similarly, when the level conversion control circuit LVC receives call end information following call start information from the measurement lead, the information is temporarily stored in the non-fixed storage circuit by the same processing as above by the central processing circuit CPU. Ru.

Through this operation, data for calculating the number of trunk activations of the device under test and the call hold time is stored in the non-permanent storage circuit of the central processing circuit OT'U.

Next, when test item information is input from the various test operation display circuit JKL, the information is taken into the central processing circuit CPU via the level conversion control circuit LVO1 input dedicated boat circuit PIF and data bus DB. central processing circuit OPU
stores this test item information in a non-fixed storage circuit, reads it out to identify the test item, and reads out information corresponding to the test item from the non-fixed storage circuit. As a result, the central processing circuit CPU designates the display lamp drive control circuits DR, V via the address bus AB1 output dedicated boat circuit POP, and sends the read information to the display lamp drive control circuits DR, V. Display lamp drive control circuit DRY
displays information corresponding to the test item designated by the various test operation display circuit JKL on the various test operation display circuit JKL.

Next, the central processing circuit OPU is the various test operation display circuit JKL.
Address bus AB, external recording control circuit OR,
Specify an external storage device or an external recording device (hereinafter collectively referred to as "device OPR-E") via the RO, and record various information (the number of trunk activations and hold time information) to device 0PR.
To store or record in B.

When the device 1iOPRo is an external storage device, the various information in the external storage device is transferred to the external memory in the central processing circuit CPU via the external storage control circuit OPRO and the data bus D13 by specifying test items from the various test operation display circuit JKL. The stored information is stored in a fixed memory circuit, and sent to the display lamp drive control circuits DB and V via the data bus DB and the output-only boat circuit POP, and then sent to the display lamp drive control circuit DRV.
displays the information on various test operation display circuits JKL.

As described in detail above, according to the present invention, it is possible to realize a traffic processing device capable of measuring various traffic capacities such as the number of operations of various devices installed in a telephone exchange. Therefore, if this device is used, the traffic volume t
8- It can be measured efficiently, and it is possible to improve the conventional and time-consuming measurement method in which a maintenance person collects traffic from the frequency meter display.

[Brief explanation of the drawing]

FIG. 1 is a functional circuit block diagram showing an embodiment of an automatic traffic processing device according to the present invention. LVO...Level conversion control circuit PIF...Input-only port circuit JKL...Various test operation display circuit DRY...Display lamp drive control circuit POP...Output-only port circuit OPR/E...External Storage device opua...External recording control circuit CPU...Central processing circuit Patent applicant NEC Corporation Patent applicant NEC Engineering Co., Ltd. Agent Patent attorney Hisashi Inoro

Claims (1)

[Claims] a level conversion control circuit that receives a signal to be measured and performs level conversion; the level conversion control circuit and an address bus;
An input-only port circuit interposed between the data buses, a test operation display circuit that inputs various test items, displays setting confirmation of measurement items, and displays faults, and a display lamp drive that drives and controls the lamps of the test operation display circuit. A control circuit, an output-only port circuit interposed between the display lamp drive control circuit, an address bus, and a data bus, and an external i1F for storing measurement results. a storage or recording device, an external storage control circuit interposed between the external storage storage device, an address bus, and a data bus, and a control circuit that scans, calculates, and performs various controls on measurement reception information and various test information. ,
It includes a central processing circuit having a fixed memory circuit and a non-fixed memory circuit, and controls the reception of signals to be measured via a data bus and an address bus. An automatic traffic processing device characterized by obtaining various measured values of traffic capacity such as average holding time.