JPS60112370A - System for receiving facsimile signal whose redundancy is suppressed - Google Patents

System for receiving facsimile signal whose redundancy is suppressed

Info

Publication number
JPS60112370A
JPS60112370A JP58219991A JP21999183A JPS60112370A JP S60112370 A JPS60112370 A JP S60112370A JP 58219991 A JP58219991 A JP 58219991A JP 21999183 A JP21999183 A JP 21999183A JP S60112370 A JPS60112370 A JP S60112370A
Authority
JP
Japan
Prior art keywords
memory
circuit
reception
free space
flag
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58219991A
Other languages
Japanese (ja)
Inventor
Toshiya Takeuchi
竹内 俊也
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP58219991A priority Critical patent/JPS60112370A/en
Publication of JPS60112370A publication Critical patent/JPS60112370A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To attain Omsec reception by a small memory by checking memory use condition each completion of communication for one document, performing consecutive Omsec reception when there is free space in memory and by repeating wait action when there is no free space. CONSTITUTION:A modulation signal from a net controller 4 turns into binary no filler data 1 by a demodulator 5 and is stored in a memory 6. A memory control circuit 9 is always detecting free area in the memory. When the circuit 9 detects that free area in the memory can not receive data for one document, it commands a flag transmission circuit 10 to send out a flag, then the circuit 10 keeps transferring flags until there is free space found in the memory after detecting a mulit-page signal, holding the progress of procedure on the transmission side, and in the meantime, the circuit 9 performs recording processing and does not send out message confirmation field until it finds any free space in the memory. When memory storage quantity drops less than area limit value, the circuit 9 performs reception of data again.

Description

【発明の詳細な説明】 本発明は冗長度を抑圧したファクシミリ信号の受信方式
に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a facsimile signal reception system in which redundancy is suppressed.

多くのファクシミリ装置は1走査線を走査(読取および
記録)するのに各種機構的、電気的制約によシある一定
時間を必要としていた。これを最小伝送時間と言い、通
常のファクシミリでは5゜10、 20. 40ミ13
秒が一般的である。即ち、と 2れらの時間を保証する
ためにはl走査線の情報を送った場合に、その時間が最
少伝送時間よシ短くならないようにフィラーという符号
を付加している。このフィラを除去して、1走査線の情
報だけ?送るようにした伝送時間をゼロミリ秒(以下O
@ Secと略すンとし、この通信を0yytSeC通
信と言う。
Many facsimile machines require a certain amount of time to scan (read and record) one scanning line due to various mechanical and electrical constraints. This is called the minimum transmission time, and for normal facsimile, it is 5°10, 20. 40mi13
Seconds are common. That is, in order to guarantee these times, a code called filler is added so that when l scanning lines of information are sent, the time is not shorter than the minimum transmission time. Can you remove this filler and only have one scanning line of information? The transmission time for sending is set to zero milliseconds (hereinafter referred to as O).
It is abbreviated as @Sec, and this communication is called 0yytSeC communication.

第1図は読取データ(a)がM)IまたはMRの符号化
KAり冗長度抑圧されて(b)になっている。これを変
調回路(モデム)を通して送シ出すと1走査線の走査時
間は符号化後のピット数をモデムの伝送速度で割るとめ
られる。(C)の1はl走査線の情報で2がフィラーで
あシ、1と2を合せて最小伝送時間3を保証している。
In FIG. 1, the read data (a) is encoded by M) I or MR and the redundancy is suppressed to become (b). When this is sent through a modulation circuit (modem), the scanning time for one scanning line can be calculated by dividing the number of pits after encoding by the transmission speed of the modem. In (C), 1 is information for l scanning lines, 2 is a filler, and the combination of 1 and 2 guarantees a minimum transmission time of 3.

従来0i88C通信を行なう場合には、送信側、受信側
の双方に大容量のメモリを準備しておき、メモリ間のデ
ータ転送を読取、記録とは無関係に行なっていた。その
ため受信側にも送信側と同等規模の大容量のメモリを必
要とし、そのメモリも同時に他の用途に使えないという
欠点があった。
Conventionally, when performing 0i88C communication, large-capacity memories were prepared on both the transmitting side and the receiving side, and data transfer between the memories was performed regardless of reading and recording. For this reason, the receiving side also required a large capacity memory on the same scale as the transmitting side, and the disadvantage was that the memory could not be used for other purposes at the same time.

本発明はQ@ sec受俗において通信手順上でメモリ
のオーバーフローを防止し、記録と受信を同時に行なう
ことによシ限られたメモリ容量を有効に使用し、小規模
のメモリでQ@sec受信を実現することを目的とする
The present invention prevents memory overflow in the communication procedure in Q@sec communication, effectively uses limited memory capacity by simultaneously recording and receiving, and performs Q@sec reception with a small memory. The purpose is to realize the following.

本発明によるとある規定値以上の容量のメモリと、該メ
モリの使用状態を監視する回路と、制御手順においてフ
ラグを連続送出する回路を有し、前記メモリの使用状態
を1通分の通信が終了する毎にチェックし、次の1通分
が受けられる場合は制御信号を送出し、受けられない場
合にはフラグを連送し相手の手順の進行を止めてメモリ
が空くのを待つことを特徴とする冗長度を抑圧したファ
クンミ’J信号の受信方式が得られる。
According to the present invention, the present invention includes a memory having a capacity exceeding a certain specified value, a circuit for monitoring the usage status of the memory, and a circuit for continuously sending out a flag in a control procedure, and the usage status of the memory can be determined by one communication. It checks each time it is completed, and if the next one can be received, it sends a control signal, and if it cannot, it sends a flag continuously, stops the other party's progress, and waits for the memory to become free. A reception method for Fakunmi'J signals with suppressed redundancy, which is a characteristic feature, can be obtained.

すなわち本発明はQmSec 受信において、受信と記
録を同時に行なった場合にはMA、 MI(符号化方式
で冗長度抑圧をしたデータは原稿1枚当シA4判で約2
5KB、B4判で約3QKBになるという理論に基いて
おシ、1通を受信する毎に現在のメモリの使用状態が上
記のバイト数を確保できるか否かをチェ、りする。そし
て上記バイト数が確保できるならば受信側はMPS(マ
ルチ・ページ・シグナル)に対して直ちにMCF(メツ
セージ・コンファーメーション・フィールド)1出し、
次原稿のデータを受信する。また確保できない場合には
MPSに対するMCFの送出をフラグを連送することに
よって送信側を待たせておき、その間にメモリ内のデー
タを記録器に出力し上記バイト数のエリアが空いた時点
でMCFを送出する。このようにしてメモリに空がある
場合にはQmSec受信を連続的に行ない、空がない時
には待たせる動作を繰返すととによシ限られたメモリ容
量を有効に使用してQtrL86C受信を実現しようと
するものである。
In other words, in QmSec reception, the present invention provides MA and MI when receiving and recording are performed at the same time.
Based on the theory that 5KB is approximately 3QKB in B4 size, each time a message is received, it is checked whether the current memory usage state can secure the above number of bytes. If the above number of bytes can be secured, the receiving side immediately sends 1 MCF (Message Confirmation Field) in response to MPS (Multi Page Signal),
Receive data for the next manuscript. If the MCF cannot be secured, the sending side is kept waiting by continuously sending a flag to send the MCF to the MPS, and during that time, the data in the memory is output to the recorder, and when the area of the above number of bytes becomes free, the MCF is sent. Send out. In this way, if there is space in the memory, QmSec reception is performed continuously, and if there is no space, the waiting operation is repeated, and it is possible to effectively use the limited memory capacity and realize QtrL86C reception. That is.

次に本発明の実施例について図面を参照して説明する。Next, embodiments of the present invention will be described with reference to the drawings.

第2図は本発明の一実施例のブロック構成図で、網制御
部4を通して入ってきた変調信号は復調器5で2値のフ
ィラーなしのデータ1になシメモリ6に蓄積される。メ
モリ6は常にメモリ制御回路9によシ監視されておシ、
常にメモリの余シエリアをメモリ制御回路9は検出して
いる。7は復号器であシ、メモリ6から読出されたデー
タ1は復号器7によって復号化され、記録回路8で記録
器11に出力される。
FIG. 2 is a block diagram of an embodiment of the present invention, in which a modulated signal received through a network control unit 4 is stored in a memory 6 in a demodulator 5 as binary data 1 without filler. The memory 6 is constantly monitored by the memory control circuit 9.
The memory control circuit 9 always detects the remaining memory area. 7 is a decoder, and the data 1 read from the memory 6 is decoded by the decoder 7 and outputted to the recorder 11 by the recording circuit 8.

メモリ制御回路9はメモリの余りが次の1通分のデータ
を受信出来ないことを検出すると、フラ略(1)を検出
後メモリが空くまでフラグを連送してメツセージ・コン
ファーメーションフィールド(以下MCFと略す)の送
出を行なわない。
When the memory control circuit 9 detects that the remaining memory cannot receive data for the next one message, it detects the flag (1) and continuously transmits the flag until the memory becomes free and fills the message/confirmation field ( (hereinafter abbreviated as MCF) is not transmitted.

第3図は伝送制御手順の進行とメモリの蓄KA状態を表
わしている。(a)の12は送信側、13は受信側であ
シ、送信側から送られてきたデータ14によシ(b)メ
モリ蓄積量21は増加する。1通口の通信が終了して、
送信側からMPS15が来ると、受信側13は記録動作
はまだ継続しているがメモリの余シが一通分以上あるた
めMCF16を送出する。この動作を繰返して、−通受
信後のメモリの空きエリアが(b)の20の限界値を超
えて22の(lt114°メモリオーバフロー19に近
づくと、受信側はMPS15検出後フ検出後出ラグ送出
回路10グ17を送出し、送信側の手順の進行を止めて
おき、その間に復号化、記録処理を行ないメモリの余シ
が20ライン以下になるまでMCFを送出しない。セし
て20を切った後再度データ14の受信を行なう。
FIG. 3 shows the progress of the transmission control procedure and the storage KA state of the memory. In (a), 12 is the transmitting side, 13 is the receiving side, and (b) the memory storage amount 21 increases depending on the data 14 sent from the transmitting side. After one communication is completed,
When the MPS 15 is received from the transmitting side, the receiving side 13 sends out the MCF 16 because the recording operation is still continuing but there is more than one space left in the memory. By repeating this operation, when the free area of the memory after communication and reception exceeds the limit value of 20 in (b) and approaches 22 (lt114°memory overflow 19), the receiving side will output lag after MPS15 detection. The sending circuit 10 sends the signal 17, stops the procedure on the sending side, and during that time performs decoding and recording processing, and does not send out the MCF until the remaining space in the memory becomes 20 lines or less. After disconnecting, data 14 is received again.

このようにしてメモリの制御と伝送手順を制御すること
によシ比較的小規模なメモリによって0rrLSeCの
受信が可能になる。
By controlling the memory and the transmission procedure in this way, it is possible to receive OrrLSeC with a relatively small memory.

本発明の他の実施例として、メモリを他の目的で使用し
ている場合に、その余シエリアを検出し “てQrrL
Sec受信を行なうことが考え、られる。即ちメモリの
使用状況に応じて効果的に空いたメモリエリアを活用す
ることができる。
In another embodiment of the present invention, when the memory is used for other purposes, the remaining area is detected and QrrL
It is considered and possible to perform Sec reception. That is, free memory areas can be effectively utilized depending on the memory usage status.

本発明は以上説明したようにQ@Sec受信を限定され
たメモリの容量で実現することができる効果がある。
As explained above, the present invention has the advantage that Q@Sec reception can be realized with a limited memory capacity.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)(b)(C)は冗長度を抑圧したファクシ
ミリ4・・・・・・網制御部、訃・・・・・復調回路、
6・・・・・・メモリ、7・・・・・・復号器、8・・
・・・・記録回路、9・・・・・・メモリ制御回路、1
0・・・・・・フラグ送出回路、11・・・・・・記録
器。 篤 / 図 z 3 図
Fig. 1 (a), (b), and (C) show a facsimile machine 4 with reduced redundancy: a network control section, a demodulation circuit,
6...Memory, 7...Decoder, 8...
...Recording circuit, 9...Memory control circuit, 1
0... Flag sending circuit, 11... Recorder. Atsushi / Figure z 3 Figure

Claims (1)

【特許請求の範囲】[Claims] ある規定値以上の容量のメモリと、メモリの使用状態を
監視する回路と、制御手順においてフラグを連続送出す
る回路を有し、前記メモリの使用状・態 を1通分の通
信が終了する毎にチェックし、次の1通分が受けられる
場合は制御信号を送出し、受けられない場合にはフラグ
を連送し相手の手順の進行を止めてメモリが空くのを待
つことを特徴とする冗長度を抑圧したファクシミリ信号
の受信方式。
It has a memory with a capacity greater than a certain specified value, a circuit that monitors the usage status of the memory, and a circuit that continuously sends out flags in the control procedure, and the usage status of the memory is checked every time one communication is completed. If the next message can be received, it sends a control signal, and if it cannot, it sends a flag repeatedly, stops the other party's procedure, and waits for the memory to become free. A facsimile signal reception method that suppresses redundancy.
JP58219991A 1983-11-22 1983-11-22 System for receiving facsimile signal whose redundancy is suppressed Pending JPS60112370A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58219991A JPS60112370A (en) 1983-11-22 1983-11-22 System for receiving facsimile signal whose redundancy is suppressed

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58219991A JPS60112370A (en) 1983-11-22 1983-11-22 System for receiving facsimile signal whose redundancy is suppressed

Publications (1)

Publication Number Publication Date
JPS60112370A true JPS60112370A (en) 1985-06-18

Family

ID=16744209

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58219991A Pending JPS60112370A (en) 1983-11-22 1983-11-22 System for receiving facsimile signal whose redundancy is suppressed

Country Status (1)

Country Link
JP (1) JPS60112370A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62152244A (en) * 1985-12-26 1987-07-07 Yamatake Honeywell Co Ltd Communication control system
US4975783A (en) * 1988-07-06 1990-12-04 Ricoh Company, Ltd. Facsimile machine having error correction mode
US5220437A (en) * 1989-11-30 1993-06-15 Matsushita Graphic Communication Systems, Inc. Secondary scanning control for use in facsimile equipment having redundancy suppressing coding system
US5315403A (en) * 1991-03-22 1994-05-24 Canon Kabushiki Kaisha Facsimile apparatus in which input to memory is controlled based upon capacity of external storage device
US5748333A (en) * 1992-12-11 1998-05-05 Canon Kabushiki Kaisha Image communication apparatus having the function of ECM (error correction mode communication)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62152244A (en) * 1985-12-26 1987-07-07 Yamatake Honeywell Co Ltd Communication control system
JPH0377700B2 (en) * 1985-12-26 1991-12-11 Yamatake Honeywell Co Ltd
US4975783A (en) * 1988-07-06 1990-12-04 Ricoh Company, Ltd. Facsimile machine having error correction mode
US5220437A (en) * 1989-11-30 1993-06-15 Matsushita Graphic Communication Systems, Inc. Secondary scanning control for use in facsimile equipment having redundancy suppressing coding system
US5315403A (en) * 1991-03-22 1994-05-24 Canon Kabushiki Kaisha Facsimile apparatus in which input to memory is controlled based upon capacity of external storage device
US5748333A (en) * 1992-12-11 1998-05-05 Canon Kabushiki Kaisha Image communication apparatus having the function of ECM (error correction mode communication)

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