JPS60106163A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To enable to easily obtain cell capacities larger than the cell capacities, which are decided by the precision of patterning, in the manufacturing method of a semiconductor device by a method wherein a process, wherein polycrystalline silicon is selectively grown on the upper surface and sides of the lower electrode or only on the sides thereof and the area of the electrode located in between the mutually adjacent cell capacities is enlarged, is inserted in the manufacturing method. CONSTITUTION:The interval between mutually adjacent cell capacities 7 and 8 which are both formed by the ordinary process, is decided by the precision of patterning. Then, when polycrystalline silicon is grown on the whole surface of the substrate, the polycrystalline silicon doesn't deposit on the SiO2 films but deposits only on the polycrystalline silicon films and is selectively grown. Polycrystalline silicon films 9 and 10 are deposited on the upper surfaces and sides of the electrode polycrystalline silicon films by a selective growth method and the area of the lower electrode located in between the mutually adjacent cell capacities 7 and 8 is enlarged. When polycrystalline silicon was selectively grown only on the sides of the electrode polycrystalline silicon films 9 and 10, SiO2 films 11 are coated on the polycrystalline silicon films at a point before a patterning of electrode polycrystalline silicon is performed, and by making polycrystalline silicon grow after a patterning for electrode formation was performed, polycrystalline silicon films 12 and 13 added to the electrode polycrystalline silicon films are obtained. After the lower electrode with the area enlarged in such a way was formed, an insulating film 14 and an upper electrode 15 are formed thereon and the purposive cell capacities larger than the cell capacities 7 and 8 formed by the ordinary process are obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a method of manufacturing a semiconductor device having a charge storage capacity (cell capacity), such as a Mis-type RAM.

(2) Background of the Technology It is necessary to make the cell capacitance as large as possible as much as the degree of integration allows, but the distance between adjacent cell capacitances is determined by patterning accuracy and is limited to about 1 μm at the current production level. Due to the high integration of recent Guinamink RAMs, the memory cells have become smaller and the amount of stored charge has decreased, so how to increase the capacity with smaller cells has become a major issue.

(3) Prior art and problems Various attempts have been made to increase cell capacity, but in the case of a tank-type capacitor, three layers of polysilicon film are used, and both electrodes of the capacitor are made of polysilicon film. In some cases, this goal has been achieved by devising the layout within the memory cell, but the three-layer polysilicon process is complicated.

There are also examples of using tantalum oxide (T"a'b O5-), which has a dielectric constant five times or more that of silicon oxide, as an insulating film, but this requires a large number of masks and complicates the process.

Furthermore, cell capacitance of the type that uses an inversion layer on the substrate surface for the lower ll electrode has been devised by adding junction capacitance, etc.
For either type of capacitance, it is necessary to consider the increase in geometric area.

(4) Purpose of the Invention The present invention provides a manufacturing method that can increase the cell capacity by keeping the pattern size of a memory cell constant, or conversely, can reduce the cell pattern while keeping the cell capacity constant. The purpose is to

(5) Structure of the Invention According to the present invention, an electrode is formed on a semiconductor substrate using a polysilicon film to cover at least one layer of insulation and constitute a capacitor, and then on the top and side surfaces of the electrode. Alternatively, this can be achieved by inserting a step of selectively growing polysilicon on the side surfaces to increase the area of the electrode. Polysilicon is an insulating film, such as silicon oxide (SiOz
) It does not grow on the film, but grows selectively on the polysilicon film. The present invention takes advantage of this fact.

(6) Embodiments of the Invention An embodiment of the present invention will be described for a stacked cell. 1st
The figure shows the main part of the cross section. 1 is a p-type silicon substrate, 2 is a source region, 3 is a drain region, 4 is a gate made of polysilicon, 5 is a field oxide region (SiOz film), 6 is a SiO2 film, and 7 is a polysilicon film for forming a cell capacitance. The lower electrode made of silicon, 8, indicates that of the adjacent cell capacitance. Up to this point, the spacing between the adjacent cell capacitors 7 and 8 is determined by the patterning accuracy. Next, when polysilicon is grown on the entire surface of the substrate, it is selectively grown only on the polysilicon film without being deposited on the Sio2 film. In this case, the film thickness viscosity is determined by the selective growth rate of polysilicon and is possible up to about O6lμrn, which is about one order of magnitude better than the patterning accuracy, making it possible to control the spacing between adjacent cell electrodes determined by the patterning accuracy. It can be reduced with . FIGS. 9 and 10 show a polysilicon film newly deposited on the top and side surfaces of the electrode polysilicon film by selective growth, indicating that the area of the lower electrode of adjacent cell capacitors has been expanded.

FIG. 3 shows a modification in which polysilicon is selectively grown only on the side surfaces of the electrode polysilicon film. In this case, before patterning the electrode polysilicon, 5i0
2 film 11 is deposited and polysilicon is grown after patterning for electrode formation, an additional 'polysilicon film 1
2.13 can be obtained. After the lower electrode having the enlarged area is formed, an insulating film 14 is formed on the lower electrode as shown in FIG. An upper electrode 15 is formed to constitute a capacitor.

Although the embodiment describes the manufacturing process of a stack type cell, the present invention is also applicable to other types of cells.

(7) As described in detail of the invention, a cell capacity larger than the capacity determined by patterning accuracy can be easily obtained. According to the present invention, since the peripheral area of the capacitive electrode is increased, the effect of increasing the capacitance is extremely large.

[Brief explanation of the drawing]

FIG. 1 shows a main part of a 1vi surface of a semiconductor substrate in a state where formation of a lower electrode of a cell capacitance has been completed for a cell portion of a dynamic MO3RAM. FIGS. 2 and 3 are cross-sectional views illustrating the formation of the lower electrode according to the present invention in addition to the steps up to FIG. 1. 3 is a drain region, 4 is a polysilicon film (gate), 5 is a field oxide film, and 6 is a drain region.
is a silicon oxide film, 'N; 1.2.13 is a polysilicon film, 14 is an insulating film, and 15 is a conductive film (upper electrode of cell capacitance).

Claims (1)

[Claims] An electrode that covers at least an insulating film and constitutes a capacitance is formed on a semiconductor substrate using a polysilicon film, and then polysilicon is selectively grown on the top and side surfaces of the electrode, or only on the sides to reduce the area of the electrode. A method of manufacturing a semiconductor device, comprising a step of enlarging the device.