JPS5999894A - Color signal generating circuit - Google Patents

Abstract

PURPOSE:To obtain a desired chrominance carrier signal with a simple circuit constitution by adjusting a crest level signal having N-set of sampling points per one period of a chrominance subcarrier wave in response to the chrominance carrier signal having a desired color phase and amplitude to eliminate high speed and complicated arithmetic processing. CONSTITUTION:Crest values Va, Vb from analog voltage generators 53, 54 are A/D-converted at A/D converters 55, 56, and digital peak value data Da, Db are inputted to data input terminals 41, 42. The polarity of the data Da, Db is inverted respectively at complement operating sections 43, 44, and digital data Dc, Dd are outputted. Peak value data Da, Dd at four sampling points are applied to selecting terminals (a)-(d) of a selecting switch 45. The switch 45 is controlled by switching sequentially by an output of a quinary counter 47 inputting a frequency 4fsc four times the chrominance carrier frequency, a digital chrominance carrier signal having 4fsc of sampling frequency is outputted and added to a digital luminance signal at an adder 48.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a color signal generation circuit for obtaining a color television video signal that reproduces desired colors.

[Background technology and its problems]

Power 2 - A color signal generation circuit is used to generate a color television video signal for reproducing a desired color for special effects of television images or for special purposes of image transmitting and receiving equipment.

As an example of this color signal generating circuit, the one shown in FIG. 1 is well known in the art. This first
The color signal generation circuit shown in the figure generates color difference signals B-Y and R-.
Color subcarrier using Y'i? By modulating, the carrier color signal and iη of the desired color phase, and the luminance signal tone I
After that, I got the yfa issue.

That is, color difference signal B - Y light i optical path circuit L and color difference signal R
, -Y generating circuit 2 is fully equipped with a town lantern resistor and the like at 515 parts, and outputs high color difference signals B-Y and R-Yi at a predetermined level to reproduce a desired hue tone. These signals B-Y and R-Y are transmitted to the first balanced modulator 4 of the encoder circuit 3.
+1 and 1 are respectively sent to the second balanced modulator 5. The iB signal from the color subcarrier input terminal 6) is input to the iV) balanced modulator 4, and the signal from the input terminal 6 to the second -IF balanced modulator 5 is input to the phase shifter 7. A signal whose phase is shifted by 90 degrees is input. The outputs from the first and 20th balance equalizers 4 and 5 are mixed by a 1 adder 8, and a color subcarrier frequency □ component to be applied to a band filter 9 is output. The carrier color signal from the second pass filter 9 is not sent to the mixing circuit 10, but is mixed with the luminance signal Y from the input terminal 11 and sent to the output terminal 12.
A variable resistor 13 for level adjustment is connected to the mixing circuit 10.

A power signal generation circuit having such a structure has the drawback that, for example, the hue of the reproduced color changes due to temperature changes due to the temperature characteristics of the electronic components used.
The analog circuit configuration improves stability, but if you try to achieve advanced video effects, the circuit configuration becomes extremely complex and requires expensive electronic components with high characteristics.

Therefore, a color signal generation circuit such as the one shown in FIG. 2 has been proposed, which uses digital signal processing to generate color signals as described above. In this FIG. 2, the input terminal 21 of the address calculation section 20 is connected to the D?? The input terminal 22 is supplied with a digital signal of a constant angle corresponding to the phase angle P advance for each telling, and the input terminal 23
is supplied with a clock signal. In the address calculation section 20, the constant angle digital signal is supplied to an adder 25, the length chronograph signal is supplied to a register 26, and the adder 25 is supplied with the constant angle digital signal.
5 and the register 26 constitute a kind of □ accumulation circuit.One thing is that every time the υ'-guk° signal is inputted in the above-mentioned sun, the above-mentioned minus foot angle is cumulatively added. of the angle,
Digital 6. This signal 'i' is sent to the IJq calculator 21 and added to the digital signal indicating the color phase angle, Cυ, the digital signal indicating the angle address. Based on the angle address obtained in this way, for example, the sine wave ROM (read only memory) 20 in which the peak value data at multiple pumping points of the sine wave is not recorded is read out, and the desired force 2-phase is obtained. A digital color signal (carrier color signal) is obtained.

Here, by using the symmetry of the sine wave, the entire 360° range N
θ° instead of sampling wave height data
1. Store data in the range of ~90° in the sine wave ROM 30. The length in-cosine address converter 31 and the Calo subtracter 32 are used to obtain substantially the entire range of 3600 humbling data. That is, when the address is within the range of 90° to 180° or 2700° to 360°, the address conversion is performed as follows: Perform the corresponding address translation,
When the angle address is in the range of 18.00 to 360 degrees, the adder/subtractor 32 subtracts the insertion signal from the input terminal 33 and the digital carrier color signal.

In this case, the angle address digital signal from the address calculation section 20! The address converter 31 is operated to generate a sine wave R.
The sine wave sampling peak value data sent to the OM 30 and exposed from the ROM 30 is multiplied by the chroma amplitude data from the υ input terminal 35) by the multiplier 34, and then
The digital color composite video signal sent to the adder/subtractor 32 is converted into an analog color composite video signal by a digital-to-analog converter (D-A converter) 36, and is sent to the output terminal 3γL. It is taken out. □ Since the color signal generation circuit having the above configuration performs the formation of the carrier color signal by digital signal processing, it has excellent stability and can easily achieve high precision. However, not only is addition and subtraction processing required for each buzzing/pulling clock input, but also high-speed multiplication is required for each buzzing clock input in the multiplier 34, so a high-speed arithmetic element is required. Furthermore, since the circuit configuration is complicated, the cost is high.

[Purpose of the invention]

The present invention has been made in view of the above-mentioned circumstances, and has a simple circuit configuration that allows digital signal processing M for color signal generation to be performed without requiring high-speed calculations, resulting in high stability and high precision. The purpose of the present invention is to provide a color signal generation circuit that can perform DI to realize advanced video effects.

[Summary of the invention]

In order to achieve the above object, the color signal generation circuit according to the present invention divides one period of a reference color subcarrier into N (N is a natural number), and generates a carrier color signal with a desired color phase and amplitude. The peak value level signals obtained by sampling at each of the N division points are obtained from the level generation circuit, and the peak value level signals at each of the above-mentioned lean-brig points are outputted from the level generation circuit. A signal is supplied to the changeover selection switch, and the color subcarrier frequency fsc
J2, f+ with a black signal with a frequency Nfsc that is N times higher than
: By sequentially and repeatedly extracting each peak value level signal, a carrier color signal having a -1-th desired color phase and amplitude is formed.

〔Example〕

FIG. 3 is a block circuit diagram showing an embodiment according to the present invention. In this embodiment, the four sampling points shown on the right and 9 are arranged at equal intervals (900 intervals) per period of the color subcarrier. In other words, four length amplifiers are generated per period Tsc at regular intervals, for example, at intervals of a phase difference of 900 with respect to the reference color subcarrier sc shown in FIG. points, for example each with a phase of 900
．． 18o0.2700.3600 (=00)(7)%
The mA values sampled at 97 link points Pa, Pb, Pc, and Pd are Va, Vb, Vc, respectively.
Let it be Vd.

These wave sieve values Va, vb, Vc, Vd are digitized wave value data Da, Db, Da,
Dd? As is clear from Figure 4, there is a relationship of Va=-Ve and vb=-vci.
) Create digital wave peak value data Da and Dbk corresponding to h, Va, and vb first, and perform complement calculation on the remaining data Dc and Dd! I'll try to get 7'i'L↓.

In the embodiment circuit of FIG. 3, two data input terminals 4
1.42, the above two digital peak value data Da
, Db are supplied. These data Da and Db are sent to the complement calculation units 43 and 44, and the sign of the valley data is inverted! To do it! , 9, data D c and D d are obtained, respectively. That is, when each digital wave peak value day and night are expressed in binary numbers of two's complement, for example, the complement calculation units 43 and 44 can be constructed of a whole egg 3A for 1 addition such as an inverter, and a device.

Each wave height value data Da at these 41 length knobling points.

Db, Dc, and Dd are supplied to four selection terminals a, b, and c of a selection switch 45, and are supplied to the four selection terminals a, b, and c of a selection switch 45, and are output from a quaternary counter 47 that performs a digital count operation on this clock signal. The selection terminals a, b, c, and d of the selection switch 45 are sequentially controlled by the count output of the selection switch 45.The selection switch 45 outputs the above-mentioned peak value data Da, Db, Dc, and Dd at a cycle of 1/47sc.
are sequentially and alternately selected, that is, a digital carrier color signal having a high knob ring frequency of 4 fsc is output. This digital carrier color signal is sent to the adder 4
8 and is digitally added to the digital luminance signal from the t'L1 luminance signal input terminal 49, resulting in a digital color composite image. This gauge digital color composite video signal (1 digital-to-analog converter CD=A converter) is sent to 50, converted to an analog Cassie composite video signal, and taken out from an output terminal 51 (Z).

Now, go to the peak value data input terminals 41 and 42!
Digital wave height value data Da to be provided by L.

Db can be obtained using the C7) method, but
For example, in the example shown in FIG. 3, a variable resistor is used for analog voltage generators 53 and 54' that can change the output to -1JjEfl', and these voltage generators 53 and 54 output the peak values Va and Vb. The corresponding voltage is 71
．． They are output and sent to analog and digital converters (A=D converters) 55 and 56, respectively, and digital wave height □ value data Da and D are output from the A-'D converters 55 and 56.
b I got money.

In addition, using ROM (Read Only Memory), PLA (Programmer Login Array), etc., the above digital wave peak value data Da, Db can be read by inputting the Munsell color, sample number, etc. from the sound keyboard. It is also possible to configure a data generation circuit that allows the above data to be extracted, and to obtain the above-mentioned data Da and Db from this data generation circuit.

Note that the number of bits of the digital peak value data D a "I) d handled by the circuit of FIG.
If a signal is used, 1 bit of the above 8 bits is a positive bit, a negative bit is set as a length in bit, and the code is 7 bits digital data. The digital luminance signal must be 8-bit data such that the addition result in the adder 48 does not cause an overflow within the range of 8 bits and does not become a negative number. The color subcarrier S
Regarding the phase of C, it is preferable to make 0°, which is the reference of the waveform itself, coincide with, for example, the Q axis, I axis, BY axis, RY@, etc. from the viewpoint of facilitating color specification. 1. We will explain the case where the Kaede sub-conveyance line SC is set in the same phase as the non-norar bar and matched with the OO2-(R-Y) axis, which is the phase reference. The carrier color signal C is shown separated into a first carrier wave component SCa having the same phase as the color burst, and a second carrier wave component SCb having a delay of 990° phase from the color burst. From the fifth-
Momakura sword: Nako sea urchin, top, record wave high value V, a, V, b
are the first and second carrier components SCa, respectively.
The amplitude value of SC'b (/l: corresponds.

FIG. 6 shows these carrier wave components S Ca , S (,
b Oba These bettas. The lengths of the torques U a, U b are equal to the respective wave height values Va, Vb, and
These torques P, which are equal to the initial phase of s'cb, correspond to the carrier color signal C in FIG. 5, and by rotating them, the respective waveforms SCa, SCb
, C.

Here, the first carrier wave component SC'a is set to have the same phase as the color burst (LL), and the above pect/
Ua is located on the -(B-Ly) axis.

Therefore, with B-Y411 as the reference phase of 00°, the above conditions are obtained. In this figure 7, O0 is the B-Y axis, 900
is R=Y axis, Be'I / l / Ua is 180°
In the direction, vector Ub appears in the 90° direction. Therefore, the desired color '1. When you want to obtain a W-signal, you can easily obtain a carrier color signal based on the level of the color difference signal B-'Y and the level of the color difference signal R-Y. The level may be set to -Va, and the level of the RY signal may be set to vb.

If you follow the book explained above, the book has a complex structure and can be explained at high speed! This eliminates the need for a multiplier, making it extremely easy to use! Gate circuit configuration: digitally P, C
, M car - capable of generating composite video signals. In addition, the 7" signal generation circuit using alarm log signal processing has a high stability, high precision, and allows for the creation of advanced video effects.・Divide one cycle of the color subcarrier and the Y wave into four equal parts and set four sampling points, each of which has two mampling peak values that are 90 degrees out of phase with each other! '1. By taking the complements, the highest values of the remaining two sang waves are calculated, so
A transport color store name can be formed using two pieces of data t5 at the desired color phase, the number of data is small, and the entire μ
The configuration can be simplified by nine steps.

In addition, the above 41vAcoy ~ Pulling wave height value monitor D.
, Db, D・t, D cl't (they may be obtained for each side, for example, as shown in FIG. It outputs voltages that correspond to wave cylinder values V a , V h , V c , and V d , and these four analog-to-digital converters (A-D converters) 65.ε6.
6γ and 68 respectively to send digital data Da,
When converting into Db, Da, Dd, in the L oCC, the anolog pressure generators 61 and 62 and the part ii J resistors are connected to each other ((( The analog voltage generators 63 and 64 also have a similar interlocking relationship in opposite directions.
Dd is - to the four selection terminals a to d of the selection switch 45.
The signal processing is similar to that of the embodiment shown in Fig. 3 above, except that f, n, and t are sent respectively. L.

Ma/ko1. , J-, In the above embodiment, the color signal generation of the NTSC system is -T-j, but the digital data Da supplied to the input terminal 41 is inverted every horizontal period to generate a color difference signal. B-Y component is 180 per horizontal period
Due to the inversion structure, application to the PAL system becomes a QJ function. The communication 11J to the PAL system controls the operation of the quaternary counter 47 that controls switching of the selection switch 45, so that the selection order of the terminals of the selection switch 45 is a
, b, c, d and Crb+a+d may be alternately switched every water period. .

Furthermore, the number N of sampling points set at fixed intervals of 1 per period of the color subcarrier can be set to any natural number in addition to 4, but It is preferable to set the number to an even number in consideration of negative inversion, and furthermore, to set the number to an integer multiple of 4 in consideration of color vector composition using orthogonal vectors as explained in conjunction with FIGS. 5 to 7. Eh; I admire T2f more.

[Invention・″,)@ka]

According to the color signal generation circuit of the present invention, one of the color subcarriers
By adjusting the peak value level signals at N points per period according to the desired color phase and amplitude of the carrier color signal, it is possible to eliminate the need for high-intensity and complicated arithmetic processing such as multiplication. Without doing, Nfsc's black,
Since the desired carrier color signal can be obtained by simply sequentially reading out the signals, highly stable, highly accurate, and high quality color video effects can be achieved with a simple circuit configuration.

[Brief explanation of the drawing]

I'll take care of you in Figure 1 and LU in Figure 2! ↓Glock circuit diagram showing different examples of conventional color signal generation circuits. Figure 3 is a Glock circuit diagram showing a color signal generation circuit as an embodiment of the present invention. Figures 4 to 7 are the circuits shown in Figure 3. FIG. 8 is a circuit diagram showing the main part of an embodiment of the music according to the present invention. 41.42... Floater input terminal 43.44... Complement calculation unit 45... Selection switch 46... Automatic check input terminal 41... Quaternary counter 48... Adder 50... Digital-to-analog converter 51...
Output terminals 53, 54, 61 to 64...Analog voltage generator 55
, '56.65 ~ [5B...Analog-digital converter patent applicant Mi Koike Patent attorney Sony Corporation representative

Claims (1)

[Claims] N sampling points (N is a natural number) are set at regular intervals for one period of the color subcarrier, and the peak value level signal at each sampling point is obtained for the carrier color signal of the desired color phase and amplitude. and a selection switch means for sequentially selecting and extracting the peak value level signal at each sampling point from the level generation circuit using a clock signal having a frequency NfsC which is N times the color subcarrier frequency fsc. A color signal generation circuit configured to form a carrier color signal of the desired color and amplitude by the output from the switch means.