JPS599616U - Distortion reduction circuit for frequency modulated wave signals - Google Patents

Distortion reduction circuit for frequency modulated wave signals

Info

Publication number
JPS599616U
JPS599616U JP10391782U JP10391782U JPS599616U JP S599616 U JPS599616 U JP S599616U JP 10391782 U JP10391782 U JP 10391782U JP 10391782 U JP10391782 U JP 10391782U JP S599616 U JPS599616 U JP S599616U
Authority
JP
Japan
Prior art keywords
frequency modulated
modulated wave
wave signal
amplifier
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10391782U
Other languages
Japanese (ja)
Other versions
JPH0325344Y2 (en
Inventor
勲 増田
西川 和典
岩崎 善樹
昭治 植野
古村 誠
Original Assignee
日本ビクター株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本ビクター株式会社 filed Critical 日本ビクター株式会社
Priority to JP10391782U priority Critical patent/JPS599616U/en
Publication of JPS599616U publication Critical patent/JPS599616U/en
Application granted granted Critical
Publication of JPH0325344Y2 publication Critical patent/JPH0325344Y2/ja
Granted legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図A−Eは夫々変調信号と歪の無いときの周波数変
調信号及びそのFM復調出力信号と歪の  ・あるとき
の周波数変調波信号及びそのFM復調出力信号との夫々
波形の一例を示す図、第2図は本考案回路を本出願人が
先に提亭した情報信号記録円盤再生装置に適用したとき
の一実施例を示すブロック系統図、第3図は本考案回路
の一実施例を示す回路図、第4図A〜Dは夫々第3図図
示回路の動作説明用信号波形図である。 1・・・情報信号記録円盤(ディスク)、2・・・再生
針、9・・・ピックアップ回路、110・・・歪低減回
路、1゛2・・・リミッタ、13・・・FM復調回路、
14・・・復調信号出力端子、15・・・周波数変調波
信号入力端子、16・・・矩形波出力端子、Ql・・・
増幅用NPN トランジスタ、R1,R2・・・ベース
バイアス用抵抗、VR・・・ベースバイアス用可変イン
ピーダンス素子、R5,R6・・・積分回路用抵抗、C
4・・・積分用コンデンサ。
Figures 1A to 1E show examples of the waveforms of a modulated signal, a frequency modulated signal when there is no distortion, an FM demodulated output signal thereof, a frequency modulated wave signal when there is distortion, and an FM demodulated output signal, respectively. 2 is a block system diagram showing an embodiment of the circuit of the present invention applied to an information signal recording disk reproducing device previously proposed by the applicant, and FIG. 3 is an embodiment of the circuit of the present invention. FIGS. 4A to 4D are signal waveform diagrams for explaining the operation of the circuit shown in FIG. 3, respectively. DESCRIPTION OF SYMBOLS 1... Information signal recording disk (disc), 2... Reproduction needle, 9... Pick-up circuit, 110... Distortion reduction circuit, 1゛2... Limiter, 13... FM demodulation circuit,
14... Demodulated signal output terminal, 15... Frequency modulated wave signal input terminal, 16... Rectangular wave output terminal, Ql...
NPN transistor for amplification, R1, R2... Resistor for base bias, VR... Variable impedance element for base bias, R5, R6... Resistor for integration circuit, C
4... Integrating capacitor.

Claims (3)

【実用新案登録請求の範囲】[Scope of utility model registration request] (1)可変バイアス回路を有しており周波数変調波信号
が供給される増幅器と、該増幅器の出力信号を矩形波に
変換し該矩形波をFM復調回路へ出力するリミッタと、
該周波数変調波信号に歪が含まれているときに該増幅器
の可変バイアス[」路を可変制御して該増幅器を上記歪
を打消すような入出力特性をもつ非線形領域で動作させ
る制御手段とよりなり、該増幅器より歪が低減された周
波数変調波信号を取り出すよう構成した周波数変調波信
号の歪低減回路。
(1) an amplifier having a variable bias circuit and supplied with a frequency modulated wave signal; a limiter converting the output signal of the amplifier into a rectangular wave and outputting the rectangular wave to an FM demodulation circuit;
control means for variably controlling a variable bias circuit of the amplifier to operate the amplifier in a nonlinear region having input/output characteristics that cancel out the distortion when the frequency modulated wave signal includes distortion; A frequency modulated wave signal distortion reduction circuit configured to extract a frequency modulated wave signal with reduced distortion from the amplifier.
(2)該制御手段は、該リミッタあ出力矩形波を積分し
て該矩形波の平均直流レベルを得て、予め定めた一定値
に対する該平均直流レベルの変化により該増幅器が上記
非直線領域で動作するように該可変バイアス回路を制御
する積分回路である実用新案登録請求の範囲第1項記載
の周波数変調波信号の歪低減回路。
(2) The control means integrates the output rectangular wave of the limiter to obtain an average DC level of the rectangular wave, and controls the amplifier in the non-linear region by changing the average DC level with respect to a predetermined constant value. The distortion reduction circuit for a frequency modulated wave signal according to claim 1, which is an integrating circuit that controls the variable bias circuit to operate.
(3)該周波数変調波信号は等角速度方式の記録円、 
  盤から再生された周波数変調波信号であり、該制御
手段は記録の再生トラックが予め定めた一定の直径値よ
りも内周側のトラックであるときに、該増幅器が上記非
直線領域で動作するように該可変バイアス回路を制御す
る手段である実用新案登録請求の範囲第1項記載の周波
数変調波信号の歪低減回路。
(3) The frequency modulated wave signal is a recording circle of a constant angular velocity method,
It is a frequency modulated wave signal reproduced from a disc, and the control means causes the amplifier to operate in the non-linear region when the reproduction track of recording is a track on the inner circumferential side of a predetermined constant diameter value. A distortion reduction circuit for a frequency modulated wave signal according to claim 1, which is means for controlling the variable bias circuit in such a manner that the frequency modulated wave signal is a means for controlling the variable bias circuit.
JP10391782U 1982-07-09 1982-07-09 Distortion reduction circuit for frequency modulated wave signals Granted JPS599616U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10391782U JPS599616U (en) 1982-07-09 1982-07-09 Distortion reduction circuit for frequency modulated wave signals

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10391782U JPS599616U (en) 1982-07-09 1982-07-09 Distortion reduction circuit for frequency modulated wave signals

Publications (2)

Publication Number Publication Date
JPS599616U true JPS599616U (en) 1984-01-21
JPH0325344Y2 JPH0325344Y2 (en) 1991-05-31

Family

ID=30244236

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10391782U Granted JPS599616U (en) 1982-07-09 1982-07-09 Distortion reduction circuit for frequency modulated wave signals

Country Status (1)

Country Link
JP (1) JPS599616U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6346120U (en) * 1986-09-13 1988-03-29

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6346120U (en) * 1986-09-13 1988-03-29

Also Published As

Publication number Publication date
JPH0325344Y2 (en) 1991-05-31

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